target-moxie/helper.c

   1 /*
   2  *  Moxie helper routines.
   3  *
   4  *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <stdio.h>
  21 #include <string.h>
  22 #include <assert.h>
  23
  24 #include "config.h"
  25 #include "cpu.h"
  26 #include "mmu.h"
  27 #include "exec/exec-all.h"
  28 #include "exec/softmmu_exec.h"
  29 #include "qemu/host-utils.h"
  30 #include "helper.h"
  31
  32 #define MMUSUFFIX _mmu
  33
  34 #define SHIFT 0
  35 #include "exec/softmmu_template.h"
  36
  37 #define SHIFT 1
  38 #include "exec/softmmu_template.h"
  39
  40 #define SHIFT 2
  41 #include "exec/softmmu_template.h"
  42
  43 #define SHIFT 3
  44 #include "exec/softmmu_template.h"
  45
  46 /* Try to fill the TLB and return an exception if error. If retaddr is
  47    NULL, it means that the function was called in C code (i.e. not
  48    from generated code or from helper.c) */
  49 void tlb_fill(CPUMoxieState *env, target_ulong addr, int is_write, int mmu_idx,
  50               uintptr_t retaddr)
  51 {
  52     int ret;
  53
  54     ret = cpu_moxie_handle_mmu_fault(env, addr, is_write, mmu_idx);
  55     if (unlikely(ret)) {
  56         if (retaddr) {
  57             cpu_restore_state(env, retaddr);
  58         }
  59     }
  60     cpu_loop_exit(env);
  61 }
  62
  63 void helper_raise_exception(CPUMoxieState *env, int ex)
  64 {
  65     env->exception_index = ex;
  66     /* Stash the exception type.  */
  67     env->sregs[2] = ex;
  68     /* Stash the address where the exception occurred.  */
  69     cpu_restore_state(env, GETPC());
  70     env->sregs[5] = env->pc;
  71     /* Jump the the exception handline routine.  */
  72     env->pc = env->sregs[1];
  73     cpu_loop_exit(env);
  74 }
  75
  76 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  77 {
  78     if (unlikely(b == 0)) {
  79         helper_raise_exception(env, MOXIE_EX_DIV0);
  80         return 0;
  81     }
  82     if (unlikely(a == INT_MIN && b == -1)) {
  83         return INT_MIN;
  84     }
  85
  86     return (int32_t)a / (int32_t)b;
  87 }
  88
  89 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  90 {
  91     if (unlikely(b == 0)) {
  92         helper_raise_exception(env, MOXIE_EX_DIV0);
  93         return 0;
  94     }
  95     return a / b;
  96 }
  97
  98 void helper_debug(CPUMoxieState *env)
  99 {
 100     env->exception_index = EXCP_DEBUG;
 101     cpu_loop_exit(env);
 102 }
 103
 104 #if defined(CONFIG_USER_ONLY)
 105
 106 void moxie_cpu_do_interrupt(CPUState *env)
 107 {
 108     env->exception_index = -1;
 109 }
 110
 111 int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
 112                                int rw, int mmu_idx)
 113 {
 114     MoxieCPU *cpu = moxie_env_get_cpu(env);
 115
 116     env->exception_index = 0xaa;
 117     env->debug1 = address;
 118     cpu_dump_state(CPU(cpu), stderr, fprintf, 0);
 119     return 1;
 120 }
 121
 122 #else /* !CONFIG_USER_ONLY */
 123
 124 int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
 125                                int rw, int mmu_idx)
 126 {
 127     MoxieMMUResult res;
 128     int prot, miss;
 129     target_ulong phy;
 130     int r = 1;
 131
 132     address &= TARGET_PAGE_MASK;
 133     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 134     miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
 135     if (miss) {
 136         /* handle the miss.  */
 137         phy = 0;
 138         env->exception_index = MOXIE_EX_MMU_MISS;
 139     } else {
 140         phy = res.phy;
 141         r = 0;
 142     }
 143     tlb_set_page(env, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
 144     return r;
 145 }
 146
 147
 148 void moxie_cpu_do_interrupt(CPUState *cs)
 149 {
 150     MoxieCPU *cpu = MOXIE_CPU(cs);
 151     CPUMoxieState *env = &cpu->env;
 152
 153     switch (env->exception_index) {
 154     case MOXIE_EX_BREAK:
 155         break;
 156     default:
 157         break;
 158     }
 159 }
 160
 161 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 162 {
 163     MoxieCPU *cpu = MOXIE_CPU(cs);
 164     uint32_t phy = addr;
 165     MoxieMMUResult res;
 166     int miss;
 167
 168     miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 169     if (!miss) {
 170         phy = res.phy;
 171     }
 172     return phy;
 173 }
 174 #endif