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nbd: Fix struct name for structured reads
[qemu/ar7.git] / hw / block / fdc.c
blob67f78ac7021cfa94838559fb2c523181ce8cc01e
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29
30 #include "qemu/osdep.h"
31 #include "hw/hw.h"
32 #include "hw/block/fdc.h"
33 #include "qapi/error.h"
34 #include "qemu/error-report.h"
35 #include "qemu/timer.h"
36 #include "hw/isa/isa.h"
37 #include "hw/sysbus.h"
38 #include "hw/block/block.h"
39 #include "sysemu/block-backend.h"
40 #include "sysemu/blockdev.h"
41 #include "sysemu/sysemu.h"
42 #include "qemu/log.h"
43
44 /********************************************************/
45 /* debug Floppy devices */
46
47 #define DEBUG_FLOPPY 0
48
49 #define FLOPPY_DPRINTF(fmt, ...) \
50 do { \
51 if (DEBUG_FLOPPY) { \
52 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \
53 } \
54 } while (0)
55
56
57 /********************************************************/
58 /* qdev floppy bus */
59
60 #define TYPE_FLOPPY_BUS "floppy-bus"
61 #define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS)
62
63 typedef struct FDCtrl FDCtrl;
64 typedef struct FDrive FDrive;
65 static FDrive *get_drv(FDCtrl *fdctrl, int unit);
66
67 typedef struct FloppyBus {
68 BusState bus;
69 FDCtrl *fdc;
70 } FloppyBus;
71
72 static const TypeInfo floppy_bus_info = {
73 .name = TYPE_FLOPPY_BUS,
74 .parent = TYPE_BUS,
75 .instance_size = sizeof(FloppyBus),
76 };
77
78 static void floppy_bus_create(FDCtrl *fdc, FloppyBus *bus, DeviceState *dev)
79 {
80 qbus_create_inplace(bus, sizeof(FloppyBus), TYPE_FLOPPY_BUS, dev, NULL);
81 bus->fdc = fdc;
82 }
83
84
85 /********************************************************/
86 /* Floppy drive emulation */
87
88 typedef enum FDriveRate {
89 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
90 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
91 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
92 FDRIVE_RATE_1M = 0x03, /* 1 Mbps */
93 } FDriveRate;
94
95 typedef enum FDriveSize {
96 FDRIVE_SIZE_UNKNOWN,
97 FDRIVE_SIZE_350,
98 FDRIVE_SIZE_525,
99 } FDriveSize;
100
101 typedef struct FDFormat {
102 FloppyDriveType drive;
103 uint8_t last_sect;
104 uint8_t max_track;
105 uint8_t max_head;
106 FDriveRate rate;
107 } FDFormat;
108
109 /* In many cases, the total sector size of a format is enough to uniquely
110 * identify it. However, there are some total sector collisions between
111 * formats of different physical size, and these are noted below by
112 * highlighting the total sector size for entries with collisions. */
113 static const FDFormat fd_formats[] = {
114 /* First entry is default format */
115 /* 1.44 MB 3"1/2 floppy disks */
116 { FLOPPY_DRIVE_TYPE_144, 18, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 2880 */
117 { FLOPPY_DRIVE_TYPE_144, 20, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 3200 */
118 { FLOPPY_DRIVE_TYPE_144, 21, 80, 1, FDRIVE_RATE_500K, },
119 { FLOPPY_DRIVE_TYPE_144, 21, 82, 1, FDRIVE_RATE_500K, },
120 { FLOPPY_DRIVE_TYPE_144, 21, 83, 1, FDRIVE_RATE_500K, },
121 { FLOPPY_DRIVE_TYPE_144, 22, 80, 1, FDRIVE_RATE_500K, },
122 { FLOPPY_DRIVE_TYPE_144, 23, 80, 1, FDRIVE_RATE_500K, },
123 { FLOPPY_DRIVE_TYPE_144, 24, 80, 1, FDRIVE_RATE_500K, },
124 /* 2.88 MB 3"1/2 floppy disks */
125 { FLOPPY_DRIVE_TYPE_288, 36, 80, 1, FDRIVE_RATE_1M, },
126 { FLOPPY_DRIVE_TYPE_288, 39, 80, 1, FDRIVE_RATE_1M, },
127 { FLOPPY_DRIVE_TYPE_288, 40, 80, 1, FDRIVE_RATE_1M, },
128 { FLOPPY_DRIVE_TYPE_288, 44, 80, 1, FDRIVE_RATE_1M, },
129 { FLOPPY_DRIVE_TYPE_288, 48, 80, 1, FDRIVE_RATE_1M, },
130 /* 720 kB 3"1/2 floppy disks */
131 { FLOPPY_DRIVE_TYPE_144, 9, 80, 1, FDRIVE_RATE_250K, }, /* 3.5" 1440 */
132 { FLOPPY_DRIVE_TYPE_144, 10, 80, 1, FDRIVE_RATE_250K, },
133 { FLOPPY_DRIVE_TYPE_144, 10, 82, 1, FDRIVE_RATE_250K, },
134 { FLOPPY_DRIVE_TYPE_144, 10, 83, 1, FDRIVE_RATE_250K, },
135 { FLOPPY_DRIVE_TYPE_144, 13, 80, 1, FDRIVE_RATE_250K, },
136 { FLOPPY_DRIVE_TYPE_144, 14, 80, 1, FDRIVE_RATE_250K, },
137 /* 1.2 MB 5"1/4 floppy disks */
138 { FLOPPY_DRIVE_TYPE_120, 15, 80, 1, FDRIVE_RATE_500K, },
139 { FLOPPY_DRIVE_TYPE_120, 18, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 2880 */
140 { FLOPPY_DRIVE_TYPE_120, 18, 82, 1, FDRIVE_RATE_500K, },
141 { FLOPPY_DRIVE_TYPE_120, 18, 83, 1, FDRIVE_RATE_500K, },
142 { FLOPPY_DRIVE_TYPE_120, 20, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 3200 */
143 /* 720 kB 5"1/4 floppy disks */
144 { FLOPPY_DRIVE_TYPE_120, 9, 80, 1, FDRIVE_RATE_250K, }, /* 5.25" 1440 */
145 { FLOPPY_DRIVE_TYPE_120, 11, 80, 1, FDRIVE_RATE_250K, },
146 /* 360 kB 5"1/4 floppy disks */
147 { FLOPPY_DRIVE_TYPE_120, 9, 40, 1, FDRIVE_RATE_300K, }, /* 5.25" 720 */
148 { FLOPPY_DRIVE_TYPE_120, 9, 40, 0, FDRIVE_RATE_300K, },
149 { FLOPPY_DRIVE_TYPE_120, 10, 41, 1, FDRIVE_RATE_300K, },
150 { FLOPPY_DRIVE_TYPE_120, 10, 42, 1, FDRIVE_RATE_300K, },
151 /* 320 kB 5"1/4 floppy disks */
152 { FLOPPY_DRIVE_TYPE_120, 8, 40, 1, FDRIVE_RATE_250K, },
153 { FLOPPY_DRIVE_TYPE_120, 8, 40, 0, FDRIVE_RATE_250K, },
154 /* 360 kB must match 5"1/4 better than 3"1/2... */
155 { FLOPPY_DRIVE_TYPE_144, 9, 80, 0, FDRIVE_RATE_250K, }, /* 3.5" 720 */
156 /* end */
157 { FLOPPY_DRIVE_TYPE_NONE, -1, -1, 0, 0, },
158 };
159
160 static FDriveSize drive_size(FloppyDriveType drive)
161 {
162 switch (drive) {
163 case FLOPPY_DRIVE_TYPE_120:
164 return FDRIVE_SIZE_525;
165 case FLOPPY_DRIVE_TYPE_144:
166 case FLOPPY_DRIVE_TYPE_288:
167 return FDRIVE_SIZE_350;
168 default:
169 return FDRIVE_SIZE_UNKNOWN;
170 }
171 }
172
173 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
174 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
175
176 /* Will always be a fixed parameter for us */
177 #define FD_SECTOR_LEN 512
178 #define FD_SECTOR_SC 2 /* Sector size code */
179 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
180
181 /* Floppy disk drive emulation */
182 typedef enum FDiskFlags {
183 FDISK_DBL_SIDES = 0x01,
184 } FDiskFlags;
185
186 struct FDrive {
187 FDCtrl *fdctrl;
188 BlockBackend *blk;
189 BlockConf *conf;
190 /* Drive status */
191 FloppyDriveType drive; /* CMOS drive type */
192 uint8_t perpendicular; /* 2.88 MB access mode */
193 /* Position */
194 uint8_t head;
195 uint8_t track;
196 uint8_t sect;
197 /* Media */
198 FloppyDriveType disk; /* Current disk type */
199 FDiskFlags flags;
200 uint8_t last_sect; /* Nb sector per track */
201 uint8_t max_track; /* Nb of tracks */
202 uint16_t bps; /* Bytes per sector */
203 uint8_t ro; /* Is read-only */
204 uint8_t media_changed; /* Is media changed */
205 uint8_t media_rate; /* Data rate of medium */
206
207 bool media_validated; /* Have we validated the media? */
208 };
209
210
211 static FloppyDriveType get_fallback_drive_type(FDrive *drv);
212
213 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU
214 * currently goes through some pains to keep seeks within the bounds
215 * established by last_sect and max_track. Correcting this is difficult,
216 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel.
217 *
218 * For now: allow empty drives to have large bounds so we can seek around,
219 * with the understanding that when a diskette is inserted, the bounds will
220 * properly tighten to match the geometry of that inserted medium.
221 */
222 static void fd_empty_seek_hack(FDrive *drv)
223 {
224 drv->last_sect = 0xFF;
225 drv->max_track = 0xFF;
226 }
227
228 static void fd_init(FDrive *drv)
229 {
230 /* Drive */
231 drv->perpendicular = 0;
232 /* Disk */
233 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
234 drv->last_sect = 0;
235 drv->max_track = 0;
236 drv->ro = true;
237 drv->media_changed = 1;
238 }
239
240 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
241
242 static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
243 uint8_t last_sect, uint8_t num_sides)
244 {
245 return (((track * num_sides) + head) * last_sect) + sect - 1;
246 }
247
248 /* Returns current position, in sectors, for given drive */
249 static int fd_sector(FDrive *drv)
250 {
251 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect,
252 NUM_SIDES(drv));
253 }
254
255 /* Returns current position, in bytes, for given drive */
256 static int fd_offset(FDrive *drv)
257 {
258 g_assert(fd_sector(drv) < INT_MAX >> BDRV_SECTOR_BITS);
259 return fd_sector(drv) << BDRV_SECTOR_BITS;
260 }
261
262 /* Seek to a new position:
263 * returns 0 if already on right track
264 * returns 1 if track changed
265 * returns 2 if track is invalid
266 * returns 3 if sector is invalid
267 * returns 4 if seek is disabled
268 */
269 static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
270 int enable_seek)
271 {
272 uint32_t sector;
273 int ret;
274
275 if (track > drv->max_track ||
276 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
277 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
278 head, track, sect, 1,
279 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
280 drv->max_track, drv->last_sect);
281 return 2;
282 }
283 if (sect > drv->last_sect) {
284 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
285 head, track, sect, 1,
286 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
287 drv->max_track, drv->last_sect);
288 return 3;
289 }
290 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
291 ret = 0;
292 if (sector != fd_sector(drv)) {
293 #if 0
294 if (!enable_seek) {
295 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
296 " (max=%d %02x %02x)\n",
297 head, track, sect, 1, drv->max_track,
298 drv->last_sect);
299 return 4;
300 }
301 #endif
302 drv->head = head;
303 if (drv->track != track) {
304 if (drv->blk != NULL && blk_is_inserted(drv->blk)) {
305 drv->media_changed = 0;
306 }
307 ret = 1;
308 }
309 drv->track = track;
310 drv->sect = sect;
311 }
312
313 if (drv->blk == NULL || !blk_is_inserted(drv->blk)) {
314 ret = 2;
315 }
316
317 return ret;
318 }
319
320 /* Set drive back to track 0 */
321 static void fd_recalibrate(FDrive *drv)
322 {
323 FLOPPY_DPRINTF("recalibrate\n");
324 fd_seek(drv, 0, 0, 1, 1);
325 }
326
327 /**
328 * Determine geometry based on inserted diskette.
329 * Will not operate on an empty drive.
330 *
331 * @return: 0 on success, -1 if the drive is empty.
332 */
333 static int pick_geometry(FDrive *drv)
334 {
335 BlockBackend *blk = drv->blk;
336 const FDFormat *parse;
337 uint64_t nb_sectors, size;
338 int i;
339 int match, size_match, type_match;
340 bool magic = drv->drive == FLOPPY_DRIVE_TYPE_AUTO;
341
342 /* We can only pick a geometry if we have a diskette. */
343 if (!drv->blk || !blk_is_inserted(drv->blk) ||
344 drv->drive == FLOPPY_DRIVE_TYPE_NONE)
345 {
346 return -1;
347 }
348
349 /* We need to determine the likely geometry of the inserted medium.
350 * In order of preference, we look for:
351 * (1) The same drive type and number of sectors,
352 * (2) The same diskette size and number of sectors,
353 * (3) The same drive type.
354 *
355 * In all cases, matches that occur higher in the drive table will take
356 * precedence over matches that occur later in the table.
357 */
358 blk_get_geometry(blk, &nb_sectors);
359 match = size_match = type_match = -1;
360 for (i = 0; ; i++) {
361 parse = &fd_formats[i];
362 if (parse->drive == FLOPPY_DRIVE_TYPE_NONE) {
363 break;
364 }
365 size = (parse->max_head + 1) * parse->max_track * parse->last_sect;
366 if (nb_sectors == size) {
367 if (magic || parse->drive == drv->drive) {
368 /* (1) perfect match -- nb_sectors and drive type */
369 goto out;
370 } else if (drive_size(parse->drive) == drive_size(drv->drive)) {
371 /* (2) size match -- nb_sectors and physical medium size */
372 match = (match == -1) ? i : match;
373 } else {
374 /* This is suspicious -- Did the user misconfigure? */
375 size_match = (size_match == -1) ? i : size_match;
376 }
377 } else if (type_match == -1) {
378 if ((parse->drive == drv->drive) ||
379 (magic && (parse->drive == get_fallback_drive_type(drv)))) {
380 /* (3) type match -- nb_sectors mismatch, but matches the type
381 * specified explicitly by the user, or matches the fallback
382 * default type when using the drive autodetect mechanism */
383 type_match = i;
384 }
385 }
386 }
387
388 /* No exact match found */
389 if (match == -1) {
390 if (size_match != -1) {
391 parse = &fd_formats[size_match];
392 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
393 "but inserted medium appears to be a "
394 "%"PRId64" sector '%s' type\n",
395 FloppyDriveType_str(drv->drive),
396 nb_sectors,
397 FloppyDriveType_str(parse->drive));
398 }
399 match = type_match;
400 }
401
402 /* No match of any kind found -- fd_format is misconfigured, abort. */
403 if (match == -1) {
404 error_setg(&error_abort, "No candidate geometries present in table "
405 " for floppy drive type '%s'",
406 FloppyDriveType_str(drv->drive));
407 }
408
409 parse = &(fd_formats[match]);
410
411 out:
412 if (parse->max_head == 0) {
413 drv->flags &= ~FDISK_DBL_SIDES;
414 } else {
415 drv->flags |= FDISK_DBL_SIDES;
416 }
417 drv->max_track = parse->max_track;
418 drv->last_sect = parse->last_sect;
419 drv->disk = parse->drive;
420 drv->media_rate = parse->rate;
421 return 0;
422 }
423
424 static void pick_drive_type(FDrive *drv)
425 {
426 if (drv->drive != FLOPPY_DRIVE_TYPE_AUTO) {
427 return;
428 }
429
430 if (pick_geometry(drv) == 0) {
431 drv->drive = drv->disk;
432 } else {
433 drv->drive = get_fallback_drive_type(drv);
434 }
435
436 g_assert(drv->drive != FLOPPY_DRIVE_TYPE_AUTO);
437 }
438
439 /* Revalidate a disk drive after a disk change */
440 static void fd_revalidate(FDrive *drv)
441 {
442 int rc;
443
444 FLOPPY_DPRINTF("revalidate\n");
445 if (drv->blk != NULL) {
446 drv->ro = blk_is_read_only(drv->blk);
447 if (!blk_is_inserted(drv->blk)) {
448 FLOPPY_DPRINTF("No disk in drive\n");
449 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
450 fd_empty_seek_hack(drv);
451 } else if (!drv->media_validated) {
452 rc = pick_geometry(drv);
453 if (rc) {
454 FLOPPY_DPRINTF("Could not validate floppy drive media");
455 } else {
456 drv->media_validated = true;
457 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
458 (drv->flags & FDISK_DBL_SIDES) ? 2 : 1,
459 drv->max_track, drv->last_sect,
460 drv->ro ? "ro" : "rw");
461 }
462 }
463 } else {
464 FLOPPY_DPRINTF("No drive connected\n");
465 drv->last_sect = 0;
466 drv->max_track = 0;
467 drv->flags &= ~FDISK_DBL_SIDES;
468 drv->drive = FLOPPY_DRIVE_TYPE_NONE;
469 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
470 }
471 }
472
473 static void fd_change_cb(void *opaque, bool load, Error **errp)
474 {
475 FDrive *drive = opaque;
476 Error *local_err = NULL;
477
478 if (!load) {
479 blk_set_perm(drive->blk, 0, BLK_PERM_ALL, &error_abort);
480 } else {
481 blkconf_apply_backend_options(drive->conf,
482 blk_is_read_only(drive->blk), false,
483 &local_err);
484 if (local_err) {
485 error_propagate(errp, local_err);
486 return;
487 }
488 }
489
490 drive->media_changed = 1;
491 drive->media_validated = false;
492 fd_revalidate(drive);
493 }
494
495 static const BlockDevOps fd_block_ops = {
496 .change_media_cb = fd_change_cb,
497 };
498
499
500 #define TYPE_FLOPPY_DRIVE "floppy"
501 #define FLOPPY_DRIVE(obj) \
502 OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE)
503
504 typedef struct FloppyDrive {
505 DeviceState qdev;
506 uint32_t unit;
507 BlockConf conf;
508 FloppyDriveType type;
509 } FloppyDrive;
510
511 static Property floppy_drive_properties[] = {
512 DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1),
513 DEFINE_BLOCK_PROPERTIES(FloppyDrive, conf),
514 DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type,
515 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
516 FloppyDriveType),
517 DEFINE_PROP_END_OF_LIST(),
518 };
519
520 static void floppy_drive_realize(DeviceState *qdev, Error **errp)
521 {
522 FloppyDrive *dev = FLOPPY_DRIVE(qdev);
523 FloppyBus *bus = FLOPPY_BUS(qdev->parent_bus);
524 FDrive *drive;
525 Error *local_err = NULL;
526 int ret;
527
528 if (dev->unit == -1) {
529 for (dev->unit = 0; dev->unit < MAX_FD; dev->unit++) {
530 drive = get_drv(bus->fdc, dev->unit);
531 if (!drive->blk) {
532 break;
533 }
534 }
535 }
536
537 if (dev->unit >= MAX_FD) {
538 error_setg(errp, "Can't create floppy unit %d, bus supports "
539 "only %d units", dev->unit, MAX_FD);
540 return;
541 }
542
543 drive = get_drv(bus->fdc, dev->unit);
544 if (drive->blk) {
545 error_setg(errp, "Floppy unit %d is in use", dev->unit);
546 return;
547 }
548
549 if (!dev->conf.blk) {
550 /* Anonymous BlockBackend for an empty drive */
551 dev->conf.blk = blk_new(0, BLK_PERM_ALL);
552 ret = blk_attach_dev(dev->conf.blk, qdev);
553 assert(ret == 0);
554 }
555
556 blkconf_blocksizes(&dev->conf);
557 if (dev->conf.logical_block_size != 512 ||
558 dev->conf.physical_block_size != 512)
559 {
560 error_setg(errp, "Physical and logical block size must "
561 "be 512 for floppy");
562 return;
563 }
564
565 /* rerror/werror aren't supported by fdc and therefore not even registered
566 * with qdev. So set the defaults manually before they are used in
567 * blkconf_apply_backend_options(). */
568 dev->conf.rerror = BLOCKDEV_ON_ERROR_AUTO;
569 dev->conf.werror = BLOCKDEV_ON_ERROR_AUTO;
570
571 blkconf_apply_backend_options(&dev->conf, blk_is_read_only(dev->conf.blk),
572 false, &local_err);
573 if (local_err) {
574 error_propagate(errp, local_err);
575 return;
576 }
577
578 /* 'enospc' is the default for -drive, 'report' is what blk_new() gives us
579 * for empty drives. */
580 if (blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_ENOSPC &&
581 blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_REPORT) {
582 error_setg(errp, "fdc doesn't support drive option werror");
583 return;
584 }
585 if (blk_get_on_error(dev->conf.blk, 1) != BLOCKDEV_ON_ERROR_REPORT) {
586 error_setg(errp, "fdc doesn't support drive option rerror");
587 return;
588 }
589
590 drive->conf = &dev->conf;
591 drive->blk = dev->conf.blk;
592 drive->fdctrl = bus->fdc;
593
594 fd_init(drive);
595 blk_set_dev_ops(drive->blk, &fd_block_ops, drive);
596
597 /* Keep 'type' qdev property and FDrive->drive in sync */
598 drive->drive = dev->type;
599 pick_drive_type(drive);
600 dev->type = drive->drive;
601
602 fd_revalidate(drive);
603 }
604
605 static void floppy_drive_class_init(ObjectClass *klass, void *data)
606 {
607 DeviceClass *k = DEVICE_CLASS(klass);
608 k->realize = floppy_drive_realize;
609 set_bit(DEVICE_CATEGORY_STORAGE, k->categories);
610 k->bus_type = TYPE_FLOPPY_BUS;
611 k->props = floppy_drive_properties;
612 k->desc = "virtual floppy drive";
613 }
614
615 static const TypeInfo floppy_drive_info = {
616 .name = TYPE_FLOPPY_DRIVE,
617 .parent = TYPE_DEVICE,
618 .instance_size = sizeof(FloppyDrive),
619 .class_init = floppy_drive_class_init,
620 };
621
622 /********************************************************/
623 /* Intel 82078 floppy disk controller emulation */
624
625 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
626 static void fdctrl_to_command_phase(FDCtrl *fdctrl);
627 static int fdctrl_transfer_handler (void *opaque, int nchan,
628 int dma_pos, int dma_len);
629 static void fdctrl_raise_irq(FDCtrl *fdctrl);
630 static FDrive *get_cur_drv(FDCtrl *fdctrl);
631
632 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
633 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
634 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
635 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
636 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
637 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
638 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
639 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
640 static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
641 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
642 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
643 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value);
644
645 enum {
646 FD_DIR_WRITE = 0,
647 FD_DIR_READ = 1,
648 FD_DIR_SCANE = 2,
649 FD_DIR_SCANL = 3,
650 FD_DIR_SCANH = 4,
651 FD_DIR_VERIFY = 5,
652 };
653
654 enum {
655 FD_STATE_MULTI = 0x01, /* multi track flag */
656 FD_STATE_FORMAT = 0x02, /* format flag */
657 };
658
659 enum {
660 FD_REG_SRA = 0x00,
661 FD_REG_SRB = 0x01,
662 FD_REG_DOR = 0x02,
663 FD_REG_TDR = 0x03,
664 FD_REG_MSR = 0x04,
665 FD_REG_DSR = 0x04,
666 FD_REG_FIFO = 0x05,
667 FD_REG_DIR = 0x07,
668 FD_REG_CCR = 0x07,
669 };
670
671 enum {
672 FD_CMD_READ_TRACK = 0x02,
673 FD_CMD_SPECIFY = 0x03,
674 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
675 FD_CMD_WRITE = 0x05,
676 FD_CMD_READ = 0x06,
677 FD_CMD_RECALIBRATE = 0x07,
678 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
679 FD_CMD_WRITE_DELETED = 0x09,
680 FD_CMD_READ_ID = 0x0a,
681 FD_CMD_READ_DELETED = 0x0c,
682 FD_CMD_FORMAT_TRACK = 0x0d,
683 FD_CMD_DUMPREG = 0x0e,
684 FD_CMD_SEEK = 0x0f,
685 FD_CMD_VERSION = 0x10,
686 FD_CMD_SCAN_EQUAL = 0x11,
687 FD_CMD_PERPENDICULAR_MODE = 0x12,
688 FD_CMD_CONFIGURE = 0x13,
689 FD_CMD_LOCK = 0x14,
690 FD_CMD_VERIFY = 0x16,
691 FD_CMD_POWERDOWN_MODE = 0x17,
692 FD_CMD_PART_ID = 0x18,
693 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
694 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
695 FD_CMD_SAVE = 0x2e,
696 FD_CMD_OPTION = 0x33,
697 FD_CMD_RESTORE = 0x4e,
698 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
699 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
700 FD_CMD_FORMAT_AND_WRITE = 0xcd,
701 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
702 };
703
704 enum {
705 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
706 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
707 FD_CONFIG_POLL = 0x10, /* Poll enabled */
708 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
709 FD_CONFIG_EIS = 0x40, /* No implied seeks */
710 };
711
712 enum {
713 FD_SR0_DS0 = 0x01,
714 FD_SR0_DS1 = 0x02,
715 FD_SR0_HEAD = 0x04,
716 FD_SR0_EQPMT = 0x10,
717 FD_SR0_SEEK = 0x20,
718 FD_SR0_ABNTERM = 0x40,
719 FD_SR0_INVCMD = 0x80,
720 FD_SR0_RDYCHG = 0xc0,
721 };
722
723 enum {
724 FD_SR1_MA = 0x01, /* Missing address mark */
725 FD_SR1_NW = 0x02, /* Not writable */
726 FD_SR1_EC = 0x80, /* End of cylinder */
727 };
728
729 enum {
730 FD_SR2_SNS = 0x04, /* Scan not satisfied */
731 FD_SR2_SEH = 0x08, /* Scan equal hit */
732 };
733
734 enum {
735 FD_SRA_DIR = 0x01,
736 FD_SRA_nWP = 0x02,
737 FD_SRA_nINDX = 0x04,
738 FD_SRA_HDSEL = 0x08,
739 FD_SRA_nTRK0 = 0x10,
740 FD_SRA_STEP = 0x20,
741 FD_SRA_nDRV2 = 0x40,
742 FD_SRA_INTPEND = 0x80,
743 };
744
745 enum {
746 FD_SRB_MTR0 = 0x01,
747 FD_SRB_MTR1 = 0x02,
748 FD_SRB_WGATE = 0x04,
749 FD_SRB_RDATA = 0x08,
750 FD_SRB_WDATA = 0x10,
751 FD_SRB_DR0 = 0x20,
752 };
753
754 enum {
755 #if MAX_FD == 4
756 FD_DOR_SELMASK = 0x03,
757 #else
758 FD_DOR_SELMASK = 0x01,
759 #endif
760 FD_DOR_nRESET = 0x04,
761 FD_DOR_DMAEN = 0x08,
762 FD_DOR_MOTEN0 = 0x10,
763 FD_DOR_MOTEN1 = 0x20,
764 FD_DOR_MOTEN2 = 0x40,
765 FD_DOR_MOTEN3 = 0x80,
766 };
767
768 enum {
769 #if MAX_FD == 4
770 FD_TDR_BOOTSEL = 0x0c,
771 #else
772 FD_TDR_BOOTSEL = 0x04,
773 #endif
774 };
775
776 enum {
777 FD_DSR_DRATEMASK= 0x03,
778 FD_DSR_PWRDOWN = 0x40,
779 FD_DSR_SWRESET = 0x80,
780 };
781
782 enum {
783 FD_MSR_DRV0BUSY = 0x01,
784 FD_MSR_DRV1BUSY = 0x02,
785 FD_MSR_DRV2BUSY = 0x04,
786 FD_MSR_DRV3BUSY = 0x08,
787 FD_MSR_CMDBUSY = 0x10,
788 FD_MSR_NONDMA = 0x20,
789 FD_MSR_DIO = 0x40,
790 FD_MSR_RQM = 0x80,
791 };
792
793 enum {
794 FD_DIR_DSKCHG = 0x80,
795 };
796
797 /*
798 * See chapter 5.0 "Controller phases" of the spec:
799 *
800 * Command phase:
801 * The host writes a command and its parameters into the FIFO. The command
802 * phase is completed when all parameters for the command have been supplied,
803 * and execution phase is entered.
804 *
805 * Execution phase:
806 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
807 * contains the payload now, otherwise it's unused. When all bytes of the
808 * required data have been transferred, the state is switched to either result
809 * phase (if the command produces status bytes) or directly back into the
810 * command phase for the next command.
811 *
812 * Result phase:
813 * The host reads out the FIFO, which contains one or more result bytes now.
814 */
815 enum {
816 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
817 FD_PHASE_RECONSTRUCT = 0,
818
819 FD_PHASE_COMMAND = 1,
820 FD_PHASE_EXECUTION = 2,
821 FD_PHASE_RESULT = 3,
822 };
823
824 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
825 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
826
827 struct FDCtrl {
828 MemoryRegion iomem;
829 qemu_irq irq;
830 /* Controller state */
831 QEMUTimer *result_timer;
832 int dma_chann;
833 uint8_t phase;
834 IsaDma *dma;
835 /* Controller's identification */
836 uint8_t version;
837 /* HW */
838 uint8_t sra;
839 uint8_t srb;
840 uint8_t dor;
841 uint8_t dor_vmstate; /* only used as temp during vmstate */
842 uint8_t tdr;
843 uint8_t dsr;
844 uint8_t msr;
845 uint8_t cur_drv;
846 uint8_t status0;
847 uint8_t status1;
848 uint8_t status2;
849 /* Command FIFO */
850 uint8_t *fifo;
851 int32_t fifo_size;
852 uint32_t data_pos;
853 uint32_t data_len;
854 uint8_t data_state;
855 uint8_t data_dir;
856 uint8_t eot; /* last wanted sector */
857 /* States kept only to be returned back */
858 /* precompensation */
859 uint8_t precomp_trk;
860 uint8_t config;
861 uint8_t lock;
862 /* Power down config (also with status regB access mode */
863 uint8_t pwrd;
864 /* Floppy drives */
865 FloppyBus bus;
866 uint8_t num_floppies;
867 FDrive drives[MAX_FD];
868 struct {
869 BlockBackend *blk;
870 FloppyDriveType type;
871 } qdev_for_drives[MAX_FD];
872 int reset_sensei;
873 uint32_t check_media_rate;
874 FloppyDriveType fallback; /* type=auto failure fallback */
875 /* Timers state */
876 uint8_t timer0;
877 uint8_t timer1;
878 PortioList portio_list;
879 };
880
881 static FloppyDriveType get_fallback_drive_type(FDrive *drv)
882 {
883 return drv->fdctrl->fallback;
884 }
885
886 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
887 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
888
889 typedef struct FDCtrlSysBus {
890 /*< private >*/
891 SysBusDevice parent_obj;
892 /*< public >*/
893
894 struct FDCtrl state;
895 } FDCtrlSysBus;
896
897 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
898
899 typedef struct FDCtrlISABus {
900 ISADevice parent_obj;
901
902 uint32_t iobase;
903 uint32_t irq;
904 uint32_t dma;
905 struct FDCtrl state;
906 int32_t bootindexA;
907 int32_t bootindexB;
908 } FDCtrlISABus;
909
910 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
911 {
912 FDCtrl *fdctrl = opaque;
913 uint32_t retval;
914
915 reg &= 7;
916 switch (reg) {
917 case FD_REG_SRA:
918 retval = fdctrl_read_statusA(fdctrl);
919 break;
920 case FD_REG_SRB:
921 retval = fdctrl_read_statusB(fdctrl);
922 break;
923 case FD_REG_DOR:
924 retval = fdctrl_read_dor(fdctrl);
925 break;
926 case FD_REG_TDR:
927 retval = fdctrl_read_tape(fdctrl);
928 break;
929 case FD_REG_MSR:
930 retval = fdctrl_read_main_status(fdctrl);
931 break;
932 case FD_REG_FIFO:
933 retval = fdctrl_read_data(fdctrl);
934 break;
935 case FD_REG_DIR:
936 retval = fdctrl_read_dir(fdctrl);
937 break;
938 default:
939 retval = (uint32_t)(-1);
940 break;
941 }
942 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
943
944 return retval;
945 }
946
947 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
948 {
949 FDCtrl *fdctrl = opaque;
950
951 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
952
953 reg &= 7;
954 switch (reg) {
955 case FD_REG_DOR:
956 fdctrl_write_dor(fdctrl, value);
957 break;
958 case FD_REG_TDR:
959 fdctrl_write_tape(fdctrl, value);
960 break;
961 case FD_REG_DSR:
962 fdctrl_write_rate(fdctrl, value);
963 break;
964 case FD_REG_FIFO:
965 fdctrl_write_data(fdctrl, value);
966 break;
967 case FD_REG_CCR:
968 fdctrl_write_ccr(fdctrl, value);
969 break;
970 default:
971 break;
972 }
973 }
974
975 static uint64_t fdctrl_read_mem (void *opaque, hwaddr reg,
976 unsigned ize)
977 {
978 return fdctrl_read(opaque, (uint32_t)reg);
979 }
980
981 static void fdctrl_write_mem (void *opaque, hwaddr reg,
982 uint64_t value, unsigned size)
983 {
984 fdctrl_write(opaque, (uint32_t)reg, value);
985 }
986
987 static const MemoryRegionOps fdctrl_mem_ops = {
988 .read = fdctrl_read_mem,
989 .write = fdctrl_write_mem,
990 .endianness = DEVICE_NATIVE_ENDIAN,
991 };
992
993 static const MemoryRegionOps fdctrl_mem_strict_ops = {
994 .read = fdctrl_read_mem,
995 .write = fdctrl_write_mem,
996 .endianness = DEVICE_NATIVE_ENDIAN,
997 .valid = {
998 .min_access_size = 1,
999 .max_access_size = 1,
1000 },
1001 };
1002
1003 static bool fdrive_media_changed_needed(void *opaque)
1004 {
1005 FDrive *drive = opaque;
1006
1007 return (drive->blk != NULL && drive->media_changed != 1);
1008 }
1009
1010 static const VMStateDescription vmstate_fdrive_media_changed = {
1011 .name = "fdrive/media_changed",
1012 .version_id = 1,
1013 .minimum_version_id = 1,
1014 .needed = fdrive_media_changed_needed,
1015 .fields = (VMStateField[]) {
1016 VMSTATE_UINT8(media_changed, FDrive),
1017 VMSTATE_END_OF_LIST()
1018 }
1019 };
1020
1021 static bool fdrive_media_rate_needed(void *opaque)
1022 {
1023 FDrive *drive = opaque;
1024
1025 return drive->fdctrl->check_media_rate;
1026 }
1027
1028 static const VMStateDescription vmstate_fdrive_media_rate = {
1029 .name = "fdrive/media_rate",
1030 .version_id = 1,
1031 .minimum_version_id = 1,
1032 .needed = fdrive_media_rate_needed,
1033 .fields = (VMStateField[]) {
1034 VMSTATE_UINT8(media_rate, FDrive),
1035 VMSTATE_END_OF_LIST()
1036 }
1037 };
1038
1039 static bool fdrive_perpendicular_needed(void *opaque)
1040 {
1041 FDrive *drive = opaque;
1042
1043 return drive->perpendicular != 0;
1044 }
1045
1046 static const VMStateDescription vmstate_fdrive_perpendicular = {
1047 .name = "fdrive/perpendicular",
1048 .version_id = 1,
1049 .minimum_version_id = 1,
1050 .needed = fdrive_perpendicular_needed,
1051 .fields = (VMStateField[]) {
1052 VMSTATE_UINT8(perpendicular, FDrive),
1053 VMSTATE_END_OF_LIST()
1054 }
1055 };
1056
1057 static int fdrive_post_load(void *opaque, int version_id)
1058 {
1059 fd_revalidate(opaque);
1060 return 0;
1061 }
1062
1063 static const VMStateDescription vmstate_fdrive = {
1064 .name = "fdrive",
1065 .version_id = 1,
1066 .minimum_version_id = 1,
1067 .post_load = fdrive_post_load,
1068 .fields = (VMStateField[]) {
1069 VMSTATE_UINT8(head, FDrive),
1070 VMSTATE_UINT8(track, FDrive),
1071 VMSTATE_UINT8(sect, FDrive),
1072 VMSTATE_END_OF_LIST()
1073 },
1074 .subsections = (const VMStateDescription*[]) {
1075 &vmstate_fdrive_media_changed,
1076 &vmstate_fdrive_media_rate,
1077 &vmstate_fdrive_perpendicular,
1078 NULL
1079 }
1080 };
1081
1082 /*
1083 * Reconstructs the phase from register values according to the logic that was
1084 * implemented in qemu 2.3. This is the default value that is used if the phase
1085 * subsection is not present on migration.
1086 *
1087 * Don't change this function to reflect newer qemu versions, it is part of
1088 * the migration ABI.
1089 */
1090 static int reconstruct_phase(FDCtrl *fdctrl)
1091 {
1092 if (fdctrl->msr & FD_MSR_NONDMA) {
1093 return FD_PHASE_EXECUTION;
1094 } else if ((fdctrl->msr & FD_MSR_RQM) == 0) {
1095 /* qemu 2.3 disabled RQM only during DMA transfers */
1096 return FD_PHASE_EXECUTION;
1097 } else if (fdctrl->msr & FD_MSR_DIO) {
1098 return FD_PHASE_RESULT;
1099 } else {
1100 return FD_PHASE_COMMAND;
1101 }
1102 }
1103
1104 static int fdc_pre_save(void *opaque)
1105 {
1106 FDCtrl *s = opaque;
1107
1108 s->dor_vmstate = s->dor | GET_CUR_DRV(s);
1109
1110 return 0;
1111 }
1112
1113 static int fdc_pre_load(void *opaque)
1114 {
1115 FDCtrl *s = opaque;
1116 s->phase = FD_PHASE_RECONSTRUCT;
1117 return 0;
1118 }
1119
1120 static int fdc_post_load(void *opaque, int version_id)
1121 {
1122 FDCtrl *s = opaque;
1123
1124 SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
1125 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
1126
1127 if (s->phase == FD_PHASE_RECONSTRUCT) {
1128 s->phase = reconstruct_phase(s);
1129 }
1130
1131 return 0;
1132 }
1133
1134 static bool fdc_reset_sensei_needed(void *opaque)
1135 {
1136 FDCtrl *s = opaque;
1137
1138 return s->reset_sensei != 0;
1139 }
1140
1141 static const VMStateDescription vmstate_fdc_reset_sensei = {
1142 .name = "fdc/reset_sensei",
1143 .version_id = 1,
1144 .minimum_version_id = 1,
1145 .needed = fdc_reset_sensei_needed,
1146 .fields = (VMStateField[]) {
1147 VMSTATE_INT32(reset_sensei, FDCtrl),
1148 VMSTATE_END_OF_LIST()
1149 }
1150 };
1151
1152 static bool fdc_result_timer_needed(void *opaque)
1153 {
1154 FDCtrl *s = opaque;
1155
1156 return timer_pending(s->result_timer);
1157 }
1158
1159 static const VMStateDescription vmstate_fdc_result_timer = {
1160 .name = "fdc/result_timer",
1161 .version_id = 1,
1162 .minimum_version_id = 1,
1163 .needed = fdc_result_timer_needed,
1164 .fields = (VMStateField[]) {
1165 VMSTATE_TIMER_PTR(result_timer, FDCtrl),
1166 VMSTATE_END_OF_LIST()
1167 }
1168 };
1169
1170 static bool fdc_phase_needed(void *opaque)
1171 {
1172 FDCtrl *fdctrl = opaque;
1173
1174 return reconstruct_phase(fdctrl) != fdctrl->phase;
1175 }
1176
1177 static const VMStateDescription vmstate_fdc_phase = {
1178 .name = "fdc/phase",
1179 .version_id = 1,
1180 .minimum_version_id = 1,
1181 .needed = fdc_phase_needed,
1182 .fields = (VMStateField[]) {
1183 VMSTATE_UINT8(phase, FDCtrl),
1184 VMSTATE_END_OF_LIST()
1185 }
1186 };
1187
1188 static const VMStateDescription vmstate_fdc = {
1189 .name = "fdc",
1190 .version_id = 2,
1191 .minimum_version_id = 2,
1192 .pre_save = fdc_pre_save,
1193 .pre_load = fdc_pre_load,
1194 .post_load = fdc_post_load,
1195 .fields = (VMStateField[]) {
1196 /* Controller State */
1197 VMSTATE_UINT8(sra, FDCtrl),
1198 VMSTATE_UINT8(srb, FDCtrl),
1199 VMSTATE_UINT8(dor_vmstate, FDCtrl),
1200 VMSTATE_UINT8(tdr, FDCtrl),
1201 VMSTATE_UINT8(dsr, FDCtrl),
1202 VMSTATE_UINT8(msr, FDCtrl),
1203 VMSTATE_UINT8(status0, FDCtrl),
1204 VMSTATE_UINT8(status1, FDCtrl),
1205 VMSTATE_UINT8(status2, FDCtrl),
1206 /* Command FIFO */
1207 VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
1208 uint8_t),
1209 VMSTATE_UINT32(data_pos, FDCtrl),
1210 VMSTATE_UINT32(data_len, FDCtrl),
1211 VMSTATE_UINT8(data_state, FDCtrl),
1212 VMSTATE_UINT8(data_dir, FDCtrl),
1213 VMSTATE_UINT8(eot, FDCtrl),
1214 /* States kept only to be returned back */
1215 VMSTATE_UINT8(timer0, FDCtrl),
1216 VMSTATE_UINT8(timer1, FDCtrl),
1217 VMSTATE_UINT8(precomp_trk, FDCtrl),
1218 VMSTATE_UINT8(config, FDCtrl),
1219 VMSTATE_UINT8(lock, FDCtrl),
1220 VMSTATE_UINT8(pwrd, FDCtrl),
1221 VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl, NULL),
1222 VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
1223 vmstate_fdrive, FDrive),
1224 VMSTATE_END_OF_LIST()
1225 },
1226 .subsections = (const VMStateDescription*[]) {
1227 &vmstate_fdc_reset_sensei,
1228 &vmstate_fdc_result_timer,
1229 &vmstate_fdc_phase,
1230 NULL
1231 }
1232 };
1233
1234 static void fdctrl_external_reset_sysbus(DeviceState *d)
1235 {
1236 FDCtrlSysBus *sys = SYSBUS_FDC(d);
1237 FDCtrl *s = &sys->state;
1238
1239 fdctrl_reset(s, 0);
1240 }
1241
1242 static void fdctrl_external_reset_isa(DeviceState *d)
1243 {
1244 FDCtrlISABus *isa = ISA_FDC(d);
1245 FDCtrl *s = &isa->state;
1246
1247 fdctrl_reset(s, 0);
1248 }
1249
1250 static void fdctrl_handle_tc(void *opaque, int irq, int level)
1251 {
1252 //FDCtrl *s = opaque;
1253
1254 if (level) {
1255 // XXX
1256 FLOPPY_DPRINTF("TC pulsed\n");
1257 }
1258 }
1259
1260 /* Change IRQ state */
1261 static void fdctrl_reset_irq(FDCtrl *fdctrl)
1262 {
1263 fdctrl->status0 = 0;
1264 if (!(fdctrl->sra & FD_SRA_INTPEND))
1265 return;
1266 FLOPPY_DPRINTF("Reset interrupt\n");
1267 qemu_set_irq(fdctrl->irq, 0);
1268 fdctrl->sra &= ~FD_SRA_INTPEND;
1269 }
1270
1271 static void fdctrl_raise_irq(FDCtrl *fdctrl)
1272 {
1273 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
1274 qemu_set_irq(fdctrl->irq, 1);
1275 fdctrl->sra |= FD_SRA_INTPEND;
1276 }
1277
1278 fdctrl->reset_sensei = 0;
1279 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
1280 }
1281
1282 /* Reset controller */
1283 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
1284 {
1285 int i;
1286
1287 FLOPPY_DPRINTF("reset controller\n");
1288 fdctrl_reset_irq(fdctrl);
1289 /* Initialise controller */
1290 fdctrl->sra = 0;
1291 fdctrl->srb = 0xc0;
1292 if (!fdctrl->drives[1].blk) {
1293 fdctrl->sra |= FD_SRA_nDRV2;
1294 }
1295 fdctrl->cur_drv = 0;
1296 fdctrl->dor = FD_DOR_nRESET;
1297 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
1298 fdctrl->msr = FD_MSR_RQM;
1299 fdctrl->reset_sensei = 0;
1300 timer_del(fdctrl->result_timer);
1301 /* FIFO state */
1302 fdctrl->data_pos = 0;
1303 fdctrl->data_len = 0;
1304 fdctrl->data_state = 0;
1305 fdctrl->data_dir = FD_DIR_WRITE;
1306 for (i = 0; i < MAX_FD; i++)
1307 fd_recalibrate(&fdctrl->drives[i]);
1308 fdctrl_to_command_phase(fdctrl);
1309 if (do_irq) {
1310 fdctrl->status0 |= FD_SR0_RDYCHG;
1311 fdctrl_raise_irq(fdctrl);
1312 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
1313 }
1314 }
1315
1316 static inline FDrive *drv0(FDCtrl *fdctrl)
1317 {
1318 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
1319 }
1320
1321 static inline FDrive *drv1(FDCtrl *fdctrl)
1322 {
1323 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
1324 return &fdctrl->drives[1];
1325 else
1326 return &fdctrl->drives[0];
1327 }
1328
1329 #if MAX_FD == 4
1330 static inline FDrive *drv2(FDCtrl *fdctrl)
1331 {
1332 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
1333 return &fdctrl->drives[2];
1334 else
1335 return &fdctrl->drives[1];
1336 }
1337
1338 static inline FDrive *drv3(FDCtrl *fdctrl)
1339 {
1340 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
1341 return &fdctrl->drives[3];
1342 else
1343 return &fdctrl->drives[2];
1344 }
1345 #endif
1346
1347 static FDrive *get_drv(FDCtrl *fdctrl, int unit)
1348 {
1349 switch (unit) {
1350 case 0: return drv0(fdctrl);
1351 case 1: return drv1(fdctrl);
1352 #if MAX_FD == 4
1353 case 2: return drv2(fdctrl);
1354 case 3: return drv3(fdctrl);
1355 #endif
1356 default: return NULL;
1357 }
1358 }
1359
1360 static FDrive *get_cur_drv(FDCtrl *fdctrl)
1361 {
1362 return get_drv(fdctrl, fdctrl->cur_drv);
1363 }
1364
1365 /* Status A register : 0x00 (read-only) */
1366 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
1367 {
1368 uint32_t retval = fdctrl->sra;
1369
1370 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
1371
1372 return retval;
1373 }
1374
1375 /* Status B register : 0x01 (read-only) */
1376 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
1377 {
1378 uint32_t retval = fdctrl->srb;
1379
1380 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
1381
1382 return retval;
1383 }
1384
1385 /* Digital output register : 0x02 */
1386 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
1387 {
1388 uint32_t retval = fdctrl->dor;
1389
1390 /* Selected drive */
1391 retval |= fdctrl->cur_drv;
1392 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
1393
1394 return retval;
1395 }
1396
1397 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
1398 {
1399 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
1400
1401 /* Motors */
1402 if (value & FD_DOR_MOTEN0)
1403 fdctrl->srb |= FD_SRB_MTR0;
1404 else
1405 fdctrl->srb &= ~FD_SRB_MTR0;
1406 if (value & FD_DOR_MOTEN1)
1407 fdctrl->srb |= FD_SRB_MTR1;
1408 else
1409 fdctrl->srb &= ~FD_SRB_MTR1;
1410
1411 /* Drive */
1412 if (value & 1)
1413 fdctrl->srb |= FD_SRB_DR0;
1414 else
1415 fdctrl->srb &= ~FD_SRB_DR0;
1416
1417 /* Reset */
1418 if (!(value & FD_DOR_nRESET)) {
1419 if (fdctrl->dor & FD_DOR_nRESET) {
1420 FLOPPY_DPRINTF("controller enter RESET state\n");
1421 }
1422 } else {
1423 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1424 FLOPPY_DPRINTF("controller out of RESET state\n");
1425 fdctrl_reset(fdctrl, 1);
1426 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1427 }
1428 }
1429 /* Selected drive */
1430 fdctrl->cur_drv = value & FD_DOR_SELMASK;
1431
1432 fdctrl->dor = value;
1433 }
1434
1435 /* Tape drive register : 0x03 */
1436 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
1437 {
1438 uint32_t retval = fdctrl->tdr;
1439
1440 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1441
1442 return retval;
1443 }
1444
1445 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
1446 {
1447 /* Reset mode */
1448 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1449 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1450 return;
1451 }
1452 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1453 /* Disk boot selection indicator */
1454 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1455 /* Tape indicators: never allow */
1456 }
1457
1458 /* Main status register : 0x04 (read) */
1459 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
1460 {
1461 uint32_t retval = fdctrl->msr;
1462
1463 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1464 fdctrl->dor |= FD_DOR_nRESET;
1465
1466 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1467
1468 return retval;
1469 }
1470
1471 /* Data select rate register : 0x04 (write) */
1472 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
1473 {
1474 /* Reset mode */
1475 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1476 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1477 return;
1478 }
1479 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1480 /* Reset: autoclear */
1481 if (value & FD_DSR_SWRESET) {
1482 fdctrl->dor &= ~FD_DOR_nRESET;
1483 fdctrl_reset(fdctrl, 1);
1484 fdctrl->dor |= FD_DOR_nRESET;
1485 }
1486 if (value & FD_DSR_PWRDOWN) {
1487 fdctrl_reset(fdctrl, 1);
1488 }
1489 fdctrl->dsr = value;
1490 }
1491
1492 /* Configuration control register: 0x07 (write) */
1493 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value)
1494 {
1495 /* Reset mode */
1496 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1497 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1498 return;
1499 }
1500 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1501
1502 /* Only the rate selection bits used in AT mode, and we
1503 * store those in the DSR.
1504 */
1505 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) |
1506 (value & FD_DSR_DRATEMASK);
1507 }
1508
1509 static int fdctrl_media_changed(FDrive *drv)
1510 {
1511 return drv->media_changed;
1512 }
1513
1514 /* Digital input register : 0x07 (read-only) */
1515 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
1516 {
1517 uint32_t retval = 0;
1518
1519 if (fdctrl_media_changed(get_cur_drv(fdctrl))) {
1520 retval |= FD_DIR_DSKCHG;
1521 }
1522 if (retval != 0) {
1523 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1524 }
1525
1526 return retval;
1527 }
1528
1529 /* Clear the FIFO and update the state for receiving the next command */
1530 static void fdctrl_to_command_phase(FDCtrl *fdctrl)
1531 {
1532 fdctrl->phase = FD_PHASE_COMMAND;
1533 fdctrl->data_dir = FD_DIR_WRITE;
1534 fdctrl->data_pos = 0;
1535 fdctrl->data_len = 1; /* Accept command byte, adjust for params later */
1536 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1537 fdctrl->msr |= FD_MSR_RQM;
1538 }
1539
1540 /* Update the state to allow the guest to read out the command status.
1541 * @fifo_len is the number of result bytes to be read out. */
1542 static void fdctrl_to_result_phase(FDCtrl *fdctrl, int fifo_len)
1543 {
1544 fdctrl->phase = FD_PHASE_RESULT;
1545 fdctrl->data_dir = FD_DIR_READ;
1546 fdctrl->data_len = fifo_len;
1547 fdctrl->data_pos = 0;
1548 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1549 }
1550
1551 /* Set an error: unimplemented/unknown command */
1552 static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
1553 {
1554 qemu_log_mask(LOG_UNIMP, "fdc: unimplemented command 0x%02x\n",
1555 fdctrl->fifo[0]);
1556 fdctrl->fifo[0] = FD_SR0_INVCMD;
1557 fdctrl_to_result_phase(fdctrl, 1);
1558 }
1559
1560 /* Seek to next sector
1561 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1562 * otherwise returns 1
1563 */
1564 static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
1565 {
1566 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1567 cur_drv->head, cur_drv->track, cur_drv->sect,
1568 fd_sector(cur_drv));
1569 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1570 error in fact */
1571 uint8_t new_head = cur_drv->head;
1572 uint8_t new_track = cur_drv->track;
1573 uint8_t new_sect = cur_drv->sect;
1574
1575 int ret = 1;
1576
1577 if (new_sect >= cur_drv->last_sect ||
1578 new_sect == fdctrl->eot) {
1579 new_sect = 1;
1580 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1581 if (new_head == 0 &&
1582 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1583 new_head = 1;
1584 } else {
1585 new_head = 0;
1586 new_track++;
1587 fdctrl->status0 |= FD_SR0_SEEK;
1588 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0) {
1589 ret = 0;
1590 }
1591 }
1592 } else {
1593 fdctrl->status0 |= FD_SR0_SEEK;
1594 new_track++;
1595 ret = 0;
1596 }
1597 if (ret == 1) {
1598 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1599 new_head, new_track, new_sect, fd_sector(cur_drv));
1600 }
1601 } else {
1602 new_sect++;
1603 }
1604 fd_seek(cur_drv, new_head, new_track, new_sect, 1);
1605 return ret;
1606 }
1607
1608 /* Callback for transfer end (stop or abort) */
1609 static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
1610 uint8_t status1, uint8_t status2)
1611 {
1612 FDrive *cur_drv;
1613 cur_drv = get_cur_drv(fdctrl);
1614
1615 fdctrl->status0 &= ~(FD_SR0_DS0 | FD_SR0_DS1 | FD_SR0_HEAD);
1616 fdctrl->status0 |= GET_CUR_DRV(fdctrl);
1617 if (cur_drv->head) {
1618 fdctrl->status0 |= FD_SR0_HEAD;
1619 }
1620 fdctrl->status0 |= status0;
1621
1622 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1623 status0, status1, status2, fdctrl->status0);
1624 fdctrl->fifo[0] = fdctrl->status0;
1625 fdctrl->fifo[1] = status1;
1626 fdctrl->fifo[2] = status2;
1627 fdctrl->fifo[3] = cur_drv->track;
1628 fdctrl->fifo[4] = cur_drv->head;
1629 fdctrl->fifo[5] = cur_drv->sect;
1630 fdctrl->fifo[6] = FD_SECTOR_SC;
1631 fdctrl->data_dir = FD_DIR_READ;
1632 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1633 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1634 k->release_DREQ(fdctrl->dma, fdctrl->dma_chann);
1635 }
1636 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1637 fdctrl->msr &= ~FD_MSR_NONDMA;
1638
1639 fdctrl_to_result_phase(fdctrl, 7);
1640 fdctrl_raise_irq(fdctrl);
1641 }
1642
1643 /* Prepare a data transfer (either DMA or FIFO) */
1644 static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
1645 {
1646 FDrive *cur_drv;
1647 uint8_t kh, kt, ks;
1648
1649 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1650 cur_drv = get_cur_drv(fdctrl);
1651 kt = fdctrl->fifo[2];
1652 kh = fdctrl->fifo[3];
1653 ks = fdctrl->fifo[4];
1654 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1655 GET_CUR_DRV(fdctrl), kh, kt, ks,
1656 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1657 NUM_SIDES(cur_drv)));
1658 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1659 case 2:
1660 /* sect too big */
1661 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1662 fdctrl->fifo[3] = kt;
1663 fdctrl->fifo[4] = kh;
1664 fdctrl->fifo[5] = ks;
1665 return;
1666 case 3:
1667 /* track too big */
1668 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1669 fdctrl->fifo[3] = kt;
1670 fdctrl->fifo[4] = kh;
1671 fdctrl->fifo[5] = ks;
1672 return;
1673 case 4:
1674 /* No seek enabled */
1675 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1676 fdctrl->fifo[3] = kt;
1677 fdctrl->fifo[4] = kh;
1678 fdctrl->fifo[5] = ks;
1679 return;
1680 case 1:
1681 fdctrl->status0 |= FD_SR0_SEEK;
1682 break;
1683 default:
1684 break;
1685 }
1686
1687 /* Check the data rate. If the programmed data rate does not match
1688 * the currently inserted medium, the operation has to fail. */
1689 if (fdctrl->check_media_rate &&
1690 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1691 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1692 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1693 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1694 fdctrl->fifo[3] = kt;
1695 fdctrl->fifo[4] = kh;
1696 fdctrl->fifo[5] = ks;
1697 return;
1698 }
1699
1700 /* Set the FIFO state */
1701 fdctrl->data_dir = direction;
1702 fdctrl->data_pos = 0;
1703 assert(fdctrl->msr & FD_MSR_CMDBUSY);
1704 if (fdctrl->fifo[0] & 0x80)
1705 fdctrl->data_state |= FD_STATE_MULTI;
1706 else
1707 fdctrl->data_state &= ~FD_STATE_MULTI;
1708 if (fdctrl->fifo[5] == 0) {
1709 fdctrl->data_len = fdctrl->fifo[8];
1710 } else {
1711 int tmp;
1712 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1713 tmp = (fdctrl->fifo[6] - ks + 1);
1714 if (fdctrl->fifo[0] & 0x80)
1715 tmp += fdctrl->fifo[6];
1716 fdctrl->data_len *= tmp;
1717 }
1718 fdctrl->eot = fdctrl->fifo[6];
1719 if (fdctrl->dor & FD_DOR_DMAEN) {
1720 IsaDmaTransferMode dma_mode;
1721 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1722 bool dma_mode_ok;
1723 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1724 dma_mode = k->get_transfer_mode(fdctrl->dma, fdctrl->dma_chann);
1725 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1726 dma_mode, direction,
1727 (128 << fdctrl->fifo[5]) *
1728 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1729 switch (direction) {
1730 case FD_DIR_SCANE:
1731 case FD_DIR_SCANL:
1732 case FD_DIR_SCANH:
1733 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_VERIFY);
1734 break;
1735 case FD_DIR_WRITE:
1736 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_WRITE);
1737 break;
1738 case FD_DIR_READ:
1739 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_READ);
1740 break;
1741 case FD_DIR_VERIFY:
1742 dma_mode_ok = true;
1743 break;
1744 default:
1745 dma_mode_ok = false;
1746 break;
1747 }
1748 if (dma_mode_ok) {
1749 /* No access is allowed until DMA transfer has completed */
1750 fdctrl->msr &= ~FD_MSR_RQM;
1751 if (direction != FD_DIR_VERIFY) {
1752 /* Now, we just have to wait for the DMA controller to
1753 * recall us...
1754 */
1755 k->hold_DREQ(fdctrl->dma, fdctrl->dma_chann);
1756 k->schedule(fdctrl->dma);
1757 } else {
1758 /* Start transfer */
1759 fdctrl_transfer_handler(fdctrl, fdctrl->dma_chann, 0,
1760 fdctrl->data_len);
1761 }
1762 return;
1763 } else {
1764 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode,
1765 direction);
1766 }
1767 }
1768 FLOPPY_DPRINTF("start non-DMA transfer\n");
1769 fdctrl->msr |= FD_MSR_NONDMA | FD_MSR_RQM;
1770 if (direction != FD_DIR_WRITE)
1771 fdctrl->msr |= FD_MSR_DIO;
1772 /* IO based transfer: calculate len */
1773 fdctrl_raise_irq(fdctrl);
1774 }
1775
1776 /* Prepare a transfer of deleted data */
1777 static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
1778 {
1779 qemu_log_mask(LOG_UNIMP, "fdctrl_start_transfer_del() unimplemented\n");
1780
1781 /* We don't handle deleted data,
1782 * so we don't return *ANYTHING*
1783 */
1784 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1785 }
1786
1787 /* handlers for DMA transfers */
1788 static int fdctrl_transfer_handler (void *opaque, int nchan,
1789 int dma_pos, int dma_len)
1790 {
1791 FDCtrl *fdctrl;
1792 FDrive *cur_drv;
1793 int len, start_pos, rel_pos;
1794 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1795 IsaDmaClass *k;
1796
1797 fdctrl = opaque;
1798 if (fdctrl->msr & FD_MSR_RQM) {
1799 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1800 return 0;
1801 }
1802 k = ISADMA_GET_CLASS(fdctrl->dma);
1803 cur_drv = get_cur_drv(fdctrl);
1804 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1805 fdctrl->data_dir == FD_DIR_SCANH)
1806 status2 = FD_SR2_SNS;
1807 if (dma_len > fdctrl->data_len)
1808 dma_len = fdctrl->data_len;
1809 if (cur_drv->blk == NULL) {
1810 if (fdctrl->data_dir == FD_DIR_WRITE)
1811 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1812 else
1813 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1814 len = 0;
1815 goto transfer_error;
1816 }
1817 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1818 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1819 len = dma_len - fdctrl->data_pos;
1820 if (len + rel_pos > FD_SECTOR_LEN)
1821 len = FD_SECTOR_LEN - rel_pos;
1822 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1823 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1824 fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1825 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1826 fd_sector(cur_drv) * FD_SECTOR_LEN);
1827 if (fdctrl->data_dir != FD_DIR_WRITE ||
1828 len < FD_SECTOR_LEN || rel_pos != 0) {
1829 /* READ & SCAN commands and realign to a sector for WRITE */
1830 if (blk_pread(cur_drv->blk, fd_offset(cur_drv),
1831 fdctrl->fifo, BDRV_SECTOR_SIZE) < 0) {
1832 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1833 fd_sector(cur_drv));
1834 /* Sure, image size is too small... */
1835 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1836 }
1837 }
1838 switch (fdctrl->data_dir) {
1839 case FD_DIR_READ:
1840 /* READ commands */
1841 k->write_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1842 fdctrl->data_pos, len);
1843 break;
1844 case FD_DIR_WRITE:
1845 /* WRITE commands */
1846 if (cur_drv->ro) {
1847 /* Handle readonly medium early, no need to do DMA, touch the
1848 * LED or attempt any writes. A real floppy doesn't attempt
1849 * to write to readonly media either. */
1850 fdctrl_stop_transfer(fdctrl,
1851 FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1852 0x00);
1853 goto transfer_error;
1854 }
1855
1856 k->read_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1857 fdctrl->data_pos, len);
1858 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv),
1859 fdctrl->fifo, BDRV_SECTOR_SIZE, 0) < 0) {
1860 FLOPPY_DPRINTF("error writing sector %d\n",
1861 fd_sector(cur_drv));
1862 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1863 goto transfer_error;
1864 }
1865 break;
1866 case FD_DIR_VERIFY:
1867 /* VERIFY commands */
1868 break;
1869 default:
1870 /* SCAN commands */
1871 {
1872 uint8_t tmpbuf[FD_SECTOR_LEN];
1873 int ret;
1874 k->read_memory(fdctrl->dma, nchan, tmpbuf, fdctrl->data_pos,
1875 len);
1876 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1877 if (ret == 0) {
1878 status2 = FD_SR2_SEH;
1879 goto end_transfer;
1880 }
1881 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1882 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1883 status2 = 0x00;
1884 goto end_transfer;
1885 }
1886 }
1887 break;
1888 }
1889 fdctrl->data_pos += len;
1890 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1891 if (rel_pos == 0) {
1892 /* Seek to next sector */
1893 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1894 break;
1895 }
1896 }
1897 end_transfer:
1898 len = fdctrl->data_pos - start_pos;
1899 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1900 fdctrl->data_pos, len, fdctrl->data_len);
1901 if (fdctrl->data_dir == FD_DIR_SCANE ||
1902 fdctrl->data_dir == FD_DIR_SCANL ||
1903 fdctrl->data_dir == FD_DIR_SCANH)
1904 status2 = FD_SR2_SEH;
1905 fdctrl->data_len -= len;
1906 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1907 transfer_error:
1908
1909 return len;
1910 }
1911
1912 /* Data register : 0x05 */
1913 static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
1914 {
1915 FDrive *cur_drv;
1916 uint32_t retval = 0;
1917 uint32_t pos;
1918
1919 cur_drv = get_cur_drv(fdctrl);
1920 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1921 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1922 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1923 return 0;
1924 }
1925
1926 /* If data_len spans multiple sectors, the current position in the FIFO
1927 * wraps around while fdctrl->data_pos is the real position in the whole
1928 * request. */
1929 pos = fdctrl->data_pos;
1930 pos %= FD_SECTOR_LEN;
1931
1932 switch (fdctrl->phase) {
1933 case FD_PHASE_EXECUTION:
1934 assert(fdctrl->msr & FD_MSR_NONDMA);
1935 if (pos == 0) {
1936 if (fdctrl->data_pos != 0)
1937 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1938 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1939 fd_sector(cur_drv));
1940 return 0;
1941 }
1942 if (blk_pread(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
1943 BDRV_SECTOR_SIZE)
1944 < 0) {
1945 FLOPPY_DPRINTF("error getting sector %d\n",
1946 fd_sector(cur_drv));
1947 /* Sure, image size is too small... */
1948 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1949 }
1950 }
1951
1952 if (++fdctrl->data_pos == fdctrl->data_len) {
1953 fdctrl->msr &= ~FD_MSR_RQM;
1954 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1955 }
1956 break;
1957
1958 case FD_PHASE_RESULT:
1959 assert(!(fdctrl->msr & FD_MSR_NONDMA));
1960 if (++fdctrl->data_pos == fdctrl->data_len) {
1961 fdctrl->msr &= ~FD_MSR_RQM;
1962 fdctrl_to_command_phase(fdctrl);
1963 fdctrl_reset_irq(fdctrl);
1964 }
1965 break;
1966
1967 case FD_PHASE_COMMAND:
1968 default:
1969 abort();
1970 }
1971
1972 retval = fdctrl->fifo[pos];
1973 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1974
1975 return retval;
1976 }
1977
1978 static void fdctrl_format_sector(FDCtrl *fdctrl)
1979 {
1980 FDrive *cur_drv;
1981 uint8_t kh, kt, ks;
1982
1983 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1984 cur_drv = get_cur_drv(fdctrl);
1985 kt = fdctrl->fifo[6];
1986 kh = fdctrl->fifo[7];
1987 ks = fdctrl->fifo[8];
1988 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1989 GET_CUR_DRV(fdctrl), kh, kt, ks,
1990 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1991 NUM_SIDES(cur_drv)));
1992 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1993 case 2:
1994 /* sect too big */
1995 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1996 fdctrl->fifo[3] = kt;
1997 fdctrl->fifo[4] = kh;
1998 fdctrl->fifo[5] = ks;
1999 return;
2000 case 3:
2001 /* track too big */
2002 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
2003 fdctrl->fifo[3] = kt;
2004 fdctrl->fifo[4] = kh;
2005 fdctrl->fifo[5] = ks;
2006 return;
2007 case 4:
2008 /* No seek enabled */
2009 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2010 fdctrl->fifo[3] = kt;
2011 fdctrl->fifo[4] = kh;
2012 fdctrl->fifo[5] = ks;
2013 return;
2014 case 1:
2015 fdctrl->status0 |= FD_SR0_SEEK;
2016 break;
2017 default:
2018 break;
2019 }
2020 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
2021 if (cur_drv->blk == NULL ||
2022 blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
2023 BDRV_SECTOR_SIZE, 0) < 0) {
2024 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv));
2025 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2026 } else {
2027 if (cur_drv->sect == cur_drv->last_sect) {
2028 fdctrl->data_state &= ~FD_STATE_FORMAT;
2029 /* Last sector done */
2030 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2031 } else {
2032 /* More to do */
2033 fdctrl->data_pos = 0;
2034 fdctrl->data_len = 4;
2035 }
2036 }
2037 }
2038
2039 static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
2040 {
2041 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
2042 fdctrl->fifo[0] = fdctrl->lock << 4;
2043 fdctrl_to_result_phase(fdctrl, 1);
2044 }
2045
2046 static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
2047 {
2048 FDrive *cur_drv = get_cur_drv(fdctrl);
2049
2050 /* Drives position */
2051 fdctrl->fifo[0] = drv0(fdctrl)->track;
2052 fdctrl->fifo[1] = drv1(fdctrl)->track;
2053 #if MAX_FD == 4
2054 fdctrl->fifo[2] = drv2(fdctrl)->track;
2055 fdctrl->fifo[3] = drv3(fdctrl)->track;
2056 #else
2057 fdctrl->fifo[2] = 0;
2058 fdctrl->fifo[3] = 0;
2059 #endif
2060 /* timers */
2061 fdctrl->fifo[4] = fdctrl->timer0;
2062 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
2063 fdctrl->fifo[6] = cur_drv->last_sect;
2064 fdctrl->fifo[7] = (fdctrl->lock << 7) |
2065 (cur_drv->perpendicular << 2);
2066 fdctrl->fifo[8] = fdctrl->config;
2067 fdctrl->fifo[9] = fdctrl->precomp_trk;
2068 fdctrl_to_result_phase(fdctrl, 10);
2069 }
2070
2071 static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
2072 {
2073 /* Controller's version */
2074 fdctrl->fifo[0] = fdctrl->version;
2075 fdctrl_to_result_phase(fdctrl, 1);
2076 }
2077
2078 static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
2079 {
2080 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
2081 fdctrl_to_result_phase(fdctrl, 1);
2082 }
2083
2084 static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
2085 {
2086 FDrive *cur_drv = get_cur_drv(fdctrl);
2087
2088 /* Drives position */
2089 drv0(fdctrl)->track = fdctrl->fifo[3];
2090 drv1(fdctrl)->track = fdctrl->fifo[4];
2091 #if MAX_FD == 4
2092 drv2(fdctrl)->track = fdctrl->fifo[5];
2093 drv3(fdctrl)->track = fdctrl->fifo[6];
2094 #endif
2095 /* timers */
2096 fdctrl->timer0 = fdctrl->fifo[7];
2097 fdctrl->timer1 = fdctrl->fifo[8];
2098 cur_drv->last_sect = fdctrl->fifo[9];
2099 fdctrl->lock = fdctrl->fifo[10] >> 7;
2100 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
2101 fdctrl->config = fdctrl->fifo[11];
2102 fdctrl->precomp_trk = fdctrl->fifo[12];
2103 fdctrl->pwrd = fdctrl->fifo[13];
2104 fdctrl_to_command_phase(fdctrl);
2105 }
2106
2107 static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
2108 {
2109 FDrive *cur_drv = get_cur_drv(fdctrl);
2110
2111 fdctrl->fifo[0] = 0;
2112 fdctrl->fifo[1] = 0;
2113 /* Drives position */
2114 fdctrl->fifo[2] = drv0(fdctrl)->track;
2115 fdctrl->fifo[3] = drv1(fdctrl)->track;
2116 #if MAX_FD == 4
2117 fdctrl->fifo[4] = drv2(fdctrl)->track;
2118 fdctrl->fifo[5] = drv3(fdctrl)->track;
2119 #else
2120 fdctrl->fifo[4] = 0;
2121 fdctrl->fifo[5] = 0;
2122 #endif
2123 /* timers */
2124 fdctrl->fifo[6] = fdctrl->timer0;
2125 fdctrl->fifo[7] = fdctrl->timer1;
2126 fdctrl->fifo[8] = cur_drv->last_sect;
2127 fdctrl->fifo[9] = (fdctrl->lock << 7) |
2128 (cur_drv->perpendicular << 2);
2129 fdctrl->fifo[10] = fdctrl->config;
2130 fdctrl->fifo[11] = fdctrl->precomp_trk;
2131 fdctrl->fifo[12] = fdctrl->pwrd;
2132 fdctrl->fifo[13] = 0;
2133 fdctrl->fifo[14] = 0;
2134 fdctrl_to_result_phase(fdctrl, 15);
2135 }
2136
2137 static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
2138 {
2139 FDrive *cur_drv = get_cur_drv(fdctrl);
2140
2141 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2142 timer_mod(fdctrl->result_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
2143 (NANOSECONDS_PER_SECOND / 50));
2144 }
2145
2146 static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
2147 {
2148 FDrive *cur_drv;
2149
2150 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2151 cur_drv = get_cur_drv(fdctrl);
2152 fdctrl->data_state |= FD_STATE_FORMAT;
2153 if (fdctrl->fifo[0] & 0x80)
2154 fdctrl->data_state |= FD_STATE_MULTI;
2155 else
2156 fdctrl->data_state &= ~FD_STATE_MULTI;
2157 cur_drv->bps =
2158 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
2159 #if 0
2160 cur_drv->last_sect =
2161 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
2162 fdctrl->fifo[3] / 2;
2163 #else
2164 cur_drv->last_sect = fdctrl->fifo[3];
2165 #endif
2166 /* TODO: implement format using DMA expected by the Bochs BIOS
2167 * and Linux fdformat (read 3 bytes per sector via DMA and fill
2168 * the sector with the specified fill byte
2169 */
2170 fdctrl->data_state &= ~FD_STATE_FORMAT;
2171 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2172 }
2173
2174 static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
2175 {
2176 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
2177 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
2178 if (fdctrl->fifo[2] & 1)
2179 fdctrl->dor &= ~FD_DOR_DMAEN;
2180 else
2181 fdctrl->dor |= FD_DOR_DMAEN;
2182 /* No result back */
2183 fdctrl_to_command_phase(fdctrl);
2184 }
2185
2186 static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
2187 {
2188 FDrive *cur_drv;
2189
2190 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2191 cur_drv = get_cur_drv(fdctrl);
2192 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2193 /* 1 Byte status back */
2194 fdctrl->fifo[0] = (cur_drv->ro << 6) |
2195 (cur_drv->track == 0 ? 0x10 : 0x00) |
2196 (cur_drv->head << 2) |
2197 GET_CUR_DRV(fdctrl) |
2198 0x28;
2199 fdctrl_to_result_phase(fdctrl, 1);
2200 }
2201
2202 static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
2203 {
2204 FDrive *cur_drv;
2205
2206 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2207 cur_drv = get_cur_drv(fdctrl);
2208 fd_recalibrate(cur_drv);
2209 fdctrl_to_command_phase(fdctrl);
2210 /* Raise Interrupt */
2211 fdctrl->status0 |= FD_SR0_SEEK;
2212 fdctrl_raise_irq(fdctrl);
2213 }
2214
2215 static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
2216 {
2217 FDrive *cur_drv = get_cur_drv(fdctrl);
2218
2219 if (fdctrl->reset_sensei > 0) {
2220 fdctrl->fifo[0] =
2221 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
2222 fdctrl->reset_sensei--;
2223 } else if (!(fdctrl->sra & FD_SRA_INTPEND)) {
2224 fdctrl->fifo[0] = FD_SR0_INVCMD;
2225 fdctrl_to_result_phase(fdctrl, 1);
2226 return;
2227 } else {
2228 fdctrl->fifo[0] =
2229 (fdctrl->status0 & ~(FD_SR0_HEAD | FD_SR0_DS1 | FD_SR0_DS0))
2230 | GET_CUR_DRV(fdctrl);
2231 }
2232
2233 fdctrl->fifo[1] = cur_drv->track;
2234 fdctrl_to_result_phase(fdctrl, 2);
2235 fdctrl_reset_irq(fdctrl);
2236 fdctrl->status0 = FD_SR0_RDYCHG;
2237 }
2238
2239 static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
2240 {
2241 FDrive *cur_drv;
2242
2243 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2244 cur_drv = get_cur_drv(fdctrl);
2245 fdctrl_to_command_phase(fdctrl);
2246 /* The seek command just sends step pulses to the drive and doesn't care if
2247 * there is a medium inserted of if it's banging the head against the drive.
2248 */
2249 fd_seek(cur_drv, cur_drv->head, fdctrl->fifo[2], cur_drv->sect, 1);
2250 /* Raise Interrupt */
2251 fdctrl->status0 |= FD_SR0_SEEK;
2252 fdctrl_raise_irq(fdctrl);
2253 }
2254
2255 static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
2256 {
2257 FDrive *cur_drv = get_cur_drv(fdctrl);
2258
2259 if (fdctrl->fifo[1] & 0x80)
2260 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2261 /* No result back */
2262 fdctrl_to_command_phase(fdctrl);
2263 }
2264
2265 static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
2266 {
2267 fdctrl->config = fdctrl->fifo[2];
2268 fdctrl->precomp_trk = fdctrl->fifo[3];
2269 /* No result back */
2270 fdctrl_to_command_phase(fdctrl);
2271 }
2272
2273 static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
2274 {
2275 fdctrl->pwrd = fdctrl->fifo[1];
2276 fdctrl->fifo[0] = fdctrl->fifo[1];
2277 fdctrl_to_result_phase(fdctrl, 1);
2278 }
2279
2280 static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
2281 {
2282 /* No result back */
2283 fdctrl_to_command_phase(fdctrl);
2284 }
2285
2286 static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
2287 {
2288 FDrive *cur_drv = get_cur_drv(fdctrl);
2289 uint32_t pos;
2290
2291 pos = fdctrl->data_pos - 1;
2292 pos %= FD_SECTOR_LEN;
2293 if (fdctrl->fifo[pos] & 0x80) {
2294 /* Command parameters done */
2295 if (fdctrl->fifo[pos] & 0x40) {
2296 fdctrl->fifo[0] = fdctrl->fifo[1];
2297 fdctrl->fifo[2] = 0;
2298 fdctrl->fifo[3] = 0;
2299 fdctrl_to_result_phase(fdctrl, 4);
2300 } else {
2301 fdctrl_to_command_phase(fdctrl);
2302 }
2303 } else if (fdctrl->data_len > 7) {
2304 /* ERROR */
2305 fdctrl->fifo[0] = 0x80 |
2306 (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2307 fdctrl_to_result_phase(fdctrl, 1);
2308 }
2309 }
2310
2311 static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
2312 {
2313 FDrive *cur_drv;
2314
2315 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2316 cur_drv = get_cur_drv(fdctrl);
2317 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2318 fd_seek(cur_drv, cur_drv->head, cur_drv->max_track - 1,
2319 cur_drv->sect, 1);
2320 } else {
2321 fd_seek(cur_drv, cur_drv->head,
2322 cur_drv->track + fdctrl->fifo[2], cur_drv->sect, 1);
2323 }
2324 fdctrl_to_command_phase(fdctrl);
2325 /* Raise Interrupt */
2326 fdctrl->status0 |= FD_SR0_SEEK;
2327 fdctrl_raise_irq(fdctrl);
2328 }
2329
2330 static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
2331 {
2332 FDrive *cur_drv;
2333
2334 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2335 cur_drv = get_cur_drv(fdctrl);
2336 if (fdctrl->fifo[2] > cur_drv->track) {
2337 fd_seek(cur_drv, cur_drv->head, 0, cur_drv->sect, 1);
2338 } else {
2339 fd_seek(cur_drv, cur_drv->head,
2340 cur_drv->track - fdctrl->fifo[2], cur_drv->sect, 1);
2341 }
2342 fdctrl_to_command_phase(fdctrl);
2343 /* Raise Interrupt */
2344 fdctrl->status0 |= FD_SR0_SEEK;
2345 fdctrl_raise_irq(fdctrl);
2346 }
2347
2348 /*
2349 * Handlers for the execution phase of each command
2350 */
2351 typedef struct FDCtrlCommand {
2352 uint8_t value;
2353 uint8_t mask;
2354 const char* name;
2355 int parameters;
2356 void (*handler)(FDCtrl *fdctrl, int direction);
2357 int direction;
2358 } FDCtrlCommand;
2359
2360 static const FDCtrlCommand handlers[] = {
2361 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2362 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2363 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2364 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2365 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2366 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2367 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2368 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2369 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2370 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2371 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2372 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_start_transfer, FD_DIR_VERIFY },
2373 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2374 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2375 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2376 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2377 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2378 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2379 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2380 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2381 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2382 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2383 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
2384 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2385 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2386 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2387 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2388 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2389 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2390 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2391 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2392 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2393 };
2394 /* Associate command to an index in the 'handlers' array */
2395 static uint8_t command_to_handler[256];
2396
2397 static const FDCtrlCommand *get_command(uint8_t cmd)
2398 {
2399 int idx;
2400
2401 idx = command_to_handler[cmd];
2402 FLOPPY_DPRINTF("%s command\n", handlers[idx].name);
2403 return &handlers[idx];
2404 }
2405
2406 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
2407 {
2408 FDrive *cur_drv;
2409 const FDCtrlCommand *cmd;
2410 uint32_t pos;
2411
2412 /* Reset mode */
2413 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2414 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2415 return;
2416 }
2417 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2418 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2419 return;
2420 }
2421 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2422
2423 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
2424
2425 /* If data_len spans multiple sectors, the current position in the FIFO
2426 * wraps around while fdctrl->data_pos is the real position in the whole
2427 * request. */
2428 pos = fdctrl->data_pos++;
2429 pos %= FD_SECTOR_LEN;
2430 fdctrl->fifo[pos] = value;
2431
2432 if (fdctrl->data_pos == fdctrl->data_len) {
2433 fdctrl->msr &= ~FD_MSR_RQM;
2434 }
2435
2436 switch (fdctrl->phase) {
2437 case FD_PHASE_EXECUTION:
2438 /* For DMA requests, RQM should be cleared during execution phase, so
2439 * we would have errored out above. */
2440 assert(fdctrl->msr & FD_MSR_NONDMA);
2441
2442 /* FIFO data write */
2443 if (pos == FD_SECTOR_LEN - 1 ||
2444 fdctrl->data_pos == fdctrl->data_len) {
2445 cur_drv = get_cur_drv(fdctrl);
2446 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
2447 BDRV_SECTOR_SIZE, 0) < 0) {
2448 FLOPPY_DPRINTF("error writing sector %d\n",
2449 fd_sector(cur_drv));
2450 break;
2451 }
2452 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
2453 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2454 fd_sector(cur_drv));
2455 break;
2456 }
2457 }
2458
2459 /* Switch to result phase when done with the transfer */
2460 if (fdctrl->data_pos == fdctrl->data_len) {
2461 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2462 }
2463 break;
2464
2465 case FD_PHASE_COMMAND:
2466 assert(!(fdctrl->msr & FD_MSR_NONDMA));
2467 assert(fdctrl->data_pos < FD_SECTOR_LEN);
2468
2469 if (pos == 0) {
2470 /* The first byte specifies the command. Now we start reading
2471 * as many parameters as this command requires. */
2472 cmd = get_command(value);
2473 fdctrl->data_len = cmd->parameters + 1;
2474 if (cmd->parameters) {
2475 fdctrl->msr |= FD_MSR_RQM;
2476 }
2477 fdctrl->msr |= FD_MSR_CMDBUSY;
2478 }
2479
2480 if (fdctrl->data_pos == fdctrl->data_len) {
2481 /* We have all parameters now, execute the command */
2482 fdctrl->phase = FD_PHASE_EXECUTION;
2483
2484 if (fdctrl->data_state & FD_STATE_FORMAT) {
2485 fdctrl_format_sector(fdctrl);
2486 break;
2487 }
2488
2489 cmd = get_command(fdctrl->fifo[0]);
2490 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd->name);
2491 cmd->handler(fdctrl, cmd->direction);
2492 }
2493 break;
2494
2495 case FD_PHASE_RESULT:
2496 default:
2497 abort();
2498 }
2499 }
2500
2501 static void fdctrl_result_timer(void *opaque)
2502 {
2503 FDCtrl *fdctrl = opaque;
2504 FDrive *cur_drv = get_cur_drv(fdctrl);
2505
2506 /* Pretend we are spinning.
2507 * This is needed for Coherent, which uses READ ID to check for
2508 * sector interleaving.
2509 */
2510 if (cur_drv->last_sect != 0) {
2511 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2512 }
2513 /* READ_ID can't automatically succeed! */
2514 if (fdctrl->check_media_rate &&
2515 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2516 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2517 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2518 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
2519 } else {
2520 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2521 }
2522 }
2523
2524 /* Init functions */
2525 static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev,
2526 Error **errp)
2527 {
2528 unsigned int i;
2529 FDrive *drive;
2530 DeviceState *dev;
2531 BlockBackend *blk;
2532 Error *local_err = NULL;
2533
2534 for (i = 0; i < MAX_FD; i++) {
2535 drive = &fdctrl->drives[i];
2536 drive->fdctrl = fdctrl;
2537
2538 /* If the drive is not present, we skip creating the qdev device, but
2539 * still have to initialise the controller. */
2540 blk = fdctrl->qdev_for_drives[i].blk;
2541 if (!blk) {
2542 fd_init(drive);
2543 fd_revalidate(drive);
2544 continue;
2545 }
2546
2547 dev = qdev_create(&fdctrl->bus.bus, "floppy");
2548 qdev_prop_set_uint32(dev, "unit", i);
2549 qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].type);
2550
2551 blk_ref(blk);
2552 blk_detach_dev(blk, fdc_dev);
2553 fdctrl->qdev_for_drives[i].blk = NULL;
2554 qdev_prop_set_drive(dev, "drive", blk, &local_err);
2555 blk_unref(blk);
2556
2557 if (local_err) {
2558 error_propagate(errp, local_err);
2559 return;
2560 }
2561
2562 object_property_set_bool(OBJECT(dev), true, "realized", &local_err);
2563 if (local_err) {
2564 error_propagate(errp, local_err);
2565 return;
2566 }
2567 }
2568 }
2569
2570 ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds)
2571 {
2572 DeviceState *dev;
2573 ISADevice *isadev;
2574
2575 isadev = isa_try_create(bus, TYPE_ISA_FDC);
2576 if (!isadev) {
2577 return NULL;
2578 }
2579 dev = DEVICE(isadev);
2580
2581 if (fds[0]) {
2582 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]),
2583 &error_fatal);
2584 }
2585 if (fds[1]) {
2586 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]),
2587 &error_fatal);
2588 }
2589 qdev_init_nofail(dev);
2590
2591 return isadev;
2592 }
2593
2594 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
2595 hwaddr mmio_base, DriveInfo **fds)
2596 {
2597 FDCtrl *fdctrl;
2598 DeviceState *dev;
2599 SysBusDevice *sbd;
2600 FDCtrlSysBus *sys;
2601
2602 dev = qdev_create(NULL, "sysbus-fdc");
2603 sys = SYSBUS_FDC(dev);
2604 fdctrl = &sys->state;
2605 fdctrl->dma_chann = dma_chann; /* FIXME */
2606 if (fds[0]) {
2607 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]),
2608 &error_fatal);
2609 }
2610 if (fds[1]) {
2611 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]),
2612 &error_fatal);
2613 }
2614 qdev_init_nofail(dev);
2615 sbd = SYS_BUS_DEVICE(dev);
2616 sysbus_connect_irq(sbd, 0, irq);
2617 sysbus_mmio_map(sbd, 0, mmio_base);
2618 }
2619
2620 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
2621 DriveInfo **fds, qemu_irq *fdc_tc)
2622 {
2623 DeviceState *dev;
2624 FDCtrlSysBus *sys;
2625
2626 dev = qdev_create(NULL, "SUNW,fdtwo");
2627 if (fds[0]) {
2628 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]),
2629 &error_fatal);
2630 }
2631 qdev_init_nofail(dev);
2632 sys = SYSBUS_FDC(dev);
2633 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
2634 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
2635 *fdc_tc = qdev_get_gpio_in(dev, 0);
2636 }
2637
2638 static void fdctrl_realize_common(DeviceState *dev, FDCtrl *fdctrl,
2639 Error **errp)
2640 {
2641 int i, j;
2642 static int command_tables_inited = 0;
2643
2644 if (fdctrl->fallback == FLOPPY_DRIVE_TYPE_AUTO) {
2645 error_setg(errp, "Cannot choose a fallback FDrive type of 'auto'");
2646 }
2647
2648 /* Fill 'command_to_handler' lookup table */
2649 if (!command_tables_inited) {
2650 command_tables_inited = 1;
2651 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
2652 for (j = 0; j < sizeof(command_to_handler); j++) {
2653 if ((j & handlers[i].mask) == handlers[i].value) {
2654 command_to_handler[j] = i;
2655 }
2656 }
2657 }
2658 }
2659
2660 FLOPPY_DPRINTF("init controller\n");
2661 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
2662 fdctrl->fifo_size = 512;
2663 fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
2664 fdctrl_result_timer, fdctrl);
2665
2666 fdctrl->version = 0x90; /* Intel 82078 controller */
2667 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2668 fdctrl->num_floppies = MAX_FD;
2669
2670 if (fdctrl->dma_chann != -1) {
2671 IsaDmaClass *k;
2672 assert(fdctrl->dma);
2673 k = ISADMA_GET_CLASS(fdctrl->dma);
2674 k->register_channel(fdctrl->dma, fdctrl->dma_chann,
2675 &fdctrl_transfer_handler, fdctrl);
2676 }
2677
2678 floppy_bus_create(fdctrl, &fdctrl->bus, dev);
2679 fdctrl_connect_drives(fdctrl, dev, errp);
2680 }
2681
2682 static const MemoryRegionPortio fdc_portio_list[] = {
2683 { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
2684 { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write },
2685 PORTIO_END_OF_LIST(),
2686 };
2687
2688 static void isabus_fdc_realize(DeviceState *dev, Error **errp)
2689 {
2690 ISADevice *isadev = ISA_DEVICE(dev);
2691 FDCtrlISABus *isa = ISA_FDC(dev);
2692 FDCtrl *fdctrl = &isa->state;
2693 Error *err = NULL;
2694
2695 isa_register_portio_list(isadev, &fdctrl->portio_list,
2696 isa->iobase, fdc_portio_list, fdctrl,
2697 "fdc");
2698
2699 isa_init_irq(isadev, &fdctrl->irq, isa->irq);
2700 fdctrl->dma_chann = isa->dma;
2701 if (fdctrl->dma_chann != -1) {
2702 fdctrl->dma = isa_get_dma(isa_bus_from_device(isadev), isa->dma);
2703 assert(fdctrl->dma);
2704 }
2705
2706 qdev_set_legacy_instance_id(dev, isa->iobase, 2);
2707 fdctrl_realize_common(dev, fdctrl, &err);
2708 if (err != NULL) {
2709 error_propagate(errp, err);
2710 return;
2711 }
2712 }
2713
2714 static void sysbus_fdc_initfn(Object *obj)
2715 {
2716 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2717 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2718 FDCtrl *fdctrl = &sys->state;
2719
2720 fdctrl->dma_chann = -1;
2721
2722 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_ops, fdctrl,
2723 "fdc", 0x08);
2724 sysbus_init_mmio(sbd, &fdctrl->iomem);
2725 }
2726
2727 static void sun4m_fdc_initfn(Object *obj)
2728 {
2729 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2730 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2731 FDCtrl *fdctrl = &sys->state;
2732
2733 fdctrl->dma_chann = -1;
2734
2735 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_strict_ops,
2736 fdctrl, "fdctrl", 0x08);
2737 sysbus_init_mmio(sbd, &fdctrl->iomem);
2738 }
2739
2740 static void sysbus_fdc_common_initfn(Object *obj)
2741 {
2742 DeviceState *dev = DEVICE(obj);
2743 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
2744 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2745 FDCtrl *fdctrl = &sys->state;
2746
2747 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
2748
2749 sysbus_init_irq(sbd, &fdctrl->irq);
2750 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
2751 }
2752
2753 static void sysbus_fdc_common_realize(DeviceState *dev, Error **errp)
2754 {
2755 FDCtrlSysBus *sys = SYSBUS_FDC(dev);
2756 FDCtrl *fdctrl = &sys->state;
2757
2758 fdctrl_realize_common(dev, fdctrl, errp);
2759 }
2760
2761 FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i)
2762 {
2763 FDCtrlISABus *isa = ISA_FDC(fdc);
2764
2765 return isa->state.drives[i].drive;
2766 }
2767
2768 void isa_fdc_get_drive_max_chs(FloppyDriveType type,
2769 uint8_t *maxc, uint8_t *maxh, uint8_t *maxs)
2770 {
2771 const FDFormat *fdf;
2772
2773 *maxc = *maxh = *maxs = 0;
2774 for (fdf = fd_formats; fdf->drive != FLOPPY_DRIVE_TYPE_NONE; fdf++) {
2775 if (fdf->drive != type) {
2776 continue;
2777 }
2778 if (*maxc < fdf->max_track) {
2779 *maxc = fdf->max_track;
2780 }
2781 if (*maxh < fdf->max_head) {
2782 *maxh = fdf->max_head;
2783 }
2784 if (*maxs < fdf->last_sect) {
2785 *maxs = fdf->last_sect;
2786 }
2787 }
2788 (*maxc)--;
2789 }
2790
2791 static const VMStateDescription vmstate_isa_fdc ={
2792 .name = "fdc",
2793 .version_id = 2,
2794 .minimum_version_id = 2,
2795 .fields = (VMStateField[]) {
2796 VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
2797 VMSTATE_END_OF_LIST()
2798 }
2799 };
2800
2801 static Property isa_fdc_properties[] = {
2802 DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0),
2803 DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
2804 DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
2805 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.qdev_for_drives[0].blk),
2806 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.qdev_for_drives[1].blk),
2807 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus, state.check_media_rate,
2808 0, true),
2809 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlISABus, state.qdev_for_drives[0].type,
2810 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2811 FloppyDriveType),
2812 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlISABus, state.qdev_for_drives[1].type,
2813 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2814 FloppyDriveType),
2815 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2816 FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type,
2817 FloppyDriveType),
2818 DEFINE_PROP_END_OF_LIST(),
2819 };
2820
2821 static void isabus_fdc_class_init(ObjectClass *klass, void *data)
2822 {
2823 DeviceClass *dc = DEVICE_CLASS(klass);
2824
2825 dc->realize = isabus_fdc_realize;
2826 dc->fw_name = "fdc";
2827 dc->reset = fdctrl_external_reset_isa;
2828 dc->vmsd = &vmstate_isa_fdc;
2829 dc->props = isa_fdc_properties;
2830 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2831 }
2832
2833 static void isabus_fdc_instance_init(Object *obj)
2834 {
2835 FDCtrlISABus *isa = ISA_FDC(obj);
2836
2837 device_add_bootindex_property(obj, &isa->bootindexA,
2838 "bootindexA", "/floppy@0",
2839 DEVICE(obj), NULL);
2840 device_add_bootindex_property(obj, &isa->bootindexB,
2841 "bootindexB", "/floppy@1",
2842 DEVICE(obj), NULL);
2843 }
2844
2845 static const TypeInfo isa_fdc_info = {
2846 .name = TYPE_ISA_FDC,
2847 .parent = TYPE_ISA_DEVICE,
2848 .instance_size = sizeof(FDCtrlISABus),
2849 .class_init = isabus_fdc_class_init,
2850 .instance_init = isabus_fdc_instance_init,
2851 };
2852
2853 static const VMStateDescription vmstate_sysbus_fdc ={
2854 .name = "fdc",
2855 .version_id = 2,
2856 .minimum_version_id = 2,
2857 .fields = (VMStateField[]) {
2858 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
2859 VMSTATE_END_OF_LIST()
2860 }
2861 };
2862
2863 static Property sysbus_fdc_properties[] = {
2864 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2865 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.qdev_for_drives[1].blk),
2866 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
2867 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2868 FloppyDriveType),
2869 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
2870 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2871 FloppyDriveType),
2872 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2873 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2874 FloppyDriveType),
2875 DEFINE_PROP_END_OF_LIST(),
2876 };
2877
2878 static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
2879 {
2880 DeviceClass *dc = DEVICE_CLASS(klass);
2881
2882 dc->props = sysbus_fdc_properties;
2883 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2884 }
2885
2886 static const TypeInfo sysbus_fdc_info = {
2887 .name = "sysbus-fdc",
2888 .parent = TYPE_SYSBUS_FDC,
2889 .instance_init = sysbus_fdc_initfn,
2890 .class_init = sysbus_fdc_class_init,
2891 };
2892
2893 static Property sun4m_fdc_properties[] = {
2894 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2895 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
2896 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2897 FloppyDriveType),
2898 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2899 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2900 FloppyDriveType),
2901 DEFINE_PROP_END_OF_LIST(),
2902 };
2903
2904 static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
2905 {
2906 DeviceClass *dc = DEVICE_CLASS(klass);
2907
2908 dc->props = sun4m_fdc_properties;
2909 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2910 }
2911
2912 static const TypeInfo sun4m_fdc_info = {
2913 .name = "SUNW,fdtwo",
2914 .parent = TYPE_SYSBUS_FDC,
2915 .instance_init = sun4m_fdc_initfn,
2916 .class_init = sun4m_fdc_class_init,
2917 };
2918
2919 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
2920 {
2921 DeviceClass *dc = DEVICE_CLASS(klass);
2922
2923 dc->realize = sysbus_fdc_common_realize;
2924 dc->reset = fdctrl_external_reset_sysbus;
2925 dc->vmsd = &vmstate_sysbus_fdc;
2926 }
2927
2928 static const TypeInfo sysbus_fdc_type_info = {
2929 .name = TYPE_SYSBUS_FDC,
2930 .parent = TYPE_SYS_BUS_DEVICE,
2931 .instance_size = sizeof(FDCtrlSysBus),
2932 .instance_init = sysbus_fdc_common_initfn,
2933 .abstract = true,
2934 .class_init = sysbus_fdc_common_class_init,
2935 };
2936
2937 static void fdc_register_types(void)
2938 {
2939 type_register_static(&isa_fdc_info);
2940 type_register_static(&sysbus_fdc_type_info);
2941 type_register_static(&sysbus_fdc_info);
2942 type_register_static(&sun4m_fdc_info);
2943 type_register_static(&floppy_bus_info);
2944 type_register_static(&floppy_drive_info);
2945 }
2946
2947 type_init(fdc_register_types)
AR7 emulation for QEMU