hw/acpi/ich9.c

   1 /*
   2  * ACPI implementation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6  *                    VA Linux Systems Japan K.K.
   7  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   8  *
   9  * This is based on acpi.c.
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2.1 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26
  27 #include "qemu/osdep.h"
  28 #include "qapi/error.h"
  29 #include "qapi/visitor.h"
  30 #include "hw/pci/pci.h"
  31 #include "migration/vmstate.h"
  32 #include "qemu/timer.h"
  33 #include "hw/core/cpu.h"
  34 #include "sysemu/reset.h"
  35 #include "sysemu/runstate.h"
  36 #include "hw/acpi/acpi.h"
  37 #include "hw/acpi/tco.h"
  38
  39 #include "hw/i386/ich9.h"
  40 #include "hw/mem/pc-dimm.h"
  41 #include "hw/mem/nvdimm.h"
  42
  43 //#define DEBUG
  44
  45 #ifdef DEBUG
  46 #define ICH9_DEBUG(fmt, ...) \
  47 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
  48 #else
  49 #define ICH9_DEBUG(fmt, ...)    do { } while (0)
  50 #endif
  51
  52 static void ich9_pm_update_sci_fn(ACPIREGS *regs)
  53 {
  54     ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
  55     acpi_update_sci(&pm->acpi_regs, pm->irq);
  56 }
  57
  58 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
  59 {
  60     ICH9LPCPMRegs *pm = opaque;
  61     return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
  62 }
  63
  64 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
  65                             unsigned width)
  66 {
  67     ICH9LPCPMRegs *pm = opaque;
  68     acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
  69     acpi_update_sci(&pm->acpi_regs, pm->irq);
  70 }
  71
  72 static const MemoryRegionOps ich9_gpe_ops = {
  73     .read = ich9_gpe_readb,
  74     .write = ich9_gpe_writeb,
  75     .valid.min_access_size = 1,
  76     .valid.max_access_size = 4,
  77     .impl.min_access_size = 1,
  78     .impl.max_access_size = 1,
  79     .endianness = DEVICE_LITTLE_ENDIAN,
  80 };
  81
  82 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
  83 {
  84     ICH9LPCPMRegs *pm = opaque;
  85     switch (addr) {
  86     case 0:
  87         return pm->smi_en;
  88     case 4:
  89         return pm->smi_sts;
  90     default:
  91         return 0;
  92     }
  93 }
  94
  95 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
  96                             unsigned width)
  97 {
  98     ICH9LPCPMRegs *pm = opaque;
  99     TCOIORegs *tr = &pm->tco_regs;
 100     uint64_t tco_en;
 101
 102     switch (addr) {
 103     case 0:
 104         tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
 105         /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
 106         if (tr->tco.cnt1 & TCO_LOCK) {
 107             val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
 108         }
 109         pm->smi_en &= ~pm->smi_en_wmask;
 110         pm->smi_en |= (val & pm->smi_en_wmask);
 111         break;
 112     }
 113 }
 114
 115 static const MemoryRegionOps ich9_smi_ops = {
 116     .read = ich9_smi_readl,
 117     .write = ich9_smi_writel,
 118     .valid.min_access_size = 4,
 119     .valid.max_access_size = 4,
 120     .endianness = DEVICE_LITTLE_ENDIAN,
 121 };
 122
 123 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
 124 {
 125     ICH9_DEBUG("to 0x%x\n", pm_io_base);
 126
 127     assert((pm_io_base & ICH9_PMIO_MASK) == 0);
 128
 129     pm->pm_io_base = pm_io_base;
 130     memory_region_transaction_begin();
 131     memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
 132     memory_region_set_address(&pm->io, pm->pm_io_base);
 133     memory_region_transaction_commit();
 134 }
 135
 136 static int ich9_pm_post_load(void *opaque, int version_id)
 137 {
 138     ICH9LPCPMRegs *pm = opaque;
 139     uint32_t pm_io_base = pm->pm_io_base;
 140     pm->pm_io_base = 0;
 141     ich9_pm_iospace_update(pm, pm_io_base);
 142     return 0;
 143 }
 144
 145 #define VMSTATE_GPE_ARRAY(_field, _state)                            \
 146  {                                                                   \
 147      .name       = (stringify(_field)),                              \
 148      .version_id = 0,                                                \
 149      .num        = ICH9_PMIO_GPE0_LEN,                               \
 150      .info       = &vmstate_info_uint8,                              \
 151      .size       = sizeof(uint8_t),                                  \
 152      .flags      = VMS_ARRAY | VMS_POINTER,                          \
 153      .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 154  }
 155
 156 static bool vmstate_test_use_memhp(void *opaque)
 157 {
 158     ICH9LPCPMRegs *s = opaque;
 159     return s->acpi_memory_hotplug.is_enabled;
 160 }
 161
 162 static const VMStateDescription vmstate_memhp_state = {
 163     .name = "ich9_pm/memhp",
 164     .version_id = 1,
 165     .minimum_version_id = 1,
 166     .minimum_version_id_old = 1,
 167     .needed = vmstate_test_use_memhp,
 168     .fields      = (VMStateField[]) {
 169         VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
 170         VMSTATE_END_OF_LIST()
 171     }
 172 };
 173
 174 static bool vmstate_test_use_tco(void *opaque)
 175 {
 176     ICH9LPCPMRegs *s = opaque;
 177     return s->enable_tco;
 178 }
 179
 180 static const VMStateDescription vmstate_tco_io_state = {
 181     .name = "ich9_pm/tco",
 182     .version_id = 1,
 183     .minimum_version_id = 1,
 184     .minimum_version_id_old = 1,
 185     .needed = vmstate_test_use_tco,
 186     .fields      = (VMStateField[]) {
 187         VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
 188                        TCOIORegs),
 189         VMSTATE_END_OF_LIST()
 190     }
 191 };
 192
 193 static bool vmstate_test_use_cpuhp(void *opaque)
 194 {
 195     ICH9LPCPMRegs *s = opaque;
 196     return !s->cpu_hotplug_legacy;
 197 }
 198
 199 static int vmstate_cpuhp_pre_load(void *opaque)
 200 {
 201     ICH9LPCPMRegs *s = opaque;
 202     Object *obj = OBJECT(s->gpe_cpu.device);
 203     object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
 204     return 0;
 205 }
 206
 207 static const VMStateDescription vmstate_cpuhp_state = {
 208     .name = "ich9_pm/cpuhp",
 209     .version_id = 1,
 210     .minimum_version_id = 1,
 211     .minimum_version_id_old = 1,
 212     .needed = vmstate_test_use_cpuhp,
 213     .pre_load = vmstate_cpuhp_pre_load,
 214     .fields      = (VMStateField[]) {
 215         VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
 216         VMSTATE_END_OF_LIST()
 217     }
 218 };
 219
 220 const VMStateDescription vmstate_ich9_pm = {
 221     .name = "ich9_pm",
 222     .version_id = 1,
 223     .minimum_version_id = 1,
 224     .post_load = ich9_pm_post_load,
 225     .fields = (VMStateField[]) {
 226         VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
 227         VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
 228         VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
 229         VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
 230         VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
 231         VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
 232         VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
 233         VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
 234         VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
 235         VMSTATE_END_OF_LIST()
 236     },
 237     .subsections = (const VMStateDescription*[]) {
 238         &vmstate_memhp_state,
 239         &vmstate_tco_io_state,
 240         &vmstate_cpuhp_state,
 241         NULL
 242     }
 243 };
 244
 245 static void pm_reset(void *opaque)
 246 {
 247     ICH9LPCPMRegs *pm = opaque;
 248     ich9_pm_iospace_update(pm, 0);
 249
 250     acpi_pm1_evt_reset(&pm->acpi_regs);
 251     acpi_pm1_cnt_reset(&pm->acpi_regs);
 252     acpi_pm_tmr_reset(&pm->acpi_regs);
 253     acpi_gpe_reset(&pm->acpi_regs);
 254
 255     pm->smi_en = 0;
 256     if (!pm->smm_enabled) {
 257         /* Mark SMM as already inited to prevent SMM from running. */
 258         pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
 259     }
 260     pm->smi_en_wmask = ~0;
 261
 262     acpi_update_sci(&pm->acpi_regs, pm->irq);
 263 }
 264
 265 static void pm_powerdown_req(Notifier *n, void *opaque)
 266 {
 267     ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
 268
 269     acpi_pm1_evt_power_down(&pm->acpi_regs);
 270 }
 271
 272 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 273                   bool smm_enabled,
 274                   qemu_irq sci_irq)
 275 {
 276     memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
 277     memory_region_set_enabled(&pm->io, false);
 278     memory_region_add_subregion(pci_address_space_io(lpc_pci),
 279                                 0, &pm->io);
 280
 281     acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 282     acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 283     acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
 284                       pm->s4_val, !pm->smm_compat && !smm_enabled);
 285
 286     acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
 287     memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
 288                           "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
 289     memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
 290
 291     memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
 292                           "acpi-smi", 8);
 293     memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 294
 295     pm->smm_enabled = smm_enabled;
 296
 297     pm->enable_tco = true;
 298     acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 299
 300     pm->irq = sci_irq;
 301     qemu_register_reset(pm_reset, pm);
 302     pm->powerdown_notifier.notify = pm_powerdown_req;
 303     qemu_register_powerdown_notifier(&pm->powerdown_notifier);
 304
 305     legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
 306         OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
 307
 308     if (pm->acpi_memory_hotplug.is_enabled) {
 309         acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 310                                  &pm->acpi_memory_hotplug,
 311                                  ACPI_MEMORY_HOTPLUG_BASE);
 312     }
 313 }
 314
 315 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
 316                                  void *opaque, Error **errp)
 317 {
 318     ICH9LPCPMRegs *pm = opaque;
 319     uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
 320
 321     visit_type_uint32(v, name, &value, errp);
 322 }
 323
 324 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
 325 {
 326     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 327
 328     return s->pm.acpi_memory_hotplug.is_enabled;
 329 }
 330
 331 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
 332                                                Error **errp)
 333 {
 334     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 335
 336     s->pm.acpi_memory_hotplug.is_enabled = value;
 337 }
 338
 339 static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
 340 {
 341     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 342
 343     return s->pm.cpu_hotplug_legacy;
 344 }
 345
 346 static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
 347                                            Error **errp)
 348 {
 349     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 350
 351     assert(!value);
 352     if (s->pm.cpu_hotplug_legacy && value == false) {
 353         acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
 354                                    ICH9_CPU_HOTPLUG_IO_BASE);
 355     }
 356     s->pm.cpu_hotplug_legacy = value;
 357 }
 358
 359 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 360 {
 361     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 362     return s->pm.enable_tco;
 363 }
 364
 365 static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
 366 {
 367     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 368     s->pm.enable_tco = value;
 369 }
 370
 371 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
 372 {
 373     static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 374     pm->acpi_memory_hotplug.is_enabled = true;
 375     pm->cpu_hotplug_legacy = true;
 376     pm->disable_s3 = 0;
 377     pm->disable_s4 = 0;
 378     pm->s4_val = 2;
 379
 380     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
 381                                    &pm->pm_io_base, OBJ_PROP_FLAG_READ);
 382     object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
 383                         ich9_pm_get_gpe0_blk,
 384                         NULL, NULL, pm);
 385     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
 386                                    &gpe0_len, OBJ_PROP_FLAG_READ);
 387     object_property_add_bool(obj, "memory-hotplug-support",
 388                              ich9_pm_get_memory_hotplug_support,
 389                              ich9_pm_set_memory_hotplug_support);
 390     object_property_add_bool(obj, "cpu-hotplug-legacy",
 391                              ich9_pm_get_cpu_hotplug_legacy,
 392                              ich9_pm_set_cpu_hotplug_legacy);
 393     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
 394                                   &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
 395     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
 396                                   &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
 397     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
 398                                   &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
 399     object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
 400                              ich9_pm_get_enable_tco,
 401                              ich9_pm_set_enable_tco);
 402 }
 403
 404 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 405                                 Error **errp)
 406 {
 407     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 408
 409     if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
 410         !lpc->pm.acpi_memory_hotplug.is_enabled) {
 411         error_setg(errp,
 412                    "memory hotplug is not enabled: %s.memory-hotplug-support "
 413                    "is not set", object_get_typename(OBJECT(lpc)));
 414     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 415         uint64_t negotiated = lpc->smi_negotiated_features;
 416
 417         if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 418             !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
 419             error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
 420             error_append_hint(errp, "update machine type to newer than 5.1 "
 421                 "and firmware that suppors CPU hotplug with SMM");
 422         }
 423     }
 424 }
 425
 426 void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 427                             Error **errp)
 428 {
 429     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 430
 431     if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 432         if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
 433             nvdimm_acpi_plug_cb(hotplug_dev, dev);
 434         } else {
 435             acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
 436                                 dev, errp);
 437         }
 438     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 439         if (lpc->pm.cpu_hotplug_legacy) {
 440             legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
 441         } else {
 442             acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
 443         }
 444     } else {
 445         error_setg(errp, "acpi: device plug request for not supported device"
 446                    " type: %s", object_get_typename(OBJECT(dev)));
 447     }
 448 }
 449
 450 void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 451                                       DeviceState *dev, Error **errp)
 452 {
 453     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 454
 455     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 456         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 457         acpi_memory_unplug_request_cb(hotplug_dev,
 458                                       &lpc->pm.acpi_memory_hotplug, dev,
 459                                       errp);
 460     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 461                !lpc->pm.cpu_hotplug_legacy) {
 462         uint64_t negotiated = lpc->smi_negotiated_features;
 463
 464         if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 465             !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
 466             error_setg(errp, "cpu hot-unplug with SMI wasn't enabled "
 467                              "by firmware");
 468             error_append_hint(errp, "update machine type to a version having "
 469                                     "x-smi-cpu-hotunplug=on and firmware that "
 470                                     "supports CPU hot-unplug with SMM");
 471             return;
 472         }
 473
 474         acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
 475                                    dev, errp);
 476     } else {
 477         error_setg(errp, "acpi: device unplug request for not supported device"
 478                    " type: %s", object_get_typename(OBJECT(dev)));
 479     }
 480 }
 481
 482 void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 483                               Error **errp)
 484 {
 485     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 486
 487     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 488         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 489         acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
 490     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 491                !lpc->pm.cpu_hotplug_legacy) {
 492         acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
 493     } else {
 494         error_setg(errp, "acpi: device unplug for not supported device"
 495                    " type: %s", object_get_typename(OBJECT(dev)));
 496     }
 497 }
 498
 499 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 500 {
 501     ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
 502
 503     acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
 504     if (!s->pm.cpu_hotplug_legacy) {
 505         acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
 506     }
 507 }