block/commit: use QEMU_IOVEC_INIT_BUF
[qemu/ar7.git] / hw / i2c / core.c
blobb54725985a40a1d4dd556f1a98bc3a08fac28b54
1 /*
2 * QEMU I2C bus interface.
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the LGPL.
8 */
10 #include "qemu/osdep.h"
11 #include "hw/i2c/i2c.h"
12 #include "trace.h"
14 #define I2C_BROADCAST 0x00
16 static Property i2c_props[] = {
17 DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
18 DEFINE_PROP_END_OF_LIST(),
21 static const TypeInfo i2c_bus_info = {
22 .name = TYPE_I2C_BUS,
23 .parent = TYPE_BUS,
24 .instance_size = sizeof(I2CBus),
27 static int i2c_bus_pre_save(void *opaque)
29 I2CBus *bus = opaque;
31 bus->saved_address = -1;
32 if (!QLIST_EMPTY(&bus->current_devs)) {
33 if (!bus->broadcast) {
34 bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address;
35 } else {
36 bus->saved_address = I2C_BROADCAST;
40 return 0;
43 static const VMStateDescription vmstate_i2c_bus = {
44 .name = "i2c_bus",
45 .version_id = 1,
46 .minimum_version_id = 1,
47 .pre_save = i2c_bus_pre_save,
48 .fields = (VMStateField[]) {
49 VMSTATE_UINT8(saved_address, I2CBus),
50 VMSTATE_END_OF_LIST()
54 /* Create a new I2C bus. */
55 I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
57 I2CBus *bus;
59 bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name));
60 QLIST_INIT(&bus->current_devs);
61 vmstate_register(NULL, -1, &vmstate_i2c_bus, bus);
62 return bus;
65 void i2c_set_slave_address(I2CSlave *dev, uint8_t address)
67 dev->address = address;
70 /* Return nonzero if bus is busy. */
71 int i2c_bus_busy(I2CBus *bus)
73 return !QLIST_EMPTY(&bus->current_devs);
76 /* TODO: Make this handle multiple masters. */
78 * Start or continue an i2c transaction. When this is called for the
79 * first time or after an i2c_end_transfer(), if it returns an error
80 * the bus transaction is terminated (or really never started). If
81 * this is called after another i2c_start_transfer() without an
82 * intervening i2c_end_transfer(), and it returns an error, the
83 * transaction will not be terminated. The caller must do it.
85 * This corresponds with the way real hardware works. The SMBus
86 * protocol uses a start transfer to switch from write to read mode
87 * without releasing the bus. If that fails, the bus is still
88 * in a transaction.
90 int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv)
92 BusChild *kid;
93 I2CSlaveClass *sc;
94 I2CNode *node;
95 bool bus_scanned = false;
97 if (address == I2C_BROADCAST) {
99 * This is a broadcast, the current_devs will be all the devices of the
100 * bus.
102 bus->broadcast = true;
106 * If there are already devices in the list, that means we are in
107 * the middle of a transaction and we shouldn't rescan the bus.
109 * This happens with any SMBus transaction, even on a pure I2C
110 * device. The interface does a transaction start without
111 * terminating the previous transaction.
113 if (QLIST_EMPTY(&bus->current_devs)) {
114 QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) {
115 DeviceState *qdev = kid->child;
116 I2CSlave *candidate = I2C_SLAVE(qdev);
117 if ((candidate->address == address) || (bus->broadcast)) {
118 node = g_malloc(sizeof(struct I2CNode));
119 node->elt = candidate;
120 QLIST_INSERT_HEAD(&bus->current_devs, node, next);
121 if (!bus->broadcast) {
122 break;
126 bus_scanned = true;
129 if (QLIST_EMPTY(&bus->current_devs)) {
130 return 1;
133 QLIST_FOREACH(node, &bus->current_devs, next) {
134 I2CSlave *s = node->elt;
135 int rv;
137 sc = I2C_SLAVE_GET_CLASS(s);
138 /* If the bus is already busy, assume this is a repeated
139 start condition. */
141 if (sc->event) {
142 trace_i2c_event("start", s->address);
143 rv = sc->event(s, recv ? I2C_START_RECV : I2C_START_SEND);
144 if (rv && !bus->broadcast) {
145 if (bus_scanned) {
146 /* First call, terminate the transfer. */
147 i2c_end_transfer(bus);
149 return rv;
153 return 0;
156 void i2c_end_transfer(I2CBus *bus)
158 I2CSlaveClass *sc;
159 I2CNode *node, *next;
161 QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) {
162 I2CSlave *s = node->elt;
163 sc = I2C_SLAVE_GET_CLASS(s);
164 if (sc->event) {
165 trace_i2c_event("finish", s->address);
166 sc->event(s, I2C_FINISH);
168 QLIST_REMOVE(node, next);
169 g_free(node);
171 bus->broadcast = false;
174 int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send)
176 I2CSlaveClass *sc;
177 I2CSlave *s;
178 I2CNode *node;
179 int ret = 0;
181 if (send) {
182 QLIST_FOREACH(node, &bus->current_devs, next) {
183 s = node->elt;
184 sc = I2C_SLAVE_GET_CLASS(s);
185 if (sc->send) {
186 trace_i2c_send(s->address, *data);
187 ret = ret || sc->send(s, *data);
188 } else {
189 ret = -1;
192 return ret ? -1 : 0;
193 } else {
194 if ((QLIST_EMPTY(&bus->current_devs)) || (bus->broadcast)) {
195 return -1;
198 sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt);
199 if (sc->recv) {
200 s = QLIST_FIRST(&bus->current_devs)->elt;
201 ret = sc->recv(s);
202 trace_i2c_recv(s->address, ret);
203 if (ret < 0) {
204 return ret;
205 } else {
206 *data = ret;
207 return 0;
210 return -1;
214 int i2c_send(I2CBus *bus, uint8_t data)
216 return i2c_send_recv(bus, &data, true);
219 int i2c_recv(I2CBus *bus)
221 uint8_t data;
222 int ret = i2c_send_recv(bus, &data, false);
224 return ret < 0 ? ret : data;
227 void i2c_nack(I2CBus *bus)
229 I2CSlaveClass *sc;
230 I2CNode *node;
232 if (QLIST_EMPTY(&bus->current_devs)) {
233 return;
236 QLIST_FOREACH(node, &bus->current_devs, next) {
237 sc = I2C_SLAVE_GET_CLASS(node->elt);
238 if (sc->event) {
239 trace_i2c_event("nack", node->elt->address);
240 sc->event(node->elt, I2C_NACK);
245 static int i2c_slave_post_load(void *opaque, int version_id)
247 I2CSlave *dev = opaque;
248 I2CBus *bus;
249 I2CNode *node;
251 bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
252 if ((bus->saved_address == dev->address) ||
253 (bus->saved_address == I2C_BROADCAST)) {
254 node = g_malloc(sizeof(struct I2CNode));
255 node->elt = dev;
256 QLIST_INSERT_HEAD(&bus->current_devs, node, next);
258 return 0;
261 const VMStateDescription vmstate_i2c_slave = {
262 .name = "I2CSlave",
263 .version_id = 1,
264 .minimum_version_id = 1,
265 .post_load = i2c_slave_post_load,
266 .fields = (VMStateField[]) {
267 VMSTATE_UINT8(address, I2CSlave),
268 VMSTATE_END_OF_LIST()
272 DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr)
274 DeviceState *dev;
276 dev = qdev_create(&bus->qbus, name);
277 qdev_prop_set_uint8(dev, "address", addr);
278 qdev_init_nofail(dev);
279 return dev;
282 static void i2c_slave_class_init(ObjectClass *klass, void *data)
284 DeviceClass *k = DEVICE_CLASS(klass);
285 set_bit(DEVICE_CATEGORY_MISC, k->categories);
286 k->bus_type = TYPE_I2C_BUS;
287 k->props = i2c_props;
290 static const TypeInfo i2c_slave_type_info = {
291 .name = TYPE_I2C_SLAVE,
292 .parent = TYPE_DEVICE,
293 .instance_size = sizeof(I2CSlave),
294 .abstract = true,
295 .class_size = sizeof(I2CSlaveClass),
296 .class_init = i2c_slave_class_init,
299 static void i2c_slave_register_types(void)
301 type_register_static(&i2c_bus_info);
302 type_register_static(&i2c_slave_type_info);
305 type_init(i2c_slave_register_types)