target/s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qemu/main-loop.h"
  23 #include "cpu.h"
  24 #include "exec/memory.h"
  25 #include "qemu/host-utils.h"
  26 #include "exec/helper-proto.h"
  27 #include "sysemu/kvm.h"
  28 #include "qemu/timer.h"
  29 #include "qemu/main-loop.h"
  30 #include "exec/address-spaces.h"
  31 #ifdef CONFIG_KVM
  32 #include <linux/kvm.h>
  33 #endif
  34 #include "exec/exec-all.h"
  35 #include "exec/cpu_ldst.h"
  36
  37 #if !defined(CONFIG_USER_ONLY)
  38 #include "hw/watchdog/wdt_diag288.h"
  39 #include "sysemu/cpus.h"
  40 #include "sysemu/sysemu.h"
  41 #include "hw/s390x/ebcdic.h"
  42 #include "hw/s390x/ipl.h"
  43 #endif
  44
  45 /* #define DEBUG_HELPER */
  46 #ifdef DEBUG_HELPER
  47 #define HELPER_LOG(x...) qemu_log(x)
  48 #else
  49 #define HELPER_LOG(x...)
  50 #endif
  51
  52 /* Raise an exception dynamically from a helper function.  */
  53 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  54                                      uintptr_t retaddr)
  55 {
  56     CPUState *cs = CPU(s390_env_get_cpu(env));
  57     int t;
  58
  59     cs->exception_index = EXCP_PGM;
  60     env->int_pgm_code = excp;
  61
  62     /* Use the (ultimate) callers address to find the insn that trapped.  */
  63     cpu_restore_state(cs, retaddr);
  64
  65     /* Advance past the insn.  */
  66     t = cpu_ldub_code(env, env->psw.addr);
  67     env->int_pgm_ilen = t = get_ilen(t);
  68     env->psw.addr += t;
  69
  70     cpu_loop_exit(cs);
  71 }
  72
  73 /* Raise an exception statically from a TB.  */
  74 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  75 {
  76     CPUState *cs = CPU(s390_env_get_cpu(env));
  77
  78     HELPER_LOG("%s: exception %d\n", __func__, excp);
  79     cs->exception_index = excp;
  80     cpu_loop_exit(cs);
  81 }
  82
  83 #ifndef CONFIG_USER_ONLY
  84
  85 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  86 {
  87     S390CPU *cpu = s390_env_get_cpu(env);
  88
  89     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  90                   env->psw.addr);
  91
  92     if (kvm_enabled()) {
  93 #ifdef CONFIG_KVM
  94         struct kvm_s390_irq irq = {
  95             .type = KVM_S390_PROGRAM_INT,
  96             .u.pgm.code = code,
  97         };
  98
  99         kvm_s390_vcpu_interrupt(cpu, &irq);
 100 #endif
 101     } else {
 102         CPUState *cs = CPU(cpu);
 103
 104         env->int_pgm_code = code;
 105         env->int_pgm_ilen = ilen;
 106         cs->exception_index = EXCP_PGM;
 107         cpu_loop_exit(cs);
 108     }
 109 }
 110
 111 /* SCLP service call */
 112 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 113 {
 114     qemu_mutex_lock_iothread();
 115     int r = sclp_service_call(env, r1, r2);
 116     if (r < 0) {
 117         program_interrupt(env, -r, 4);
 118         r = 0;
 119     }
 120     qemu_mutex_unlock_iothread();
 121     return r;
 122 }
 123
 124 #ifndef CONFIG_USER_ONLY
 125 static int modified_clear_reset(S390CPU *cpu)
 126 {
 127     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 128     CPUState *t;
 129
 130     pause_all_vcpus();
 131     cpu_synchronize_all_states();
 132     CPU_FOREACH(t) {
 133         run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
 134     }
 135     s390_cmma_reset();
 136     subsystem_reset();
 137     s390_crypto_reset();
 138     scc->load_normal(CPU(cpu));
 139     cpu_synchronize_all_post_reset();
 140     resume_all_vcpus();
 141     return 0;
 142 }
 143
 144 static int load_normal_reset(S390CPU *cpu)
 145 {
 146     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 147     CPUState *t;
 148
 149     pause_all_vcpus();
 150     cpu_synchronize_all_states();
 151     CPU_FOREACH(t) {
 152         run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
 153     }
 154     s390_cmma_reset();
 155     subsystem_reset();
 156     scc->initial_cpu_reset(CPU(cpu));
 157     scc->load_normal(CPU(cpu));
 158     cpu_synchronize_all_post_reset();
 159     resume_all_vcpus();
 160     return 0;
 161 }
 162
 163 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 164 {
 165     uint64_t func = env->regs[r1];
 166     uint64_t timeout = env->regs[r1 + 1];
 167     uint64_t action = env->regs[r3];
 168     Object *obj;
 169     DIAG288State *diag288;
 170     DIAG288Class *diag288_class;
 171
 172     if (r1 % 2 || action != 0) {
 173         return -1;
 174     }
 175
 176     /* Timeout must be more than 15 seconds except for timer deletion */
 177     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 178         return -1;
 179     }
 180
 181     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 182     if (!obj) {
 183         return -1;
 184     }
 185
 186     diag288 = DIAG288(obj);
 187     diag288_class = DIAG288_GET_CLASS(diag288);
 188     return diag288_class->handle_timer(diag288, func, timeout);
 189 }
 190
 191 #define DIAG_308_RC_OK              0x0001
 192 #define DIAG_308_RC_NO_CONF         0x0102
 193 #define DIAG_308_RC_INVALID         0x0402
 194
 195 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 196 {
 197     uint64_t addr =  env->regs[r1];
 198     uint64_t subcode = env->regs[r3];
 199     IplParameterBlock *iplb;
 200
 201     if (env->psw.mask & PSW_MASK_PSTATE) {
 202         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 203         return;
 204     }
 205
 206     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 207         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 208         return;
 209     }
 210
 211     switch (subcode) {
 212     case 0:
 213         modified_clear_reset(s390_env_get_cpu(env));
 214         if (tcg_enabled()) {
 215             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 216         }
 217         break;
 218     case 1:
 219         load_normal_reset(s390_env_get_cpu(env));
 220         if (tcg_enabled()) {
 221             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 222         }
 223         break;
 224     case 3:
 225         s390_reipl_request();
 226         if (tcg_enabled()) {
 227             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 228         }
 229         break;
 230     case 5:
 231         if ((r1 & 1) || (addr & 0x0fffULL)) {
 232             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 233             return;
 234         }
 235         if (!address_space_access_valid(&address_space_memory, addr,
 236                                         sizeof(IplParameterBlock), false)) {
 237             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 238             return;
 239         }
 240         iplb = g_malloc0(sizeof(IplParameterBlock));
 241         cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
 242         if (!iplb_valid_len(iplb)) {
 243             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 244             goto out;
 245         }
 246
 247         cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
 248
 249         if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
 250             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 251             goto out;
 252         }
 253
 254         s390_ipl_update_diag308(iplb);
 255         env->regs[r1 + 1] = DIAG_308_RC_OK;
 256 out:
 257         g_free(iplb);
 258         return;
 259     case 6:
 260         if ((r1 & 1) || (addr & 0x0fffULL)) {
 261             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 262             return;
 263         }
 264         if (!address_space_access_valid(&address_space_memory, addr,
 265                                         sizeof(IplParameterBlock), true)) {
 266             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 267             return;
 268         }
 269         iplb = s390_ipl_get_iplb();
 270         if (iplb) {
 271             cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
 272             env->regs[r1 + 1] = DIAG_308_RC_OK;
 273         } else {
 274             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 275         }
 276         return;
 277     default:
 278         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 279         break;
 280     }
 281 }
 282 #endif
 283
 284 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 285 {
 286     uint64_t r;
 287
 288     switch (num) {
 289     case 0x500:
 290         /* KVM hypercall */
 291         qemu_mutex_lock_iothread();
 292         r = s390_virtio_hypercall(env);
 293         qemu_mutex_unlock_iothread();
 294         break;
 295     case 0x44:
 296         /* yield */
 297         r = 0;
 298         break;
 299     case 0x308:
 300         /* ipl */
 301         handle_diag_308(env, r1, r3);
 302         r = 0;
 303         break;
 304     default:
 305         r = -1;
 306         break;
 307     }
 308
 309     if (r) {
 310         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 311     }
 312 }
 313
 314 /* Set Prefix */
 315 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 316 {
 317     CPUState *cs = CPU(s390_env_get_cpu(env));
 318     uint32_t prefix = a1 & 0x7fffe000;
 319
 320     env->psa = prefix;
 321     HELPER_LOG("prefix: %#x\n", prefix);
 322     tlb_flush_page(cs, 0);
 323     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 324 }
 325
 326 /* Store Clock */
 327 uint64_t HELPER(stck)(CPUS390XState *env)
 328 {
 329     uint64_t time;
 330
 331     time = env->tod_offset +
 332         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 333
 334     return time;
 335 }
 336
 337 /* Set Clock Comparator */
 338 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 339 {
 340     if (time == -1ULL) {
 341         return;
 342     }
 343
 344     env->ckc = time;
 345
 346     /* difference between origins */
 347     time -= env->tod_offset;
 348
 349     /* nanoseconds */
 350     time = tod2time(time);
 351
 352     timer_mod(env->tod_timer, env->tod_basetime + time);
 353 }
 354
 355 /* Store Clock Comparator */
 356 uint64_t HELPER(stckc)(CPUS390XState *env)
 357 {
 358     return env->ckc;
 359 }
 360
 361 /* Set CPU Timer */
 362 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 363 {
 364     if (time == -1ULL) {
 365         return;
 366     }
 367
 368     /* nanoseconds */
 369     time = tod2time(time);
 370
 371     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 372
 373     timer_mod(env->cpu_timer, env->cputm);
 374 }
 375
 376 /* Store CPU Timer */
 377 uint64_t HELPER(stpt)(CPUS390XState *env)
 378 {
 379     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 380 }
 381
 382 /* Store System Information */
 383 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 384                       uint64_t r0, uint64_t r1)
 385 {
 386     int cc = 0;
 387     int sel1, sel2;
 388
 389     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 390         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 391         /* valid function code, invalid reserved bits */
 392         program_interrupt(env, PGM_SPECIFICATION, 2);
 393     }
 394
 395     sel1 = r0 & STSI_R0_SEL1_MASK;
 396     sel2 = r1 & STSI_R1_SEL2_MASK;
 397
 398     /* XXX: spec exception if sysib is not 4k-aligned */
 399
 400     switch (r0 & STSI_LEVEL_MASK) {
 401     case STSI_LEVEL_1:
 402         if ((sel1 == 1) && (sel2 == 1)) {
 403             /* Basic Machine Configuration */
 404             struct sysib_111 sysib;
 405
 406             memset(&sysib, 0, sizeof(sysib));
 407             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 408             /* same as machine type number in STORE CPU ID */
 409             ebcdic_put(sysib.type, "QEMU", 4);
 410             /* same as model number in STORE CPU ID */
 411             ebcdic_put(sysib.model, "QEMU            ", 16);
 412             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 413             ebcdic_put(sysib.plant, "QEMU", 4);
 414             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 415         } else if ((sel1 == 2) && (sel2 == 1)) {
 416             /* Basic Machine CPU */
 417             struct sysib_121 sysib;
 418
 419             memset(&sysib, 0, sizeof(sysib));
 420             /* XXX make different for different CPUs? */
 421             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 422             ebcdic_put(sysib.plant, "QEMU", 4);
 423             stw_p(&sysib.cpu_addr, env->cpu_num);
 424             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 425         } else if ((sel1 == 2) && (sel2 == 2)) {
 426             /* Basic Machine CPUs */
 427             struct sysib_122 sysib;
 428
 429             memset(&sysib, 0, sizeof(sysib));
 430             stl_p(&sysib.capability, 0x443afc29);
 431             /* XXX change when SMP comes */
 432             stw_p(&sysib.total_cpus, 1);
 433             stw_p(&sysib.active_cpus, 1);
 434             stw_p(&sysib.standby_cpus, 0);
 435             stw_p(&sysib.reserved_cpus, 0);
 436             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 437         } else {
 438             cc = 3;
 439         }
 440         break;
 441     case STSI_LEVEL_2:
 442         {
 443             if ((sel1 == 2) && (sel2 == 1)) {
 444                 /* LPAR CPU */
 445                 struct sysib_221 sysib;
 446
 447                 memset(&sysib, 0, sizeof(sysib));
 448                 /* XXX make different for different CPUs? */
 449                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 450                 ebcdic_put(sysib.plant, "QEMU", 4);
 451                 stw_p(&sysib.cpu_addr, env->cpu_num);
 452                 stw_p(&sysib.cpu_id, 0);
 453                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 454             } else if ((sel1 == 2) && (sel2 == 2)) {
 455                 /* LPAR CPUs */
 456                 struct sysib_222 sysib;
 457
 458                 memset(&sysib, 0, sizeof(sysib));
 459                 stw_p(&sysib.lpar_num, 0);
 460                 sysib.lcpuc = 0;
 461                 /* XXX change when SMP comes */
 462                 stw_p(&sysib.total_cpus, 1);
 463                 stw_p(&sysib.conf_cpus, 1);
 464                 stw_p(&sysib.standby_cpus, 0);
 465                 stw_p(&sysib.reserved_cpus, 0);
 466                 ebcdic_put(sysib.name, "QEMU    ", 8);
 467                 stl_p(&sysib.caf, 1000);
 468                 stw_p(&sysib.dedicated_cpus, 0);
 469                 stw_p(&sysib.shared_cpus, 0);
 470                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 471             } else {
 472                 cc = 3;
 473             }
 474             break;
 475         }
 476     case STSI_LEVEL_3:
 477         {
 478             if ((sel1 == 2) && (sel2 == 2)) {
 479                 /* VM CPUs */
 480                 struct sysib_322 sysib;
 481
 482                 memset(&sysib, 0, sizeof(sysib));
 483                 sysib.count = 1;
 484                 /* XXX change when SMP comes */
 485                 stw_p(&sysib.vm[0].total_cpus, 1);
 486                 stw_p(&sysib.vm[0].conf_cpus, 1);
 487                 stw_p(&sysib.vm[0].standby_cpus, 0);
 488                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 489                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 490                 stl_p(&sysib.vm[0].caf, 1000);
 491                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 492                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 493             } else {
 494                 cc = 3;
 495             }
 496             break;
 497         }
 498     case STSI_LEVEL_CURRENT:
 499         env->regs[0] = STSI_LEVEL_3;
 500         break;
 501     default:
 502         cc = 3;
 503         break;
 504     }
 505
 506     return cc;
 507 }
 508
 509 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 510                       uint64_t cpu_addr)
 511 {
 512     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 513
 514     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 515                __func__, order_code, r1, cpu_addr);
 516
 517     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 518        as parameter (input). Status (output) is always R1. */
 519
 520     /* sigp contains the order code in bit positions 56-63, mask it here. */
 521     switch (order_code & 0xff) {
 522     case SIGP_SET_ARCH:
 523         /* switch arch */
 524         break;
 525     case SIGP_SENSE:
 526         /* enumerate CPU status */
 527         if (cpu_addr) {
 528             /* XXX implement when SMP comes */
 529             return 3;
 530         }
 531         env->regs[r1] &= 0xffffffff00000000ULL;
 532         cc = 1;
 533         break;
 534 #if !defined(CONFIG_USER_ONLY)
 535     case SIGP_RESTART:
 536         qemu_system_reset_request();
 537         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 538         break;
 539     case SIGP_STOP:
 540         qemu_system_shutdown_request();
 541         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 542         break;
 543 #endif
 544     default:
 545         /* unknown sigp */
 546         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 547         cc = SIGP_CC_NOT_OPERATIONAL;
 548     }
 549
 550     return cc;
 551 }
 552 #endif
 553
 554 #ifndef CONFIG_USER_ONLY
 555 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 556 {
 557     S390CPU *cpu = s390_env_get_cpu(env);
 558     qemu_mutex_lock_iothread();
 559     ioinst_handle_xsch(cpu, r1);
 560     qemu_mutex_unlock_iothread();
 561 }
 562
 563 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 564 {
 565     S390CPU *cpu = s390_env_get_cpu(env);
 566     qemu_mutex_lock_iothread();
 567     ioinst_handle_csch(cpu, r1);
 568     qemu_mutex_unlock_iothread();
 569 }
 570
 571 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 572 {
 573     S390CPU *cpu = s390_env_get_cpu(env);
 574     qemu_mutex_lock_iothread();
 575     ioinst_handle_hsch(cpu, r1);
 576     qemu_mutex_unlock_iothread();
 577 }
 578
 579 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 580 {
 581     S390CPU *cpu = s390_env_get_cpu(env);
 582     qemu_mutex_lock_iothread();
 583     ioinst_handle_msch(cpu, r1, inst >> 16);
 584     qemu_mutex_unlock_iothread();
 585 }
 586
 587 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 588 {
 589     S390CPU *cpu = s390_env_get_cpu(env);
 590     qemu_mutex_lock_iothread();
 591     ioinst_handle_rchp(cpu, r1);
 592     qemu_mutex_unlock_iothread();
 593 }
 594
 595 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 596 {
 597     S390CPU *cpu = s390_env_get_cpu(env);
 598     qemu_mutex_lock_iothread();
 599     ioinst_handle_rsch(cpu, r1);
 600     qemu_mutex_unlock_iothread();
 601 }
 602
 603 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 604 {
 605     S390CPU *cpu = s390_env_get_cpu(env);
 606     qemu_mutex_lock_iothread();
 607     ioinst_handle_ssch(cpu, r1, inst >> 16);
 608     qemu_mutex_unlock_iothread();
 609 }
 610
 611 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 612 {
 613     S390CPU *cpu = s390_env_get_cpu(env);
 614     qemu_mutex_lock_iothread();
 615     ioinst_handle_stsch(cpu, r1, inst >> 16);
 616     qemu_mutex_unlock_iothread();
 617 }
 618
 619 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 620 {
 621     S390CPU *cpu = s390_env_get_cpu(env);
 622     qemu_mutex_lock_iothread();
 623     ioinst_handle_tsch(cpu, r1, inst >> 16);
 624     qemu_mutex_unlock_iothread();
 625 }
 626
 627 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 628 {
 629     S390CPU *cpu = s390_env_get_cpu(env);
 630     qemu_mutex_lock_iothread();
 631     ioinst_handle_chsc(cpu, inst >> 16);
 632     qemu_mutex_unlock_iothread();
 633 }
 634 #endif
 635
 636 #ifndef CONFIG_USER_ONLY
 637 void HELPER(per_check_exception)(CPUS390XState *env)
 638 {
 639     CPUState *cs = CPU(s390_env_get_cpu(env));
 640
 641     if (env->per_perc_atmid) {
 642         env->int_pgm_code = PGM_PER;
 643         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 644
 645         cs->exception_index = EXCP_PGM;
 646         cpu_loop_exit(cs);
 647     }
 648 }
 649
 650 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 651 {
 652     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 653         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 654             || get_per_in_range(env, to)) {
 655             env->per_address = from;
 656             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 657         }
 658     }
 659 }
 660
 661 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 662 {
 663     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 664         env->per_address = addr;
 665         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 666
 667         /* If the instruction has to be nullified, trigger the
 668            exception immediately. */
 669         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 670             CPUState *cs = CPU(s390_env_get_cpu(env));
 671
 672             env->int_pgm_code = PGM_PER;
 673             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 674
 675             cs->exception_index = EXCP_PGM;
 676             cpu_loop_exit(cs);
 677         }
 678     }
 679 }
 680 #endif