pc: acpi: move RTC device from DSDT to SSDT
[qemu/ar7.git] / target-cris / op_helper.c
blob22966771e9c78807ab26984de22ac0a44d130cb1
1 /*
2 * CRIS helper routines
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "cpu.h"
22 #include "mmu.h"
23 #include "exec/helper-proto.h"
24 #include "qemu/host-utils.h"
25 #include "exec/cpu_ldst.h"
27 //#define CRIS_OP_HELPER_DEBUG
30 #ifdef CRIS_OP_HELPER_DEBUG
31 #define D(x) x
32 #define D_LOG(...) qemu_log(__VA_ARGS__)
33 #else
34 #define D(x)
35 #define D_LOG(...) do { } while (0)
36 #endif
38 #if !defined(CONFIG_USER_ONLY)
39 /* Try to fill the TLB and return an exception if error. If retaddr is
40 NULL, it means that the function was called in C code (i.e. not
41 from generated code or from helper.c) */
42 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
43 uintptr_t retaddr)
45 CRISCPU *cpu = CRIS_CPU(cs);
46 CPUCRISState *env = &cpu->env;
47 int ret;
49 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
50 env->pc, env->pregs[PR_EDA], (void *)retaddr);
51 ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
52 if (unlikely(ret)) {
53 if (retaddr) {
54 /* now we have a real cpu fault */
55 if (cpu_restore_state(cs, retaddr)) {
56 /* Evaluate flags after retranslation. */
57 helper_top_evaluate_flags(env);
60 cpu_loop_exit(cs);
64 #endif
66 void helper_raise_exception(CPUCRISState *env, uint32_t index)
68 CPUState *cs = CPU(cris_env_get_cpu(env));
70 cs->exception_index = index;
71 cpu_loop_exit(cs);
74 void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
76 #if !defined(CONFIG_USER_ONLY)
77 pid &= 0xff;
78 if (pid != (env->pregs[PR_PID] & 0xff))
79 cris_mmu_flush_pid(env, env->pregs[PR_PID]);
80 #endif
83 void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
85 #if !defined(CONFIG_USER_ONLY)
86 CRISCPU *cpu = cris_env_get_cpu(env);
87 CPUState *cs = CPU(cpu);
89 tlb_flush_page(cs, env->pregs[PR_SPC]);
90 tlb_flush_page(cs, new_spc);
91 #endif
94 /* Used by the tlb decoder. */
95 #define EXTRACT_FIELD(src, start, end) \
96 (((src) >> start) & ((1 << (end - start + 1)) - 1))
98 void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
100 #if !defined(CONFIG_USER_ONLY)
101 CRISCPU *cpu = cris_env_get_cpu(env);
102 #endif
103 uint32_t srs;
104 srs = env->pregs[PR_SRS];
105 srs &= 3;
106 env->sregs[srs][sreg] = env->regs[reg];
108 #if !defined(CONFIG_USER_ONLY)
109 if (srs == 1 || srs == 2) {
110 if (sreg == 6) {
111 /* Writes to tlb-hi write to mm_cause as a side
112 effect. */
113 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
114 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
116 else if (sreg == 5) {
117 uint32_t set;
118 uint32_t idx;
119 uint32_t lo, hi;
120 uint32_t vaddr;
121 int tlb_v;
123 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
124 set >>= 4;
125 set &= 3;
127 idx &= 15;
128 /* We've just made a write to tlb_lo. */
129 lo = env->sregs[SFR_RW_MM_TLB_LO];
130 /* Writes are done via r_mm_cause. */
131 hi = env->sregs[SFR_R_MM_CAUSE];
133 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
134 13, 31);
135 vaddr <<= TARGET_PAGE_BITS;
136 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
137 3, 3);
138 env->tlbsets[srs - 1][set][idx].lo = lo;
139 env->tlbsets[srs - 1][set][idx].hi = hi;
141 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
142 vaddr, tlb_v, env->pc);
143 if (tlb_v) {
144 tlb_flush_page(CPU(cpu), vaddr);
148 #endif
151 void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
153 uint32_t srs;
154 env->pregs[PR_SRS] &= 3;
155 srs = env->pregs[PR_SRS];
157 #if !defined(CONFIG_USER_ONLY)
158 if (srs == 1 || srs == 2)
160 uint32_t set;
161 uint32_t idx;
162 uint32_t lo, hi;
164 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
165 set >>= 4;
166 set &= 3;
167 idx &= 15;
169 /* Update the mirror regs. */
170 hi = env->tlbsets[srs - 1][set][idx].hi;
171 lo = env->tlbsets[srs - 1][set][idx].lo;
172 env->sregs[SFR_RW_MM_TLB_HI] = hi;
173 env->sregs[SFR_RW_MM_TLB_LO] = lo;
175 #endif
176 env->regs[reg] = env->sregs[srs][sreg];
179 static void cris_ccs_rshift(CPUCRISState *env)
181 uint32_t ccs;
183 /* Apply the ccs shift. */
184 ccs = env->pregs[PR_CCS];
185 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
186 if (ccs & U_FLAG)
188 /* Enter user mode. */
189 env->ksp = env->regs[R_SP];
190 env->regs[R_SP] = env->pregs[PR_USP];
193 env->pregs[PR_CCS] = ccs;
196 void helper_rfe(CPUCRISState *env)
198 int rflag = env->pregs[PR_CCS] & R_FLAG;
200 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
201 env->pregs[PR_ERP], env->pregs[PR_PID],
202 env->pregs[PR_CCS],
203 env->btarget);
205 cris_ccs_rshift(env);
207 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
208 if (!rflag)
209 env->pregs[PR_CCS] |= P_FLAG;
212 void helper_rfn(CPUCRISState *env)
214 int rflag = env->pregs[PR_CCS] & R_FLAG;
216 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
217 env->pregs[PR_ERP], env->pregs[PR_PID],
218 env->pregs[PR_CCS],
219 env->btarget);
221 cris_ccs_rshift(env);
223 /* Set the P_FLAG only if the R_FLAG is not set. */
224 if (!rflag)
225 env->pregs[PR_CCS] |= P_FLAG;
227 /* Always set the M flag. */
228 env->pregs[PR_CCS] |= M_FLAG_V32;
231 uint32_t helper_lz(uint32_t t0)
233 return clz32(t0);
236 uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
238 /* FIXME: clean this up. */
240 /* des ref:
241 The N flag is set according to the selected bit in the dest reg.
242 The Z flag is set if the selected bit and all bits to the right are
243 zero.
244 The X flag is cleared.
245 Other flags are left untouched.
246 The destination reg is not affected.*/
247 unsigned int fz, sbit, bset, mask, masked_t0;
249 sbit = t1 & 31;
250 bset = !!(t0 & (1 << sbit));
251 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
252 masked_t0 = t0 & mask;
253 fz = !(masked_t0 | bset);
255 /* Clear the X, N and Z flags. */
256 ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
257 if (env->pregs[PR_VR] < 32)
258 ccs &= ~(V_FLAG | C_FLAG);
259 /* Set the N and Z flags accordingly. */
260 ccs |= (bset << 3) | (fz << 2);
261 return ccs;
264 static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
265 uint32_t flags, uint32_t ccs)
267 unsigned int x, z, mask;
269 /* Extended arithmetics, leave the z flag alone. */
270 x = env->cc_x;
271 mask = env->cc_mask | X_FLAG;
272 if (x) {
273 z = flags & Z_FLAG;
274 mask = mask & ~z;
276 flags &= mask;
278 /* all insn clear the x-flag except setf or clrf. */
279 ccs &= ~mask;
280 ccs |= flags;
281 return ccs;
284 uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
285 uint32_t ccs, uint32_t res, uint32_t mof)
287 uint32_t flags = 0;
288 int64_t tmp;
289 int dneg;
291 dneg = ((int32_t)res) < 0;
293 tmp = mof;
294 tmp <<= 32;
295 tmp |= res;
296 if (tmp == 0)
297 flags |= Z_FLAG;
298 else if (tmp < 0)
299 flags |= N_FLAG;
300 if ((dneg && mof != -1)
301 || (!dneg && mof != 0))
302 flags |= V_FLAG;
303 return evaluate_flags_writeback(env, flags, ccs);
306 uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
307 uint32_t ccs, uint32_t res, uint32_t mof)
309 uint32_t flags = 0;
310 uint64_t tmp;
312 tmp = mof;
313 tmp <<= 32;
314 tmp |= res;
315 if (tmp == 0)
316 flags |= Z_FLAG;
317 else if (tmp >> 63)
318 flags |= N_FLAG;
319 if (mof)
320 flags |= V_FLAG;
322 return evaluate_flags_writeback(env, flags, ccs);
325 uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
326 uint32_t src, uint32_t dst, uint32_t res)
328 uint32_t flags = 0;
330 src = src & 0x80000000;
331 dst = dst & 0x80000000;
333 if ((res & 0x80000000L) != 0L)
335 flags |= N_FLAG;
336 if (!src && !dst)
337 flags |= V_FLAG;
338 else if (src & dst)
339 flags |= R_FLAG;
341 else
343 if (res == 0L)
344 flags |= Z_FLAG;
345 if (src & dst)
346 flags |= V_FLAG;
347 if (dst | src)
348 flags |= R_FLAG;
351 return evaluate_flags_writeback(env, flags, ccs);
354 uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
355 uint32_t src, uint32_t dst, uint32_t res)
357 uint32_t flags = 0;
359 src = src & 0x80000000;
360 dst = dst & 0x80000000;
362 if ((res & 0x80000000L) != 0L)
364 flags |= N_FLAG;
365 if (!src && !dst)
366 flags |= V_FLAG;
367 else if (src & dst)
368 flags |= C_FLAG;
370 else
372 if (res == 0L)
373 flags |= Z_FLAG;
374 if (src & dst)
375 flags |= V_FLAG;
376 if (dst | src)
377 flags |= C_FLAG;
380 return evaluate_flags_writeback(env, flags, ccs);
383 uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
384 uint32_t src, uint32_t dst, uint32_t res)
386 uint32_t flags = 0;
388 src = (~src) & 0x80000000;
389 dst = dst & 0x80000000;
391 if ((res & 0x80000000L) != 0L)
393 flags |= N_FLAG;
394 if (!src && !dst)
395 flags |= V_FLAG;
396 else if (src & dst)
397 flags |= C_FLAG;
399 else
401 if (res == 0L)
402 flags |= Z_FLAG;
403 if (src & dst)
404 flags |= V_FLAG;
405 if (dst | src)
406 flags |= C_FLAG;
409 flags ^= C_FLAG;
410 return evaluate_flags_writeback(env, flags, ccs);
413 uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
414 uint32_t ccs, uint32_t res)
416 uint32_t flags = 0;
418 if ((int32_t)res < 0)
419 flags |= N_FLAG;
420 else if (res == 0L)
421 flags |= Z_FLAG;
423 return evaluate_flags_writeback(env, flags, ccs);
425 uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
426 uint32_t ccs, uint32_t res)
428 uint32_t flags = 0;
430 if ((int16_t)res < 0L)
431 flags |= N_FLAG;
432 else if (res == 0)
433 flags |= Z_FLAG;
435 return evaluate_flags_writeback(env, flags, ccs);
438 /* TODO: This is expensive. We could split things up and only evaluate part of
439 CCR on a need to know basis. For now, we simply re-evaluate everything. */
440 void helper_evaluate_flags(CPUCRISState *env)
442 uint32_t src, dst, res;
443 uint32_t flags = 0;
445 src = env->cc_src;
446 dst = env->cc_dest;
447 res = env->cc_result;
449 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
450 src = ~src;
452 /* Now, evaluate the flags. This stuff is based on
453 Per Zander's CRISv10 simulator. */
454 switch (env->cc_size)
456 case 1:
457 if ((res & 0x80L) != 0L)
459 flags |= N_FLAG;
460 if (((src & 0x80L) == 0L)
461 && ((dst & 0x80L) == 0L))
463 flags |= V_FLAG;
465 else if (((src & 0x80L) != 0L)
466 && ((dst & 0x80L) != 0L))
468 flags |= C_FLAG;
471 else
473 if ((res & 0xFFL) == 0L)
475 flags |= Z_FLAG;
477 if (((src & 0x80L) != 0L)
478 && ((dst & 0x80L) != 0L))
480 flags |= V_FLAG;
482 if ((dst & 0x80L) != 0L
483 || (src & 0x80L) != 0L)
485 flags |= C_FLAG;
488 break;
489 case 2:
490 if ((res & 0x8000L) != 0L)
492 flags |= N_FLAG;
493 if (((src & 0x8000L) == 0L)
494 && ((dst & 0x8000L) == 0L))
496 flags |= V_FLAG;
498 else if (((src & 0x8000L) != 0L)
499 && ((dst & 0x8000L) != 0L))
501 flags |= C_FLAG;
504 else
506 if ((res & 0xFFFFL) == 0L)
508 flags |= Z_FLAG;
510 if (((src & 0x8000L) != 0L)
511 && ((dst & 0x8000L) != 0L))
513 flags |= V_FLAG;
515 if ((dst & 0x8000L) != 0L
516 || (src & 0x8000L) != 0L)
518 flags |= C_FLAG;
521 break;
522 case 4:
523 if ((res & 0x80000000L) != 0L)
525 flags |= N_FLAG;
526 if (((src & 0x80000000L) == 0L)
527 && ((dst & 0x80000000L) == 0L))
529 flags |= V_FLAG;
531 else if (((src & 0x80000000L) != 0L) &&
532 ((dst & 0x80000000L) != 0L))
534 flags |= C_FLAG;
537 else
539 if (res == 0L)
540 flags |= Z_FLAG;
541 if (((src & 0x80000000L) != 0L)
542 && ((dst & 0x80000000L) != 0L))
543 flags |= V_FLAG;
544 if ((dst & 0x80000000L) != 0L
545 || (src & 0x80000000L) != 0L)
546 flags |= C_FLAG;
548 break;
549 default:
550 break;
553 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
554 flags ^= C_FLAG;
556 env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
557 env->pregs[PR_CCS]);
560 void helper_top_evaluate_flags(CPUCRISState *env)
562 switch (env->cc_op)
564 case CC_OP_MCP:
565 env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
566 env->pregs[PR_CCS], env->cc_src,
567 env->cc_dest, env->cc_result);
568 break;
569 case CC_OP_MULS:
570 env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
571 env->pregs[PR_CCS], env->cc_result,
572 env->pregs[PR_MOF]);
573 break;
574 case CC_OP_MULU:
575 env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
576 env->pregs[PR_CCS], env->cc_result,
577 env->pregs[PR_MOF]);
578 break;
579 case CC_OP_MOVE:
580 case CC_OP_AND:
581 case CC_OP_OR:
582 case CC_OP_XOR:
583 case CC_OP_ASR:
584 case CC_OP_LSR:
585 case CC_OP_LSL:
586 switch (env->cc_size)
588 case 4:
589 env->pregs[PR_CCS] =
590 helper_evaluate_flags_move_4(env,
591 env->pregs[PR_CCS],
592 env->cc_result);
593 break;
594 case 2:
595 env->pregs[PR_CCS] =
596 helper_evaluate_flags_move_2(env,
597 env->pregs[PR_CCS],
598 env->cc_result);
599 break;
600 default:
601 helper_evaluate_flags(env);
602 break;
604 break;
605 case CC_OP_FLAGS:
606 /* live. */
607 break;
608 case CC_OP_SUB:
609 case CC_OP_CMP:
610 if (env->cc_size == 4)
611 env->pregs[PR_CCS] =
612 helper_evaluate_flags_sub_4(env,
613 env->pregs[PR_CCS],
614 env->cc_src, env->cc_dest,
615 env->cc_result);
616 else
617 helper_evaluate_flags(env);
618 break;
619 default:
621 switch (env->cc_size)
623 case 4:
624 env->pregs[PR_CCS] =
625 helper_evaluate_flags_alu_4(env,
626 env->pregs[PR_CCS],
627 env->cc_src, env->cc_dest,
628 env->cc_result);
629 break;
630 default:
631 helper_evaluate_flags(env);
632 break;
635 break;