hw/xtensa_lx60.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "sysemu.h"
  29 #include "boards.h"
  30 #include "loader.h"
  31 #include "elf.h"
  32 #include "memory.h"
  33 #include "exec-memory.h"
  34 #include "pc.h"
  35 #include "sysbus.h"
  36 #include "flash.h"
  37 #include "xtensa_bootparam.h"
  38
  39 typedef struct LxBoardDesc {
  40     size_t flash_size;
  41     size_t flash_sector_size;
  42     size_t sram_size;
  43 } LxBoardDesc;
  44
  45 typedef struct Lx60FpgaState {
  46     MemoryRegion iomem;
  47     uint32_t leds;
  48     uint32_t switches;
  49 } Lx60FpgaState;
  50
  51 static void lx60_fpga_reset(void *opaque)
  52 {
  53     Lx60FpgaState *s = opaque;
  54
  55     s->leds = 0;
  56     s->switches = 0;
  57 }
  58
  59 static uint64_t lx60_fpga_read(void *opaque, target_phys_addr_t addr,
  60         unsigned size)
  61 {
  62     Lx60FpgaState *s = opaque;
  63
  64     switch (addr) {
  65     case 0x0: /*build date code*/
  66         return 0x09272011;
  67
  68     case 0x4: /*processor clock frequency, Hz*/
  69         return 10000000;
  70
  71     case 0x8: /*LEDs (off = 0, on = 1)*/
  72         return s->leds;
  73
  74     case 0xc: /*DIP switches (off = 0, on = 1)*/
  75         return s->switches;
  76     }
  77     return 0;
  78 }
  79
  80 static void lx60_fpga_write(void *opaque, target_phys_addr_t addr,
  81         uint64_t val, unsigned size)
  82 {
  83     Lx60FpgaState *s = opaque;
  84
  85     switch (addr) {
  86     case 0x8: /*LEDs (off = 0, on = 1)*/
  87         s->leds = val;
  88         break;
  89
  90     case 0x10: /*board reset*/
  91         if (val == 0xdead) {
  92             qemu_system_reset_request();
  93         }
  94         break;
  95     }
  96 }
  97
  98 static const MemoryRegionOps lx60_fpga_ops = {
  99     .read = lx60_fpga_read,
 100     .write = lx60_fpga_write,
 101     .endianness = DEVICE_NATIVE_ENDIAN,
 102 };
 103
 104 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
 105         target_phys_addr_t base)
 106 {
 107     Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
 108
 109     memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
 110             "lx60.fpga", 0x10000);
 111     memory_region_add_subregion(address_space, base, &s->iomem);
 112     lx60_fpga_reset(s);
 113     qemu_register_reset(lx60_fpga_reset, s);
 114     return s;
 115 }
 116
 117 static void lx60_net_init(MemoryRegion *address_space,
 118         target_phys_addr_t base,
 119         target_phys_addr_t descriptors,
 120         target_phys_addr_t buffers,
 121         qemu_irq irq, NICInfo *nd)
 122 {
 123     DeviceState *dev;
 124     SysBusDevice *s;
 125     MemoryRegion *ram;
 126
 127     dev = qdev_create(NULL, "open_eth");
 128     qdev_set_nic_properties(dev, nd);
 129     qdev_init_nofail(dev);
 130
 131     s = sysbus_from_qdev(dev);
 132     sysbus_connect_irq(s, 0, irq);
 133     memory_region_add_subregion(address_space, base,
 134             sysbus_mmio_get_region(s, 0));
 135     memory_region_add_subregion(address_space, descriptors,
 136             sysbus_mmio_get_region(s, 1));
 137
 138     ram = g_malloc(sizeof(*ram));
 139     memory_region_init_ram(ram, "open_eth.ram", 16384);
 140     vmstate_register_ram_global(ram);
 141     memory_region_add_subregion(address_space, buffers, ram);
 142 }
 143
 144 static uint64_t translate_phys_addr(void *env, uint64_t addr)
 145 {
 146     return cpu_get_phys_page_debug(env, addr);
 147 }
 148
 149 static void lx60_reset(void *opaque)
 150 {
 151     XtensaCPU *cpu = opaque;
 152
 153     cpu_reset(CPU(cpu));
 154 }
 155
 156 static void lx_init(const LxBoardDesc *board,
 157         ram_addr_t ram_size, const char *boot_device,
 158         const char *kernel_filename, const char *kernel_cmdline,
 159         const char *initrd_filename, const char *cpu_model)
 160 {
 161 #ifdef TARGET_WORDS_BIGENDIAN
 162     int be = 1;
 163 #else
 164     int be = 0;
 165 #endif
 166     MemoryRegion *system_memory = get_system_memory();
 167     XtensaCPU *cpu = NULL;
 168     CPUXtensaState *env = NULL;
 169     MemoryRegion *ram, *rom, *system_io;
 170     DriveInfo *dinfo;
 171     pflash_t *flash = NULL;
 172     int n;
 173
 174     if (!cpu_model) {
 175         cpu_model = "dc232b";
 176     }
 177
 178     for (n = 0; n < smp_cpus; n++) {
 179         cpu = cpu_xtensa_init(cpu_model);
 180         if (cpu == NULL) {
 181             fprintf(stderr, "Unable to find CPU definition\n");
 182             exit(1);
 183         }
 184         env = &cpu->env;
 185
 186         env->sregs[PRID] = n;
 187         qemu_register_reset(lx60_reset, cpu);
 188         /* Need MMU initialized prior to ELF loading,
 189          * so that ELF gets loaded into virtual addresses
 190          */
 191         cpu_reset(CPU(cpu));
 192     }
 193
 194     ram = g_malloc(sizeof(*ram));
 195     memory_region_init_ram(ram, "lx60.dram", ram_size);
 196     vmstate_register_ram_global(ram);
 197     memory_region_add_subregion(system_memory, 0, ram);
 198
 199     system_io = g_malloc(sizeof(*system_io));
 200     memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024);
 201     memory_region_add_subregion(system_memory, 0xf0000000, system_io);
 202     lx60_fpga_init(system_io, 0x0d020000);
 203     if (nd_table[0].vlan) {
 204         lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
 205                 xtensa_get_extint(env, 1), nd_table);
 206     }
 207
 208     if (!serial_hds[0]) {
 209         serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
 210     }
 211
 212     serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
 213             115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
 214
 215     dinfo = drive_get(IF_PFLASH, 0, 0);
 216     if (dinfo) {
 217         flash = pflash_cfi01_register(0xf8000000,
 218                 NULL, "lx60.io.flash", board->flash_size,
 219                 dinfo->bdrv, board->flash_sector_size,
 220                 board->flash_size / board->flash_sector_size,
 221                 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
 222         if (flash == NULL) {
 223             fprintf(stderr, "Unable to mount pflash\n");
 224             exit(1);
 225         }
 226     }
 227
 228     /* Use presence of kernel file name as 'boot from SRAM' switch. */
 229     if (kernel_filename) {
 230         rom = g_malloc(sizeof(*rom));
 231         memory_region_init_ram(rom, "lx60.sram", board->sram_size);
 232         vmstate_register_ram_global(rom);
 233         memory_region_add_subregion(system_memory, 0xfe000000, rom);
 234
 235         /* Put kernel bootparameters to the end of that SRAM */
 236         if (kernel_cmdline) {
 237             size_t cmdline_size = strlen(kernel_cmdline) + 1;
 238             size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
 239             uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
 240
 241             env->regs[2] = tagptr;
 242
 243             tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
 244             if (cmdline_size > 1) {
 245                 tagptr = put_tag(tagptr, 0x1001,
 246                         cmdline_size, kernel_cmdline);
 247             }
 248             tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
 249         }
 250         uint64_t elf_entry;
 251         uint64_t elf_lowaddr;
 252         int success = load_elf(kernel_filename, translate_phys_addr, env,
 253                 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
 254         if (success > 0) {
 255             env->pc = elf_entry;
 256         }
 257     } else {
 258         if (flash) {
 259             MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
 260             MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
 261
 262             memory_region_init_alias(flash_io, "lx60.flash",
 263                     flash_mr, 0, board->flash_size);
 264             memory_region_add_subregion(system_memory, 0xfe000000,
 265                     flash_io);
 266         }
 267     }
 268 }
 269
 270 static void xtensa_lx60_init(ram_addr_t ram_size,
 271                      const char *boot_device,
 272                      const char *kernel_filename, const char *kernel_cmdline,
 273                      const char *initrd_filename, const char *cpu_model)
 274 {
 275     static const LxBoardDesc lx60_board = {
 276         .flash_size = 0x400000,
 277         .flash_sector_size = 0x10000,
 278         .sram_size = 0x20000,
 279     };
 280     lx_init(&lx60_board, ram_size, boot_device,
 281             kernel_filename, kernel_cmdline,
 282             initrd_filename, cpu_model);
 283 }
 284
 285 static void xtensa_lx200_init(ram_addr_t ram_size,
 286                      const char *boot_device,
 287                      const char *kernel_filename, const char *kernel_cmdline,
 288                      const char *initrd_filename, const char *cpu_model)
 289 {
 290     static const LxBoardDesc lx200_board = {
 291         .flash_size = 0x1000000,
 292         .flash_sector_size = 0x20000,
 293         .sram_size = 0x2000000,
 294     };
 295     lx_init(&lx200_board, ram_size, boot_device,
 296             kernel_filename, kernel_cmdline,
 297             initrd_filename, cpu_model);
 298 }
 299
 300 static QEMUMachine xtensa_lx60_machine = {
 301     .name = "lx60",
 302     .desc = "lx60 EVB (dc232b)",
 303     .init = xtensa_lx60_init,
 304     .max_cpus = 4,
 305 };
 306
 307 static QEMUMachine xtensa_lx200_machine = {
 308     .name = "lx200",
 309     .desc = "lx200 EVB (dc232b)",
 310     .init = xtensa_lx200_init,
 311     .max_cpus = 4,
 312 };
 313
 314 static void xtensa_lx_machines_init(void)
 315 {
 316     qemu_register_machine(&xtensa_lx60_machine);
 317     qemu_register_machine(&xtensa_lx200_machine);
 318 }
 319
 320 machine_init(xtensa_lx_machines_init);