include/hw/i386/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "exec/memory.h"
   5 #include "hw/boards.h"
   6 #include "hw/isa/isa.h"
   7 #include "hw/block/fdc.h"
   8 #include "hw/block/flash.h"
   9 #include "net/net.h"
  10 #include "hw/i386/ioapic.h"
  11 #include "hw/i386/x86.h"
  12
  13 #include "qemu/range.h"
  14 #include "qemu/bitmap.h"
  15 #include "qemu/module.h"
  16 #include "hw/pci/pci.h"
  17 #include "hw/mem/pc-dimm.h"
  18 #include "hw/mem/nvdimm.h"
  19 #include "hw/acpi/acpi_dev_interface.h"
  20
  21 #define HPET_INTCAP "hpet-intcap"
  22
  23 /**
  24  * PCMachineState:
  25  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
  26  * @boot_cpus: number of present VCPUs
  27  * @smp_dies: number of dies per one package
  28  */
  29 struct PCMachineState {
  30     /*< private >*/
  31     X86MachineState parent_obj;
  32
  33     /* <public> */
  34
  35     /* State for other subsystems/APIs: */
  36     Notifier machine_done;
  37
  38     /* Pointers to devices and objects: */
  39     HotplugHandler *acpi_dev;
  40     PCIBus *bus;
  41     I2CBus *smbus;
  42     PFlashCFI01 *flash[2];
  43
  44     /* Configuration options: */
  45     OnOffAuto vmport;
  46
  47     bool acpi_build_enabled;
  48     bool smbus_enabled;
  49     bool sata_enabled;
  50     bool pit_enabled;
  51
  52     /* NUMA information: */
  53     uint64_t numa_nodes;
  54     uint64_t *node_mem;
  55
  56     /* ACPI Memory hotplug IO base address */
  57     hwaddr memhp_io_base;
  58 };
  59
  60 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
  61 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
  62 #define PC_MACHINE_VMPORT           "vmport"
  63 #define PC_MACHINE_SMBUS            "smbus"
  64 #define PC_MACHINE_SATA             "sata"
  65 #define PC_MACHINE_PIT              "pit"
  66
  67 /**
  68  * PCMachineClass:
  69  *
  70  * Compat fields:
  71  *
  72  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
  73  *                        backend's alignment value if provided
  74  * @acpi_data_size: Size of the chunk of memory at the top of RAM
  75  *                  for the BIOS ACPI tables and other BIOS
  76  *                  datastructures.
  77  * @gigabyte_align: Make sure that guest addresses aligned at
  78  *                  1Gbyte boundaries get mapped to host
  79  *                  addresses aligned at 1Gbyte boundaries. This
  80  *                  way we can use 1GByte pages in the host.
  81  *
  82  */
  83 typedef struct PCMachineClass {
  84     /*< private >*/
  85     X86MachineClass parent_class;
  86
  87     /*< public >*/
  88
  89     /* Device configuration: */
  90     bool pci_enabled;
  91     bool kvmclock_enabled;
  92     const char *default_nic_model;
  93
  94     /* Compat options: */
  95
  96     /* Default CPU model version.  See x86_cpu_set_default_version(). */
  97     int default_cpu_version;
  98
  99     /* ACPI compat: */
 100     bool has_acpi_build;
 101     bool rsdp_in_ram;
 102     int legacy_acpi_table_size;
 103     unsigned acpi_data_size;
 104     bool do_not_add_smb_acpi;
 105
 106     /* SMBIOS compat: */
 107     bool smbios_defaults;
 108     bool smbios_legacy_mode;
 109     bool smbios_uuid_encoded;
 110
 111     /* RAM / address space compat: */
 112     bool gigabyte_align;
 113     bool has_reserved_memory;
 114     bool enforce_aligned_dimm;
 115     bool broken_reserved_end;
 116
 117     /* generate legacy CPU hotplug AML */
 118     bool legacy_cpu_hotplug;
 119
 120     /* use DMA capable linuxboot option rom */
 121     bool linuxboot_dma_enabled;
 122
 123     /* use PVH to load kernels that support this feature */
 124     bool pvh_enabled;
 125 } PCMachineClass;
 126
 127 #define TYPE_PC_MACHINE "generic-pc-machine"
 128 #define PC_MACHINE(obj) \
 129     OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
 130 #define PC_MACHINE_GET_CLASS(obj) \
 131     OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
 132 #define PC_MACHINE_CLASS(klass) \
 133     OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
 134
 135 /* ioapic.c */
 136
 137 /* Global System Interrupts */
 138
 139 #define GSI_NUM_PINS IOAPIC_NUM_PINS
 140
 141 typedef struct GSIState {
 142     qemu_irq i8259_irq[ISA_NUM_IRQS];
 143     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
 144 } GSIState;
 145
 146 void gsi_handler(void *opaque, int n, int level);
 147
 148 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
 149
 150 /* vmport.c */
 151 #define TYPE_VMPORT "vmport"
 152 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
 153
 154 static inline void vmport_init(ISABus *bus)
 155 {
 156     isa_create_simple(bus, TYPE_VMPORT);
 157 }
 158
 159 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
 160 void vmmouse_get_data(uint32_t *data);
 161 void vmmouse_set_data(const uint32_t *data);
 162
 163 /* pc.c */
 164 extern int fd_bootchk;
 165
 166 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 167
 168 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
 169 void pc_smp_parse(MachineState *ms, QemuOpts *opts);
 170
 171 void pc_guest_info_init(PCMachineState *pcms);
 172
 173 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
 174 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
 175 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
 176 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
 177 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
 178 #define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
 179 #define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
 180
 181
 182 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
 183                             MemoryRegion *pci_address_space);
 184
 185 void xen_load_linux(PCMachineState *pcms);
 186 void pc_memory_init(PCMachineState *pcms,
 187                     MemoryRegion *system_memory,
 188                     MemoryRegion *rom_memory,
 189                     MemoryRegion **ram_memory);
 190 uint64_t pc_pci_hole64_start(void);
 191 qemu_irq pc_allocate_cpu_irq(void);
 192 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 193 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
 194                           ISADevice **rtc_state,
 195                           bool create_fdctrl,
 196                           bool no_vmport,
 197                           bool has_pit,
 198                           uint32_t hpet_irqs);
 199 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
 200 void pc_cmos_init(PCMachineState *pcms,
 201                   BusState *ide0, BusState *ide1,
 202                   ISADevice *s);
 203 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
 204 void pc_pci_device_init(PCIBus *pci_bus);
 205
 206 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 207
 208 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
 209 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
 210
 211 ISADevice *pc_find_fdc0(void);
 212 int cmos_get_fd_drive_type(FloppyDriveType fd0);
 213
 214 #define FW_CFG_IO_BASE     0x510
 215
 216 #define PORT92_A20_LINE "a20"
 217
 218 /* hpet.c */
 219 extern int no_hpet;
 220
 221 /* pc_sysfw.c */
 222 void pc_system_flash_create(PCMachineState *pcms);
 223 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 224
 225 /* acpi-build.c */
 226 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 227                        const CPUArchIdList *apic_ids, GArray *entry);
 228
 229 extern GlobalProperty pc_compat_4_2[];
 230 extern const size_t pc_compat_4_2_len;
 231
 232 extern GlobalProperty pc_compat_4_1[];
 233 extern const size_t pc_compat_4_1_len;
 234
 235 extern GlobalProperty pc_compat_4_0[];
 236 extern const size_t pc_compat_4_0_len;
 237
 238 extern GlobalProperty pc_compat_3_1[];
 239 extern const size_t pc_compat_3_1_len;
 240
 241 extern GlobalProperty pc_compat_3_0[];
 242 extern const size_t pc_compat_3_0_len;
 243
 244 extern GlobalProperty pc_compat_2_12[];
 245 extern const size_t pc_compat_2_12_len;
 246
 247 extern GlobalProperty pc_compat_2_11[];
 248 extern const size_t pc_compat_2_11_len;
 249
 250 extern GlobalProperty pc_compat_2_10[];
 251 extern const size_t pc_compat_2_10_len;
 252
 253 extern GlobalProperty pc_compat_2_9[];
 254 extern const size_t pc_compat_2_9_len;
 255
 256 extern GlobalProperty pc_compat_2_8[];
 257 extern const size_t pc_compat_2_8_len;
 258
 259 extern GlobalProperty pc_compat_2_7[];
 260 extern const size_t pc_compat_2_7_len;
 261
 262 extern GlobalProperty pc_compat_2_6[];
 263 extern const size_t pc_compat_2_6_len;
 264
 265 extern GlobalProperty pc_compat_2_5[];
 266 extern const size_t pc_compat_2_5_len;
 267
 268 extern GlobalProperty pc_compat_2_4[];
 269 extern const size_t pc_compat_2_4_len;
 270
 271 extern GlobalProperty pc_compat_2_3[];
 272 extern const size_t pc_compat_2_3_len;
 273
 274 extern GlobalProperty pc_compat_2_2[];
 275 extern const size_t pc_compat_2_2_len;
 276
 277 extern GlobalProperty pc_compat_2_1[];
 278 extern const size_t pc_compat_2_1_len;
 279
 280 extern GlobalProperty pc_compat_2_0[];
 281 extern const size_t pc_compat_2_0_len;
 282
 283 extern GlobalProperty pc_compat_1_7[];
 284 extern const size_t pc_compat_1_7_len;
 285
 286 extern GlobalProperty pc_compat_1_6[];
 287 extern const size_t pc_compat_1_6_len;
 288
 289 extern GlobalProperty pc_compat_1_5[];
 290 extern const size_t pc_compat_1_5_len;
 291
 292 extern GlobalProperty pc_compat_1_4[];
 293 extern const size_t pc_compat_1_4_len;
 294
 295 /* Helper for setting model-id for CPU models that changed model-id
 296  * depending on QEMU versions up to QEMU 2.4.
 297  */
 298 #define PC_CPU_MODEL_IDS(v) \
 299     { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 300     { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 301     { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
 302
 303 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
 304     static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
 305     { \
 306         MachineClass *mc = MACHINE_CLASS(oc); \
 307         optsfn(mc); \
 308         mc->init = initfn; \
 309     } \
 310     static const TypeInfo pc_machine_type_##suffix = { \
 311         .name       = namestr TYPE_MACHINE_SUFFIX, \
 312         .parent     = TYPE_PC_MACHINE, \
 313         .class_init = pc_machine_##suffix##_class_init, \
 314     }; \
 315     static void pc_machine_init_##suffix(void) \
 316     { \
 317         type_register(&pc_machine_type_##suffix); \
 318     } \
 319     type_init(pc_machine_init_##suffix)
 320
 321 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
 322 #endif