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qemu-iotests: make assert_no_active_block_jobs() common
[qemu/ar7.git] / memory.c
blob5cb8f4a8b2e098a27623ee1fae82af2f1f5cbce1
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = int128_get64((fr)->addr.size), \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging ajacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317 }
318
319 static void memory_region_read_accessor(void *opaque,
320 hwaddr addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325 {
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334 }
335
336 static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342 {
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348 }
349
350 static void memory_region_write_accessor(void *opaque,
351 hwaddr addr,
352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356 {
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365 }
366
367 static void access_with_adjusted_size(hwaddr addr,
368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
373 hwaddr addr,
374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379 {
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
390
391 /* FIXME: support unaligned access? */
392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
395 #ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398 #else
399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
400 #endif
401 }
402 }
403
404 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
405 unsigned width, bool write)
406 {
407 const MemoryRegionPortio *mrp;
408
409 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
410 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
411 && width == mrp->size
412 && (write ? (bool)mrp->write : (bool)mrp->read)) {
413 return mrp;
414 }
415 }
416 return NULL;
417 }
418
419 static void memory_region_iorange_read(IORange *iorange,
420 uint64_t offset,
421 unsigned width,
422 uint64_t *data)
423 {
424 MemoryRegionIORange *mrio
425 = container_of(iorange, MemoryRegionIORange, iorange);
426 MemoryRegion *mr = mrio->mr;
427
428 offset += mrio->offset;
429 if (mr->ops->old_portio) {
430 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
431 width, false);
432
433 *data = ((uint64_t)1 << (width * 8)) - 1;
434 if (mrp) {
435 *data = mrp->read(mr->opaque, offset);
436 } else if (width == 2) {
437 mrp = find_portio(mr, offset - mrio->offset, 1, false);
438 assert(mrp);
439 *data = mrp->read(mr->opaque, offset) |
440 (mrp->read(mr->opaque, offset + 1) << 8);
441 }
442 return;
443 }
444 *data = 0;
445 access_with_adjusted_size(offset, data, width,
446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_read_accessor, mr);
449 }
450
451 static void memory_region_iorange_write(IORange *iorange,
452 uint64_t offset,
453 unsigned width,
454 uint64_t data)
455 {
456 MemoryRegionIORange *mrio
457 = container_of(iorange, MemoryRegionIORange, iorange);
458 MemoryRegion *mr = mrio->mr;
459
460 offset += mrio->offset;
461 if (mr->ops->old_portio) {
462 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
463 width, true);
464
465 if (mrp) {
466 mrp->write(mr->opaque, offset, data);
467 } else if (width == 2) {
468 mrp = find_portio(mr, offset - mrio->offset, 1, true);
469 assert(mrp);
470 mrp->write(mr->opaque, offset, data & 0xff);
471 mrp->write(mr->opaque, offset + 1, data >> 8);
472 }
473 return;
474 }
475 access_with_adjusted_size(offset, &data, width,
476 mr->ops->impl.min_access_size,
477 mr->ops->impl.max_access_size,
478 memory_region_write_accessor, mr);
479 }
480
481 static void memory_region_iorange_destructor(IORange *iorange)
482 {
483 g_free(container_of(iorange, MemoryRegionIORange, iorange));
484 }
485
486 const IORangeOps memory_region_iorange_ops = {
487 .read = memory_region_iorange_read,
488 .write = memory_region_iorange_write,
489 .destructor = memory_region_iorange_destructor,
490 };
491
492 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
493 {
494 AddressSpace *as;
495
496 while (mr->parent) {
497 mr = mr->parent;
498 }
499 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
500 if (mr == as->root) {
501 return as;
502 }
503 }
504 abort();
505 }
506
507 /* Render a memory region into the global view. Ranges in @view obscure
508 * ranges in @mr.
509 */
510 static void render_memory_region(FlatView *view,
511 MemoryRegion *mr,
512 Int128 base,
513 AddrRange clip,
514 bool readonly)
515 {
516 MemoryRegion *subregion;
517 unsigned i;
518 hwaddr offset_in_region;
519 Int128 remain;
520 Int128 now;
521 FlatRange fr;
522 AddrRange tmp;
523
524 if (!mr->enabled) {
525 return;
526 }
527
528 int128_addto(&base, int128_make64(mr->addr));
529 readonly |= mr->readonly;
530
531 tmp = addrrange_make(base, mr->size);
532
533 if (!addrrange_intersects(tmp, clip)) {
534 return;
535 }
536
537 clip = addrrange_intersection(tmp, clip);
538
539 if (mr->alias) {
540 int128_subfrom(&base, int128_make64(mr->alias->addr));
541 int128_subfrom(&base, int128_make64(mr->alias_offset));
542 render_memory_region(view, mr->alias, base, clip, readonly);
543 return;
544 }
545
546 /* Render subregions in priority order. */
547 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
548 render_memory_region(view, subregion, base, clip, readonly);
549 }
550
551 if (!mr->terminates) {
552 return;
553 }
554
555 offset_in_region = int128_get64(int128_sub(clip.start, base));
556 base = clip.start;
557 remain = clip.size;
558
559 /* Render the region itself into any gaps left by the current view. */
560 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
561 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
562 continue;
563 }
564 if (int128_lt(base, view->ranges[i].addr.start)) {
565 now = int128_min(remain,
566 int128_sub(view->ranges[i].addr.start, base));
567 fr.mr = mr;
568 fr.offset_in_region = offset_in_region;
569 fr.addr = addrrange_make(base, now);
570 fr.dirty_log_mask = mr->dirty_log_mask;
571 fr.romd_mode = mr->romd_mode;
572 fr.readonly = readonly;
573 flatview_insert(view, i, &fr);
574 ++i;
575 int128_addto(&base, now);
576 offset_in_region += int128_get64(now);
577 int128_subfrom(&remain, now);
578 }
579 now = int128_sub(int128_min(int128_add(base, remain),
580 addrrange_end(view->ranges[i].addr)),
581 base);
582 int128_addto(&base, now);
583 offset_in_region += int128_get64(now);
584 int128_subfrom(&remain, now);
585 }
586 if (int128_nz(remain)) {
587 fr.mr = mr;
588 fr.offset_in_region = offset_in_region;
589 fr.addr = addrrange_make(base, remain);
590 fr.dirty_log_mask = mr->dirty_log_mask;
591 fr.romd_mode = mr->romd_mode;
592 fr.readonly = readonly;
593 flatview_insert(view, i, &fr);
594 }
595 }
596
597 /* Render a memory topology into a list of disjoint absolute ranges. */
598 static FlatView generate_memory_topology(MemoryRegion *mr)
599 {
600 FlatView view;
601
602 flatview_init(&view);
603
604 if (mr) {
605 render_memory_region(&view, mr, int128_zero(),
606 addrrange_make(int128_zero(), int128_2_64()), false);
607 }
608 flatview_simplify(&view);
609
610 return view;
611 }
612
613 static void address_space_add_del_ioeventfds(AddressSpace *as,
614 MemoryRegionIoeventfd *fds_new,
615 unsigned fds_new_nb,
616 MemoryRegionIoeventfd *fds_old,
617 unsigned fds_old_nb)
618 {
619 unsigned iold, inew;
620 MemoryRegionIoeventfd *fd;
621 MemoryRegionSection section;
622
623 /* Generate a symmetric difference of the old and new fd sets, adding
624 * and deleting as necessary.
625 */
626
627 iold = inew = 0;
628 while (iold < fds_old_nb || inew < fds_new_nb) {
629 if (iold < fds_old_nb
630 && (inew == fds_new_nb
631 || memory_region_ioeventfd_before(fds_old[iold],
632 fds_new[inew]))) {
633 fd = &fds_old[iold];
634 section = (MemoryRegionSection) {
635 .address_space = as,
636 .offset_within_address_space = int128_get64(fd->addr.start),
637 .size = int128_get64(fd->addr.size),
638 };
639 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
640 fd->match_data, fd->data, fd->e);
641 ++iold;
642 } else if (inew < fds_new_nb
643 && (iold == fds_old_nb
644 || memory_region_ioeventfd_before(fds_new[inew],
645 fds_old[iold]))) {
646 fd = &fds_new[inew];
647 section = (MemoryRegionSection) {
648 .address_space = as,
649 .offset_within_address_space = int128_get64(fd->addr.start),
650 .size = int128_get64(fd->addr.size),
651 };
652 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
653 fd->match_data, fd->data, fd->e);
654 ++inew;
655 } else {
656 ++iold;
657 ++inew;
658 }
659 }
660 }
661
662 static void address_space_update_ioeventfds(AddressSpace *as)
663 {
664 FlatRange *fr;
665 unsigned ioeventfd_nb = 0;
666 MemoryRegionIoeventfd *ioeventfds = NULL;
667 AddrRange tmp;
668 unsigned i;
669
670 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
671 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
672 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
673 int128_sub(fr->addr.start,
674 int128_make64(fr->offset_in_region)));
675 if (addrrange_intersects(fr->addr, tmp)) {
676 ++ioeventfd_nb;
677 ioeventfds = g_realloc(ioeventfds,
678 ioeventfd_nb * sizeof(*ioeventfds));
679 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
680 ioeventfds[ioeventfd_nb-1].addr = tmp;
681 }
682 }
683 }
684
685 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
686 as->ioeventfds, as->ioeventfd_nb);
687
688 g_free(as->ioeventfds);
689 as->ioeventfds = ioeventfds;
690 as->ioeventfd_nb = ioeventfd_nb;
691 }
692
693 static void address_space_update_topology_pass(AddressSpace *as,
694 FlatView old_view,
695 FlatView new_view,
696 bool adding)
697 {
698 unsigned iold, inew;
699 FlatRange *frold, *frnew;
700
701 /* Generate a symmetric difference of the old and new memory maps.
702 * Kill ranges in the old map, and instantiate ranges in the new map.
703 */
704 iold = inew = 0;
705 while (iold < old_view.nr || inew < new_view.nr) {
706 if (iold < old_view.nr) {
707 frold = &old_view.ranges[iold];
708 } else {
709 frold = NULL;
710 }
711 if (inew < new_view.nr) {
712 frnew = &new_view.ranges[inew];
713 } else {
714 frnew = NULL;
715 }
716
717 if (frold
718 && (!frnew
719 || int128_lt(frold->addr.start, frnew->addr.start)
720 || (int128_eq(frold->addr.start, frnew->addr.start)
721 && !flatrange_equal(frold, frnew)))) {
722 /* In old, but (not in new, or in new but attributes changed). */
723
724 if (!adding) {
725 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
726 }
727
728 ++iold;
729 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
730 /* In both (logging may have changed) */
731
732 if (adding) {
733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
734 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
736 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
737 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
738 }
739 }
740
741 ++iold;
742 ++inew;
743 } else {
744 /* In new */
745
746 if (adding) {
747 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
748 }
749
750 ++inew;
751 }
752 }
753 }
754
755
756 static void address_space_update_topology(AddressSpace *as)
757 {
758 FlatView old_view = *as->current_map;
759 FlatView new_view = generate_memory_topology(as->root);
760
761 address_space_update_topology_pass(as, old_view, new_view, false);
762 address_space_update_topology_pass(as, old_view, new_view, true);
763
764 *as->current_map = new_view;
765 flatview_destroy(&old_view);
766 address_space_update_ioeventfds(as);
767 }
768
769 void memory_region_transaction_begin(void)
770 {
771 qemu_flush_coalesced_mmio_buffer();
772 ++memory_region_transaction_depth;
773 }
774
775 void memory_region_transaction_commit(void)
776 {
777 AddressSpace *as;
778
779 assert(memory_region_transaction_depth);
780 --memory_region_transaction_depth;
781 if (!memory_region_transaction_depth && memory_region_update_pending) {
782 memory_region_update_pending = false;
783 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
784
785 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
786 address_space_update_topology(as);
787 }
788
789 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
790 }
791 }
792
793 static void memory_region_destructor_none(MemoryRegion *mr)
794 {
795 }
796
797 static void memory_region_destructor_ram(MemoryRegion *mr)
798 {
799 qemu_ram_free(mr->ram_addr);
800 }
801
802 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
803 {
804 qemu_ram_free_from_ptr(mr->ram_addr);
805 }
806
807 static void memory_region_destructor_rom_device(MemoryRegion *mr)
808 {
809 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
810 }
811
812 static bool memory_region_wrong_endianness(MemoryRegion *mr)
813 {
814 #ifdef TARGET_WORDS_BIGENDIAN
815 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
816 #else
817 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
818 #endif
819 }
820
821 void memory_region_init(MemoryRegion *mr,
822 const char *name,
823 uint64_t size)
824 {
825 mr->ops = &unassigned_mem_ops;
826 mr->opaque = NULL;
827 mr->parent = NULL;
828 mr->size = int128_make64(size);
829 if (size == UINT64_MAX) {
830 mr->size = int128_2_64();
831 }
832 mr->addr = 0;
833 mr->subpage = false;
834 mr->enabled = true;
835 mr->terminates = false;
836 mr->ram = false;
837 mr->romd_mode = true;
838 mr->readonly = false;
839 mr->rom_device = false;
840 mr->destructor = memory_region_destructor_none;
841 mr->priority = 0;
842 mr->may_overlap = false;
843 mr->alias = NULL;
844 QTAILQ_INIT(&mr->subregions);
845 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
846 QTAILQ_INIT(&mr->coalesced);
847 mr->name = g_strdup(name);
848 mr->dirty_log_mask = 0;
849 mr->ioeventfd_nb = 0;
850 mr->ioeventfds = NULL;
851 mr->flush_coalesced_mmio = false;
852 }
853
854 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
855 unsigned size)
856 {
857 #ifdef DEBUG_UNASSIGNED
858 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
859 #endif
860 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
861 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
862 #endif
863 return 0;
864 }
865
866 static void unassigned_mem_write(void *opaque, hwaddr addr,
867 uint64_t val, unsigned size)
868 {
869 #ifdef DEBUG_UNASSIGNED
870 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
871 #endif
872 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
873 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
874 #endif
875 }
876
877 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
878 unsigned size, bool is_write)
879 {
880 return false;
881 }
882
883 const MemoryRegionOps unassigned_mem_ops = {
884 .valid.accepts = unassigned_mem_accepts,
885 .endianness = DEVICE_NATIVE_ENDIAN,
886 };
887
888 bool memory_region_access_valid(MemoryRegion *mr,
889 hwaddr addr,
890 unsigned size,
891 bool is_write)
892 {
893 int access_size_min, access_size_max;
894 int access_size, i;
895
896 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
897 return false;
898 }
899
900 if (!mr->ops->valid.accepts) {
901 return true;
902 }
903
904 access_size_min = mr->ops->valid.min_access_size;
905 if (!mr->ops->valid.min_access_size) {
906 access_size_min = 1;
907 }
908
909 access_size_max = mr->ops->valid.max_access_size;
910 if (!mr->ops->valid.max_access_size) {
911 access_size_max = 4;
912 }
913
914 access_size = MAX(MIN(size, access_size_max), access_size_min);
915 for (i = 0; i < size; i += access_size) {
916 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
917 is_write)) {
918 return false;
919 }
920 }
921
922 return true;
923 }
924
925 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
926 hwaddr addr,
927 unsigned size)
928 {
929 uint64_t data = 0;
930
931 if (mr->ops->read) {
932 access_with_adjusted_size(addr, &data, size,
933 mr->ops->impl.min_access_size,
934 mr->ops->impl.max_access_size,
935 memory_region_read_accessor, mr);
936 } else {
937 access_with_adjusted_size(addr, &data, size, 1, 4,
938 memory_region_oldmmio_read_accessor, mr);
939 }
940
941 return data;
942 }
943
944 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
945 {
946 if (memory_region_wrong_endianness(mr)) {
947 switch (size) {
948 case 1:
949 break;
950 case 2:
951 *data = bswap16(*data);
952 break;
953 case 4:
954 *data = bswap32(*data);
955 break;
956 case 8:
957 *data = bswap64(*data);
958 break;
959 default:
960 abort();
961 }
962 }
963 }
964
965 static bool memory_region_dispatch_read(MemoryRegion *mr,
966 hwaddr addr,
967 uint64_t *pval,
968 unsigned size)
969 {
970 if (!memory_region_access_valid(mr, addr, size, false)) {
971 *pval = unassigned_mem_read(mr, addr, size);
972 return true;
973 }
974
975 *pval = memory_region_dispatch_read1(mr, addr, size);
976 adjust_endianness(mr, pval, size);
977 return false;
978 }
979
980 static bool memory_region_dispatch_write(MemoryRegion *mr,
981 hwaddr addr,
982 uint64_t data,
983 unsigned size)
984 {
985 if (!memory_region_access_valid(mr, addr, size, true)) {
986 unassigned_mem_write(mr, addr, data, size);
987 return true;
988 }
989
990 adjust_endianness(mr, &data, size);
991
992 if (mr->ops->write) {
993 access_with_adjusted_size(addr, &data, size,
994 mr->ops->impl.min_access_size,
995 mr->ops->impl.max_access_size,
996 memory_region_write_accessor, mr);
997 } else {
998 access_with_adjusted_size(addr, &data, size, 1, 4,
999 memory_region_oldmmio_write_accessor, mr);
1000 }
1001 return false;
1002 }
1003
1004 void memory_region_init_io(MemoryRegion *mr,
1005 const MemoryRegionOps *ops,
1006 void *opaque,
1007 const char *name,
1008 uint64_t size)
1009 {
1010 memory_region_init(mr, name, size);
1011 mr->ops = ops;
1012 mr->opaque = opaque;
1013 mr->terminates = true;
1014 mr->ram_addr = ~(ram_addr_t)0;
1015 }
1016
1017 void memory_region_init_ram(MemoryRegion *mr,
1018 const char *name,
1019 uint64_t size)
1020 {
1021 memory_region_init(mr, name, size);
1022 mr->ram = true;
1023 mr->terminates = true;
1024 mr->destructor = memory_region_destructor_ram;
1025 mr->ram_addr = qemu_ram_alloc(size, mr);
1026 }
1027
1028 void memory_region_init_ram_ptr(MemoryRegion *mr,
1029 const char *name,
1030 uint64_t size,
1031 void *ptr)
1032 {
1033 memory_region_init(mr, name, size);
1034 mr->ram = true;
1035 mr->terminates = true;
1036 mr->destructor = memory_region_destructor_ram_from_ptr;
1037 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1038 }
1039
1040 void memory_region_init_alias(MemoryRegion *mr,
1041 const char *name,
1042 MemoryRegion *orig,
1043 hwaddr offset,
1044 uint64_t size)
1045 {
1046 memory_region_init(mr, name, size);
1047 mr->alias = orig;
1048 mr->alias_offset = offset;
1049 }
1050
1051 void memory_region_init_rom_device(MemoryRegion *mr,
1052 const MemoryRegionOps *ops,
1053 void *opaque,
1054 const char *name,
1055 uint64_t size)
1056 {
1057 memory_region_init(mr, name, size);
1058 mr->ops = ops;
1059 mr->opaque = opaque;
1060 mr->terminates = true;
1061 mr->rom_device = true;
1062 mr->destructor = memory_region_destructor_rom_device;
1063 mr->ram_addr = qemu_ram_alloc(size, mr);
1064 }
1065
1066 void memory_region_init_reservation(MemoryRegion *mr,
1067 const char *name,
1068 uint64_t size)
1069 {
1070 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1071 }
1072
1073 void memory_region_destroy(MemoryRegion *mr)
1074 {
1075 assert(QTAILQ_EMPTY(&mr->subregions));
1076 assert(memory_region_transaction_depth == 0);
1077 mr->destructor(mr);
1078 memory_region_clear_coalescing(mr);
1079 g_free((char *)mr->name);
1080 g_free(mr->ioeventfds);
1081 }
1082
1083 uint64_t memory_region_size(MemoryRegion *mr)
1084 {
1085 if (int128_eq(mr->size, int128_2_64())) {
1086 return UINT64_MAX;
1087 }
1088 return int128_get64(mr->size);
1089 }
1090
1091 const char *memory_region_name(MemoryRegion *mr)
1092 {
1093 return mr->name;
1094 }
1095
1096 bool memory_region_is_ram(MemoryRegion *mr)
1097 {
1098 return mr->ram;
1099 }
1100
1101 bool memory_region_is_logging(MemoryRegion *mr)
1102 {
1103 return mr->dirty_log_mask;
1104 }
1105
1106 bool memory_region_is_rom(MemoryRegion *mr)
1107 {
1108 return mr->ram && mr->readonly;
1109 }
1110
1111 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1112 {
1113 uint8_t mask = 1 << client;
1114
1115 memory_region_transaction_begin();
1116 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1117 memory_region_update_pending |= mr->enabled;
1118 memory_region_transaction_commit();
1119 }
1120
1121 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1122 hwaddr size, unsigned client)
1123 {
1124 assert(mr->terminates);
1125 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1126 1 << client);
1127 }
1128
1129 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1130 hwaddr size)
1131 {
1132 assert(mr->terminates);
1133 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1134 }
1135
1136 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1137 hwaddr size, unsigned client)
1138 {
1139 bool ret;
1140 assert(mr->terminates);
1141 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1142 1 << client);
1143 if (ret) {
1144 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1145 mr->ram_addr + addr + size,
1146 1 << client);
1147 }
1148 return ret;
1149 }
1150
1151
1152 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1153 {
1154 AddressSpace *as;
1155 FlatRange *fr;
1156
1157 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1158 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1159 if (fr->mr == mr) {
1160 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1161 }
1162 }
1163 }
1164 }
1165
1166 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1167 {
1168 if (mr->readonly != readonly) {
1169 memory_region_transaction_begin();
1170 mr->readonly = readonly;
1171 memory_region_update_pending |= mr->enabled;
1172 memory_region_transaction_commit();
1173 }
1174 }
1175
1176 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1177 {
1178 if (mr->romd_mode != romd_mode) {
1179 memory_region_transaction_begin();
1180 mr->romd_mode = romd_mode;
1181 memory_region_update_pending |= mr->enabled;
1182 memory_region_transaction_commit();
1183 }
1184 }
1185
1186 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1187 hwaddr size, unsigned client)
1188 {
1189 assert(mr->terminates);
1190 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1191 mr->ram_addr + addr + size,
1192 1 << client);
1193 }
1194
1195 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1196 {
1197 if (mr->alias) {
1198 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1199 }
1200
1201 assert(mr->terminates);
1202
1203 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1204 }
1205
1206 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1207 {
1208 FlatRange *fr;
1209 CoalescedMemoryRange *cmr;
1210 AddrRange tmp;
1211 MemoryRegionSection section;
1212
1213 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1214 if (fr->mr == mr) {
1215 section = (MemoryRegionSection) {
1216 .address_space = as,
1217 .offset_within_address_space = int128_get64(fr->addr.start),
1218 .size = int128_get64(fr->addr.size),
1219 };
1220
1221 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1222 int128_get64(fr->addr.start),
1223 int128_get64(fr->addr.size));
1224 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1225 tmp = addrrange_shift(cmr->addr,
1226 int128_sub(fr->addr.start,
1227 int128_make64(fr->offset_in_region)));
1228 if (!addrrange_intersects(tmp, fr->addr)) {
1229 continue;
1230 }
1231 tmp = addrrange_intersection(tmp, fr->addr);
1232 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1233 int128_get64(tmp.start),
1234 int128_get64(tmp.size));
1235 }
1236 }
1237 }
1238 }
1239
1240 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1241 {
1242 AddressSpace *as;
1243
1244 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1245 memory_region_update_coalesced_range_as(mr, as);
1246 }
1247 }
1248
1249 void memory_region_set_coalescing(MemoryRegion *mr)
1250 {
1251 memory_region_clear_coalescing(mr);
1252 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1253 }
1254
1255 void memory_region_add_coalescing(MemoryRegion *mr,
1256 hwaddr offset,
1257 uint64_t size)
1258 {
1259 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1260
1261 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1262 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1263 memory_region_update_coalesced_range(mr);
1264 memory_region_set_flush_coalesced(mr);
1265 }
1266
1267 void memory_region_clear_coalescing(MemoryRegion *mr)
1268 {
1269 CoalescedMemoryRange *cmr;
1270
1271 qemu_flush_coalesced_mmio_buffer();
1272 mr->flush_coalesced_mmio = false;
1273
1274 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1275 cmr = QTAILQ_FIRST(&mr->coalesced);
1276 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1277 g_free(cmr);
1278 }
1279 memory_region_update_coalesced_range(mr);
1280 }
1281
1282 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1283 {
1284 mr->flush_coalesced_mmio = true;
1285 }
1286
1287 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1288 {
1289 qemu_flush_coalesced_mmio_buffer();
1290 if (QTAILQ_EMPTY(&mr->coalesced)) {
1291 mr->flush_coalesced_mmio = false;
1292 }
1293 }
1294
1295 void memory_region_add_eventfd(MemoryRegion *mr,
1296 hwaddr addr,
1297 unsigned size,
1298 bool match_data,
1299 uint64_t data,
1300 EventNotifier *e)
1301 {
1302 MemoryRegionIoeventfd mrfd = {
1303 .addr.start = int128_make64(addr),
1304 .addr.size = int128_make64(size),
1305 .match_data = match_data,
1306 .data = data,
1307 .e = e,
1308 };
1309 unsigned i;
1310
1311 adjust_endianness(mr, &mrfd.data, size);
1312 memory_region_transaction_begin();
1313 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1314 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1315 break;
1316 }
1317 }
1318 ++mr->ioeventfd_nb;
1319 mr->ioeventfds = g_realloc(mr->ioeventfds,
1320 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1321 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1322 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1323 mr->ioeventfds[i] = mrfd;
1324 memory_region_update_pending |= mr->enabled;
1325 memory_region_transaction_commit();
1326 }
1327
1328 void memory_region_del_eventfd(MemoryRegion *mr,
1329 hwaddr addr,
1330 unsigned size,
1331 bool match_data,
1332 uint64_t data,
1333 EventNotifier *e)
1334 {
1335 MemoryRegionIoeventfd mrfd = {
1336 .addr.start = int128_make64(addr),
1337 .addr.size = int128_make64(size),
1338 .match_data = match_data,
1339 .data = data,
1340 .e = e,
1341 };
1342 unsigned i;
1343
1344 adjust_endianness(mr, &mrfd.data, size);
1345 memory_region_transaction_begin();
1346 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1347 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1348 break;
1349 }
1350 }
1351 assert(i != mr->ioeventfd_nb);
1352 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1353 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1354 --mr->ioeventfd_nb;
1355 mr->ioeventfds = g_realloc(mr->ioeventfds,
1356 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1357 memory_region_update_pending |= mr->enabled;
1358 memory_region_transaction_commit();
1359 }
1360
1361 static void memory_region_add_subregion_common(MemoryRegion *mr,
1362 hwaddr offset,
1363 MemoryRegion *subregion)
1364 {
1365 MemoryRegion *other;
1366
1367 memory_region_transaction_begin();
1368
1369 assert(!subregion->parent);
1370 subregion->parent = mr;
1371 subregion->addr = offset;
1372 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1373 if (subregion->may_overlap || other->may_overlap) {
1374 continue;
1375 }
1376 if (int128_ge(int128_make64(offset),
1377 int128_add(int128_make64(other->addr), other->size))
1378 || int128_le(int128_add(int128_make64(offset), subregion->size),
1379 int128_make64(other->addr))) {
1380 continue;
1381 }
1382 #if 0
1383 printf("warning: subregion collision %llx/%llx (%s) "
1384 "vs %llx/%llx (%s)\n",
1385 (unsigned long long)offset,
1386 (unsigned long long)int128_get64(subregion->size),
1387 subregion->name,
1388 (unsigned long long)other->addr,
1389 (unsigned long long)int128_get64(other->size),
1390 other->name);
1391 #endif
1392 }
1393 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1394 if (subregion->priority >= other->priority) {
1395 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1396 goto done;
1397 }
1398 }
1399 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1400 done:
1401 memory_region_update_pending |= mr->enabled && subregion->enabled;
1402 memory_region_transaction_commit();
1403 }
1404
1405
1406 void memory_region_add_subregion(MemoryRegion *mr,
1407 hwaddr offset,
1408 MemoryRegion *subregion)
1409 {
1410 subregion->may_overlap = false;
1411 subregion->priority = 0;
1412 memory_region_add_subregion_common(mr, offset, subregion);
1413 }
1414
1415 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1416 hwaddr offset,
1417 MemoryRegion *subregion,
1418 unsigned priority)
1419 {
1420 subregion->may_overlap = true;
1421 subregion->priority = priority;
1422 memory_region_add_subregion_common(mr, offset, subregion);
1423 }
1424
1425 void memory_region_del_subregion(MemoryRegion *mr,
1426 MemoryRegion *subregion)
1427 {
1428 memory_region_transaction_begin();
1429 assert(subregion->parent == mr);
1430 subregion->parent = NULL;
1431 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1432 memory_region_update_pending |= mr->enabled && subregion->enabled;
1433 memory_region_transaction_commit();
1434 }
1435
1436 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1437 {
1438 if (enabled == mr->enabled) {
1439 return;
1440 }
1441 memory_region_transaction_begin();
1442 mr->enabled = enabled;
1443 memory_region_update_pending = true;
1444 memory_region_transaction_commit();
1445 }
1446
1447 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1448 {
1449 MemoryRegion *parent = mr->parent;
1450 unsigned priority = mr->priority;
1451 bool may_overlap = mr->may_overlap;
1452
1453 if (addr == mr->addr || !parent) {
1454 mr->addr = addr;
1455 return;
1456 }
1457
1458 memory_region_transaction_begin();
1459 memory_region_del_subregion(parent, mr);
1460 if (may_overlap) {
1461 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1462 } else {
1463 memory_region_add_subregion(parent, addr, mr);
1464 }
1465 memory_region_transaction_commit();
1466 }
1467
1468 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1469 {
1470 assert(mr->alias);
1471
1472 if (offset == mr->alias_offset) {
1473 return;
1474 }
1475
1476 memory_region_transaction_begin();
1477 mr->alias_offset = offset;
1478 memory_region_update_pending |= mr->enabled;
1479 memory_region_transaction_commit();
1480 }
1481
1482 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1483 {
1484 return mr->ram_addr;
1485 }
1486
1487 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1488 {
1489 const AddrRange *addr = addr_;
1490 const FlatRange *fr = fr_;
1491
1492 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1493 return -1;
1494 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1495 return 1;
1496 }
1497 return 0;
1498 }
1499
1500 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1501 {
1502 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1503 sizeof(FlatRange), cmp_flatrange_addr);
1504 }
1505
1506 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1507 hwaddr addr, uint64_t size)
1508 {
1509 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1510 MemoryRegion *root;
1511 AddressSpace *as;
1512 AddrRange range;
1513 FlatRange *fr;
1514
1515 addr += mr->addr;
1516 for (root = mr; root->parent; ) {
1517 root = root->parent;
1518 addr += root->addr;
1519 }
1520
1521 as = memory_region_to_address_space(root);
1522 range = addrrange_make(int128_make64(addr), int128_make64(size));
1523 fr = address_space_lookup(as, range);
1524 if (!fr) {
1525 return ret;
1526 }
1527
1528 while (fr > as->current_map->ranges
1529 && addrrange_intersects(fr[-1].addr, range)) {
1530 --fr;
1531 }
1532
1533 ret.mr = fr->mr;
1534 ret.address_space = as;
1535 range = addrrange_intersection(range, fr->addr);
1536 ret.offset_within_region = fr->offset_in_region;
1537 ret.offset_within_region += int128_get64(int128_sub(range.start,
1538 fr->addr.start));
1539 ret.size = int128_get64(range.size);
1540 ret.offset_within_address_space = int128_get64(range.start);
1541 ret.readonly = fr->readonly;
1542 return ret;
1543 }
1544
1545 void address_space_sync_dirty_bitmap(AddressSpace *as)
1546 {
1547 FlatRange *fr;
1548
1549 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1550 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1551 }
1552 }
1553
1554 void memory_global_dirty_log_start(void)
1555 {
1556 global_dirty_log = true;
1557 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1558 }
1559
1560 void memory_global_dirty_log_stop(void)
1561 {
1562 global_dirty_log = false;
1563 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1564 }
1565
1566 static void listener_add_address_space(MemoryListener *listener,
1567 AddressSpace *as)
1568 {
1569 FlatRange *fr;
1570
1571 if (listener->address_space_filter
1572 && listener->address_space_filter != as) {
1573 return;
1574 }
1575
1576 if (global_dirty_log) {
1577 if (listener->log_global_start) {
1578 listener->log_global_start(listener);
1579 }
1580 }
1581
1582 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1583 MemoryRegionSection section = {
1584 .mr = fr->mr,
1585 .address_space = as,
1586 .offset_within_region = fr->offset_in_region,
1587 .size = int128_get64(fr->addr.size),
1588 .offset_within_address_space = int128_get64(fr->addr.start),
1589 .readonly = fr->readonly,
1590 };
1591 if (listener->region_add) {
1592 listener->region_add(listener, &section);
1593 }
1594 }
1595 }
1596
1597 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1598 {
1599 MemoryListener *other = NULL;
1600 AddressSpace *as;
1601
1602 listener->address_space_filter = filter;
1603 if (QTAILQ_EMPTY(&memory_listeners)
1604 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1605 memory_listeners)->priority) {
1606 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1607 } else {
1608 QTAILQ_FOREACH(other, &memory_listeners, link) {
1609 if (listener->priority < other->priority) {
1610 break;
1611 }
1612 }
1613 QTAILQ_INSERT_BEFORE(other, listener, link);
1614 }
1615
1616 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1617 listener_add_address_space(listener, as);
1618 }
1619 }
1620
1621 void memory_listener_unregister(MemoryListener *listener)
1622 {
1623 QTAILQ_REMOVE(&memory_listeners, listener, link);
1624 }
1625
1626 void address_space_init(AddressSpace *as, MemoryRegion *root)
1627 {
1628 memory_region_transaction_begin();
1629 as->root = root;
1630 as->current_map = g_new(FlatView, 1);
1631 flatview_init(as->current_map);
1632 as->ioeventfd_nb = 0;
1633 as->ioeventfds = NULL;
1634 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1635 as->name = NULL;
1636 address_space_init_dispatch(as);
1637 memory_region_update_pending |= root->enabled;
1638 memory_region_transaction_commit();
1639 }
1640
1641 void address_space_destroy(AddressSpace *as)
1642 {
1643 /* Flush out anything from MemoryListeners listening in on this */
1644 memory_region_transaction_begin();
1645 as->root = NULL;
1646 memory_region_transaction_commit();
1647 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1648 address_space_destroy_dispatch(as);
1649 flatview_destroy(as->current_map);
1650 g_free(as->current_map);
1651 g_free(as->ioeventfds);
1652 }
1653
1654 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1655 {
1656 return memory_region_dispatch_read(mr, addr, pval, size);
1657 }
1658
1659 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1660 uint64_t val, unsigned size)
1661 {
1662 return memory_region_dispatch_write(mr, addr, val, size);
1663 }
1664
1665 typedef struct MemoryRegionList MemoryRegionList;
1666
1667 struct MemoryRegionList {
1668 const MemoryRegion *mr;
1669 bool printed;
1670 QTAILQ_ENTRY(MemoryRegionList) queue;
1671 };
1672
1673 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1674
1675 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1676 const MemoryRegion *mr, unsigned int level,
1677 hwaddr base,
1678 MemoryRegionListHead *alias_print_queue)
1679 {
1680 MemoryRegionList *new_ml, *ml, *next_ml;
1681 MemoryRegionListHead submr_print_queue;
1682 const MemoryRegion *submr;
1683 unsigned int i;
1684
1685 if (!mr || !mr->enabled) {
1686 return;
1687 }
1688
1689 for (i = 0; i < level; i++) {
1690 mon_printf(f, " ");
1691 }
1692
1693 if (mr->alias) {
1694 MemoryRegionList *ml;
1695 bool found = false;
1696
1697 /* check if the alias is already in the queue */
1698 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1699 if (ml->mr == mr->alias && !ml->printed) {
1700 found = true;
1701 }
1702 }
1703
1704 if (!found) {
1705 ml = g_new(MemoryRegionList, 1);
1706 ml->mr = mr->alias;
1707 ml->printed = false;
1708 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1709 }
1710 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1711 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1712 "-" TARGET_FMT_plx "\n",
1713 base + mr->addr,
1714 base + mr->addr
1715 + (hwaddr)int128_get64(mr->size) - 1,
1716 mr->priority,
1717 mr->romd_mode ? 'R' : '-',
1718 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1719 : '-',
1720 mr->name,
1721 mr->alias->name,
1722 mr->alias_offset,
1723 mr->alias_offset
1724 + (hwaddr)int128_get64(mr->size) - 1);
1725 } else {
1726 mon_printf(f,
1727 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1728 base + mr->addr,
1729 base + mr->addr
1730 + (hwaddr)int128_get64(mr->size) - 1,
1731 mr->priority,
1732 mr->romd_mode ? 'R' : '-',
1733 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1734 : '-',
1735 mr->name);
1736 }
1737
1738 QTAILQ_INIT(&submr_print_queue);
1739
1740 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1741 new_ml = g_new(MemoryRegionList, 1);
1742 new_ml->mr = submr;
1743 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1744 if (new_ml->mr->addr < ml->mr->addr ||
1745 (new_ml->mr->addr == ml->mr->addr &&
1746 new_ml->mr->priority > ml->mr->priority)) {
1747 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1748 new_ml = NULL;
1749 break;
1750 }
1751 }
1752 if (new_ml) {
1753 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1754 }
1755 }
1756
1757 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1758 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1759 alias_print_queue);
1760 }
1761
1762 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1763 g_free(ml);
1764 }
1765 }
1766
1767 void mtree_info(fprintf_function mon_printf, void *f)
1768 {
1769 MemoryRegionListHead ml_head;
1770 MemoryRegionList *ml, *ml2;
1771 AddressSpace *as;
1772
1773 QTAILQ_INIT(&ml_head);
1774
1775 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1776 if (!as->name) {
1777 continue;
1778 }
1779 mon_printf(f, "%s\n", as->name);
1780 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1781 }
1782
1783 mon_printf(f, "aliases\n");
1784 /* print aliased regions */
1785 QTAILQ_FOREACH(ml, &ml_head, queue) {
1786 if (!ml->printed) {
1787 mon_printf(f, "%s\n", ml->mr->name);
1788 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1789 }
1790 }
1791
1792 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1793 g_free(ml);
1794 }
1795 }
AR7 emulation for QEMU