2 * PCM-3680i PCI CAN device (SJA1000 based) emulation
4 * Copyright (c) 2016 Deniz Eren (deniz.eren@icloud.com)
6 * Based on Kvaser PCI CAN device (SJA1000 based) emulation implemented by
7 * Jin Yang and Pavel Pisa
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "qemu/osdep.h"
29 #include "qemu/event_notifier.h"
30 #include "qemu/thread.h"
31 #include "qemu/sockets.h"
32 #include "qapi/error.h"
33 #include "chardev/char.h"
35 #include "hw/pci/pci.h"
36 #include "net/can_emu.h"
38 #include "can_sja1000.h"
40 #define TYPE_CAN_PCI_DEV "pcm3680_pci"
42 #define PCM3680i_PCI_DEV(obj) \
43 OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV)
45 /* the PCI device and vendor IDs */
46 #ifndef PCM3680i_PCI_VENDOR_ID1
47 #define PCM3680i_PCI_VENDOR_ID1 0x13fe
50 #ifndef PCM3680i_PCI_DEVICE_ID1
51 #define PCM3680i_PCI_DEVICE_ID1 0xc002
54 #define PCM3680i_PCI_SJA_COUNT 2
55 #define PCM3680i_PCI_SJA_RANGE 0x100
57 #define PCM3680i_PCI_BYTES_PER_SJA 0x20
59 typedef struct Pcm3680iPCIState
{
63 MemoryRegion sja_io
[PCM3680i_PCI_SJA_COUNT
];
65 CanSJA1000State sja_state
[PCM3680i_PCI_SJA_COUNT
];
68 char *model
; /* The model that support, only SJA1000 now. */
69 CanBusState
*canbus
[PCM3680i_PCI_SJA_COUNT
];
72 static void pcm3680i_pci_reset(DeviceState
*dev
)
74 Pcm3680iPCIState
*d
= PCM3680i_PCI_DEV(dev
);
77 for (i
= 0; i
< PCM3680i_PCI_SJA_COUNT
; i
++) {
78 can_sja_hardware_reset(&d
->sja_state
[i
]);
82 static uint64_t pcm3680i_pci_sja1_io_read(void *opaque
, hwaddr addr
,
85 Pcm3680iPCIState
*d
= opaque
;
86 CanSJA1000State
*s
= &d
->sja_state
[0];
88 if (addr
>= PCM3680i_PCI_BYTES_PER_SJA
) {
92 return can_sja_mem_read(s
, addr
, size
);
95 static void pcm3680i_pci_sja1_io_write(void *opaque
, hwaddr addr
,
96 uint64_t data
, unsigned size
)
98 Pcm3680iPCIState
*d
= opaque
;
99 CanSJA1000State
*s
= &d
->sja_state
[0];
101 if (addr
>= PCM3680i_PCI_BYTES_PER_SJA
) {
105 can_sja_mem_write(s
, addr
, data
, size
);
108 static uint64_t pcm3680i_pci_sja2_io_read(void *opaque
, hwaddr addr
,
111 Pcm3680iPCIState
*d
= opaque
;
112 CanSJA1000State
*s
= &d
->sja_state
[1];
114 if (addr
>= PCM3680i_PCI_BYTES_PER_SJA
) {
118 return can_sja_mem_read(s
, addr
, size
);
121 static void pcm3680i_pci_sja2_io_write(void *opaque
, hwaddr addr
, uint64_t data
,
124 Pcm3680iPCIState
*d
= opaque
;
125 CanSJA1000State
*s
= &d
->sja_state
[1];
127 if (addr
>= PCM3680i_PCI_BYTES_PER_SJA
) {
131 can_sja_mem_write(s
, addr
, data
, size
);
134 static const MemoryRegionOps pcm3680i_pci_sja1_io_ops
= {
135 .read
= pcm3680i_pci_sja1_io_read
,
136 .write
= pcm3680i_pci_sja1_io_write
,
137 .endianness
= DEVICE_LITTLE_ENDIAN
,
139 .max_access_size
= 1,
143 static const MemoryRegionOps pcm3680i_pci_sja2_io_ops
= {
144 .read
= pcm3680i_pci_sja2_io_read
,
145 .write
= pcm3680i_pci_sja2_io_write
,
146 .endianness
= DEVICE_LITTLE_ENDIAN
,
148 .max_access_size
= 1,
152 static void pcm3680i_pci_realize(PCIDevice
*pci_dev
, Error
**errp
)
154 Pcm3680iPCIState
*d
= PCM3680i_PCI_DEV(pci_dev
);
158 pci_conf
= pci_dev
->config
;
159 pci_conf
[PCI_INTERRUPT_PIN
] = 0x01; /* interrupt pin A */
161 d
->irq
= pci_allocate_irq(&d
->dev
);
163 for (i
= 0; i
< PCM3680i_PCI_SJA_COUNT
; i
++) {
164 can_sja_init(&d
->sja_state
[i
], d
->irq
);
167 for (i
= 0; i
< PCM3680i_PCI_SJA_COUNT
; i
++) {
168 if (can_sja_connect_to_bus(&d
->sja_state
[i
], d
->canbus
[i
]) < 0) {
169 error_setg(errp
, "can_sja_connect_to_bus failed");
174 memory_region_init_io(&d
->sja_io
[0], OBJECT(d
), &pcm3680i_pci_sja1_io_ops
,
175 d
, "pcm3680i_pci-sja1", PCM3680i_PCI_SJA_RANGE
);
177 memory_region_init_io(&d
->sja_io
[1], OBJECT(d
), &pcm3680i_pci_sja2_io_ops
,
178 d
, "pcm3680i_pci-sja2", PCM3680i_PCI_SJA_RANGE
);
180 for (i
= 0; i
< PCM3680i_PCI_SJA_COUNT
; i
++) {
181 pci_register_bar(&d
->dev
, /*BAR*/ i
, PCI_BASE_ADDRESS_SPACE_IO
,
186 static void pcm3680i_pci_exit(PCIDevice
*pci_dev
)
188 Pcm3680iPCIState
*d
= PCM3680i_PCI_DEV(pci_dev
);
191 for (i
= 0; i
< PCM3680i_PCI_SJA_COUNT
; i
++) {
192 can_sja_disconnect(&d
->sja_state
[i
]);
195 qemu_free_irq(d
->irq
);
198 static const VMStateDescription vmstate_pcm3680i_pci
= {
199 .name
= "pcm3680i_pci",
201 .minimum_version_id
= 1,
202 .minimum_version_id_old
= 1,
203 .fields
= (VMStateField
[]) {
204 VMSTATE_PCI_DEVICE(dev
, Pcm3680iPCIState
),
205 VMSTATE_STRUCT(sja_state
[0], Pcm3680iPCIState
, 0,
206 vmstate_can_sja
, CanSJA1000State
),
207 VMSTATE_STRUCT(sja_state
[1], Pcm3680iPCIState
, 0,
208 vmstate_can_sja
, CanSJA1000State
),
209 VMSTATE_END_OF_LIST()
213 static void pcm3680i_pci_instance_init(Object
*obj
)
215 Pcm3680iPCIState
*d
= PCM3680i_PCI_DEV(obj
);
217 object_property_add_link(obj
, "canbus0", TYPE_CAN_BUS
,
218 (Object
**)&d
->canbus
[0],
219 qdev_prop_allow_set_link_before_realize
,
221 object_property_add_link(obj
, "canbus1", TYPE_CAN_BUS
,
222 (Object
**)&d
->canbus
[1],
223 qdev_prop_allow_set_link_before_realize
,
227 static void pcm3680i_pci_class_init(ObjectClass
*klass
, void *data
)
229 DeviceClass
*dc
= DEVICE_CLASS(klass
);
230 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
232 k
->realize
= pcm3680i_pci_realize
;
233 k
->exit
= pcm3680i_pci_exit
;
234 k
->vendor_id
= PCM3680i_PCI_VENDOR_ID1
;
235 k
->device_id
= PCM3680i_PCI_DEVICE_ID1
;
237 k
->class_id
= 0x000c09;
238 k
->subsystem_vendor_id
= PCM3680i_PCI_VENDOR_ID1
;
239 k
->subsystem_id
= PCM3680i_PCI_DEVICE_ID1
;
240 dc
->desc
= "Pcm3680i PCICANx";
241 dc
->vmsd
= &vmstate_pcm3680i_pci
;
242 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
243 dc
->reset
= pcm3680i_pci_reset
;
246 static const TypeInfo pcm3680i_pci_info
= {
247 .name
= TYPE_CAN_PCI_DEV
,
248 .parent
= TYPE_PCI_DEVICE
,
249 .instance_size
= sizeof(Pcm3680iPCIState
),
250 .class_init
= pcm3680i_pci_class_init
,
251 .instance_init
= pcm3680i_pci_instance_init
,
252 .interfaces
= (InterfaceInfo
[]) {
253 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
258 static void pcm3680i_pci_register_types(void)
260 type_register_static(&pcm3680i_pci_info
);
263 type_init(pcm3680i_pci_register_types
)