2 * QEMU PowerPC sPAPR IRQ backend definitions
4 * Copyright (c) 2018, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
10 #ifndef HW_SPAPR_IRQ_H
11 #define HW_SPAPR_IRQ_H
13 #include "target/ppc/cpu-qom.h"
16 * IRQ range offsets per device type
18 #define SPAPR_IRQ_IPI 0x0
20 #define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */
21 #define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000)
22 #define SPAPR_IRQ_HOTPLUG (SPAPR_XIRQ_BASE + 0x0001)
23 #define SPAPR_IRQ_VIO (SPAPR_XIRQ_BASE + 0x0100) /* 256 VIO devices */
24 #define SPAPR_IRQ_PCI_LSI (SPAPR_XIRQ_BASE + 0x0200) /* 32+ PHBs devices */
26 /* Offset of the dynamic range covered by the bitmap allocator */
27 #define SPAPR_IRQ_MSI (SPAPR_XIRQ_BASE + 0x0300)
29 #define SPAPR_NR_XIRQS 0x1000
30 #define SPAPR_NR_MSIS (SPAPR_XIRQ_BASE + SPAPR_NR_XIRQS - SPAPR_IRQ_MSI)
32 typedef struct SpaprMachineState SpaprMachineState
;
34 typedef struct SpaprInterruptController SpaprInterruptController
;
36 #define TYPE_SPAPR_INTC "spapr-interrupt-controller"
37 #define SPAPR_INTC(obj) \
38 INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC)
39 #define SPAPR_INTC_CLASS(klass) \
40 OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC)
41 #define SPAPR_INTC_GET_CLASS(obj) \
42 OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC)
44 typedef struct SpaprInterruptControllerClass
{
45 InterfaceClass parent
;
48 * These methods will typically be called on all intcs, active and
51 int (*cpu_intc_create
)(SpaprInterruptController
*intc
,
52 PowerPCCPU
*cpu
, Error
**errp
);
53 } SpaprInterruptControllerClass
;
55 int spapr_irq_cpu_intc_create(SpaprMachineState
*spapr
,
56 PowerPCCPU
*cpu
, Error
**errp
);
59 void spapr_irq_msi_init(SpaprMachineState
*spapr
, uint32_t nr_msis
);
60 int spapr_irq_msi_alloc(SpaprMachineState
*spapr
, uint32_t num
, bool align
,
62 void spapr_irq_msi_free(SpaprMachineState
*spapr
, int irq
, uint32_t num
);
64 typedef struct SpaprIrq
{
70 int (*claim
)(SpaprMachineState
*spapr
, int irq
, bool lsi
, Error
**errp
);
71 void (*free
)(SpaprMachineState
*spapr
, int irq
);
72 void (*print_info
)(SpaprMachineState
*spapr
, Monitor
*mon
);
73 void (*dt_populate
)(SpaprMachineState
*spapr
, uint32_t nr_servers
,
74 void *fdt
, uint32_t phandle
);
75 int (*post_load
)(SpaprMachineState
*spapr
, int version_id
);
76 void (*reset
)(SpaprMachineState
*spapr
, Error
**errp
);
77 void (*set_irq
)(void *opaque
, int srcno
, int val
);
78 void (*init_kvm
)(SpaprMachineState
*spapr
, Error
**errp
);
81 extern SpaprIrq spapr_irq_xics
;
82 extern SpaprIrq spapr_irq_xics_legacy
;
83 extern SpaprIrq spapr_irq_xive
;
84 extern SpaprIrq spapr_irq_dual
;
86 void spapr_irq_init(SpaprMachineState
*spapr
, Error
**errp
);
87 int spapr_irq_claim(SpaprMachineState
*spapr
, int irq
, bool lsi
, Error
**errp
);
88 void spapr_irq_free(SpaprMachineState
*spapr
, int irq
, int num
);
89 qemu_irq
spapr_qirq(SpaprMachineState
*spapr
, int irq
);
90 int spapr_irq_post_load(SpaprMachineState
*spapr
, int version_id
);
91 void spapr_irq_reset(SpaprMachineState
*spapr
, Error
**errp
);
92 int spapr_irq_get_phandle(SpaprMachineState
*spapr
, void *fdt
, Error
**errp
);
95 * XICS legacy routines
97 int spapr_irq_find(SpaprMachineState
*spapr
, int num
, bool align
, Error
**errp
);
98 #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)