2 * QEMU PowerPC sPAPR IRQ interface
4 * Copyright (c) 2018, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
10 #include "qemu/osdep.h"
12 #include "qemu/error-report.h"
13 #include "qapi/error.h"
15 #include "hw/ppc/spapr.h"
16 #include "hw/ppc/spapr_cpu_core.h"
17 #include "hw/ppc/spapr_xive.h"
18 #include "hw/ppc/xics.h"
19 #include "hw/ppc/xics_spapr.h"
20 #include "hw/qdev-properties.h"
21 #include "cpu-models.h"
22 #include "sysemu/kvm.h"
26 static const TypeInfo spapr_intc_info
= {
27 .name
= TYPE_SPAPR_INTC
,
28 .parent
= TYPE_INTERFACE
,
29 .class_size
= sizeof(SpaprInterruptControllerClass
),
32 void spapr_irq_msi_init(SpaprMachineState
*spapr
, uint32_t nr_msis
)
34 spapr
->irq_map_nr
= nr_msis
;
35 spapr
->irq_map
= bitmap_new(spapr
->irq_map_nr
);
38 int spapr_irq_msi_alloc(SpaprMachineState
*spapr
, uint32_t num
, bool align
,
44 * The 'align_mask' parameter of bitmap_find_next_zero_area()
45 * should be one less than a power of 2; 0 means no
46 * alignment. Adapt the 'align' value of the former allocator
47 * to fit the requirements of bitmap_find_next_zero_area()
51 irq
= bitmap_find_next_zero_area(spapr
->irq_map
, spapr
->irq_map_nr
, 0, num
,
53 if (irq
== spapr
->irq_map_nr
) {
54 error_setg(errp
, "can't find a free %d-IRQ block", num
);
58 bitmap_set(spapr
->irq_map
, irq
, num
);
60 return irq
+ SPAPR_IRQ_MSI
;
63 void spapr_irq_msi_free(SpaprMachineState
*spapr
, int irq
, uint32_t num
)
65 bitmap_clear(spapr
->irq_map
, irq
- SPAPR_IRQ_MSI
, num
);
68 static void spapr_irq_init_kvm(SpaprMachineState
*spapr
,
69 SpaprIrq
*irq
, Error
**errp
)
71 MachineState
*machine
= MACHINE(spapr
);
72 Error
*local_err
= NULL
;
74 if (kvm_enabled() && machine_kernel_irqchip_allowed(machine
)) {
75 irq
->init_kvm(spapr
, &local_err
);
76 if (local_err
&& machine_kernel_irqchip_required(machine
)) {
77 error_prepend(&local_err
,
78 "kernel_irqchip requested but unavailable: ");
79 error_propagate(errp
, local_err
);
88 * We failed to initialize the KVM device, fallback to
91 error_prepend(&local_err
, "kernel_irqchip allowed but unavailable: ");
92 error_append_hint(&local_err
, "Falling back to kernel-irqchip=off\n");
93 warn_report_err(local_err
);
101 static int spapr_irq_claim_xics(SpaprMachineState
*spapr
, int irq
, bool lsi
,
104 ICSState
*ics
= spapr
->ics
;
107 assert(ics_valid_irq(ics
, irq
));
109 if (!ics_irq_free(ics
, irq
- ics
->offset
)) {
110 error_setg(errp
, "IRQ %d is not free", irq
);
114 ics_set_irq_type(ics
, irq
- ics
->offset
, lsi
);
118 static void spapr_irq_free_xics(SpaprMachineState
*spapr
, int irq
)
120 ICSState
*ics
= spapr
->ics
;
121 uint32_t srcno
= irq
- ics
->offset
;
123 assert(ics_valid_irq(ics
, irq
));
125 memset(&ics
->irqs
[srcno
], 0, sizeof(ICSIRQState
));
128 static void spapr_irq_print_info_xics(SpaprMachineState
*spapr
, Monitor
*mon
)
133 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
135 icp_pic_print_info(spapr_cpu_state(cpu
)->icp
, mon
);
138 ics_pic_print_info(spapr
->ics
, mon
);
141 static int spapr_irq_post_load_xics(SpaprMachineState
*spapr
, int version_id
)
143 if (!kvm_irqchip_in_kernel()) {
146 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
147 icp_resend(spapr_cpu_state(cpu
)->icp
);
153 static void spapr_irq_set_irq_xics(void *opaque
, int irq
, int val
)
155 SpaprMachineState
*spapr
= opaque
;
156 uint32_t srcno
= irq
- spapr
->ics
->offset
;
158 ics_set_irq(spapr
->ics
, srcno
, val
);
161 static void spapr_irq_reset_xics(SpaprMachineState
*spapr
, Error
**errp
)
163 Error
*local_err
= NULL
;
165 spapr_irq_init_kvm(spapr
, &spapr_irq_xics
, &local_err
);
167 error_propagate(errp
, local_err
);
172 static void spapr_irq_init_kvm_xics(SpaprMachineState
*spapr
, Error
**errp
)
175 xics_kvm_connect(spapr
, errp
);
179 SpaprIrq spapr_irq_xics
= {
180 .nr_xirqs
= SPAPR_NR_XIRQS
,
181 .nr_msis
= SPAPR_NR_MSIS
,
185 .claim
= spapr_irq_claim_xics
,
186 .free
= spapr_irq_free_xics
,
187 .print_info
= spapr_irq_print_info_xics
,
188 .dt_populate
= spapr_dt_xics
,
189 .post_load
= spapr_irq_post_load_xics
,
190 .reset
= spapr_irq_reset_xics
,
191 .set_irq
= spapr_irq_set_irq_xics
,
192 .init_kvm
= spapr_irq_init_kvm_xics
,
199 static int spapr_irq_claim_xive(SpaprMachineState
*spapr
, int irq
, bool lsi
,
202 return spapr_xive_irq_claim(spapr
->xive
, irq
, lsi
, errp
);
205 static void spapr_irq_free_xive(SpaprMachineState
*spapr
, int irq
)
207 spapr_xive_irq_free(spapr
->xive
, irq
);
210 static void spapr_irq_print_info_xive(SpaprMachineState
*spapr
,
216 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
218 xive_tctx_pic_print_info(spapr_cpu_state(cpu
)->tctx
, mon
);
221 spapr_xive_pic_print_info(spapr
->xive
, mon
);
224 static int spapr_irq_post_load_xive(SpaprMachineState
*spapr
, int version_id
)
226 return spapr_xive_post_load(spapr
->xive
, version_id
);
229 static void spapr_irq_reset_xive(SpaprMachineState
*spapr
, Error
**errp
)
232 Error
*local_err
= NULL
;
235 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
237 /* (TCG) Set the OS CAM line of the thread interrupt context. */
238 spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu
)->tctx
);
241 spapr_irq_init_kvm(spapr
, &spapr_irq_xive
, &local_err
);
243 error_propagate(errp
, local_err
);
247 /* Activate the XIVE MMIOs */
248 spapr_xive_mmio_set_enabled(spapr
->xive
, true);
251 static void spapr_irq_set_irq_xive(void *opaque
, int irq
, int val
)
253 SpaprMachineState
*spapr
= opaque
;
255 if (kvm_irqchip_in_kernel()) {
256 kvmppc_xive_source_set_irq(&spapr
->xive
->source
, irq
, val
);
258 xive_source_set_irq(&spapr
->xive
->source
, irq
, val
);
262 static void spapr_irq_init_kvm_xive(SpaprMachineState
*spapr
, Error
**errp
)
265 kvmppc_xive_connect(spapr
->xive
, errp
);
269 SpaprIrq spapr_irq_xive
= {
270 .nr_xirqs
= SPAPR_NR_XIRQS
,
271 .nr_msis
= SPAPR_NR_MSIS
,
275 .claim
= spapr_irq_claim_xive
,
276 .free
= spapr_irq_free_xive
,
277 .print_info
= spapr_irq_print_info_xive
,
278 .dt_populate
= spapr_dt_xive
,
279 .post_load
= spapr_irq_post_load_xive
,
280 .reset
= spapr_irq_reset_xive
,
281 .set_irq
= spapr_irq_set_irq_xive
,
282 .init_kvm
= spapr_irq_init_kvm_xive
,
286 * Dual XIVE and XICS IRQ backend.
288 * Both interrupt mode, XIVE and XICS, objects are created but the
289 * machine starts in legacy interrupt mode (XICS). It can be changed
290 * by the CAS negotiation process and, in that case, the new mode is
291 * activated after an extra machine reset.
295 * Returns the sPAPR IRQ backend negotiated by CAS. XICS is the
298 static SpaprIrq
*spapr_irq_current(SpaprMachineState
*spapr
)
300 return spapr_ovec_test(spapr
->ov5_cas
, OV5_XIVE_EXPLOIT
) ?
301 &spapr_irq_xive
: &spapr_irq_xics
;
304 static int spapr_irq_claim_dual(SpaprMachineState
*spapr
, int irq
, bool lsi
,
307 Error
*local_err
= NULL
;
310 ret
= spapr_irq_xics
.claim(spapr
, irq
, lsi
, &local_err
);
312 error_propagate(errp
, local_err
);
316 ret
= spapr_irq_xive
.claim(spapr
, irq
, lsi
, &local_err
);
318 error_propagate(errp
, local_err
);
325 static void spapr_irq_free_dual(SpaprMachineState
*spapr
, int irq
)
327 spapr_irq_xics
.free(spapr
, irq
);
328 spapr_irq_xive
.free(spapr
, irq
);
331 static void spapr_irq_print_info_dual(SpaprMachineState
*spapr
, Monitor
*mon
)
333 spapr_irq_current(spapr
)->print_info(spapr
, mon
);
336 static void spapr_irq_dt_populate_dual(SpaprMachineState
*spapr
,
337 uint32_t nr_servers
, void *fdt
,
340 spapr_irq_current(spapr
)->dt_populate(spapr
, nr_servers
, fdt
, phandle
);
343 static int spapr_irq_post_load_dual(SpaprMachineState
*spapr
, int version_id
)
346 * Force a reset of the XIVE backend after migration. The machine
347 * defaults to XICS at startup.
349 if (spapr_ovec_test(spapr
->ov5_cas
, OV5_XIVE_EXPLOIT
)) {
350 if (kvm_irqchip_in_kernel()) {
351 xics_kvm_disconnect(spapr
, &error_fatal
);
353 spapr_irq_xive
.reset(spapr
, &error_fatal
);
356 return spapr_irq_current(spapr
)->post_load(spapr
, version_id
);
359 static void spapr_irq_reset_dual(SpaprMachineState
*spapr
, Error
**errp
)
361 Error
*local_err
= NULL
;
364 * Deactivate the XIVE MMIOs. The XIVE backend will reenable them
367 spapr_xive_mmio_set_enabled(spapr
->xive
, false);
369 /* Destroy all KVM devices */
370 if (kvm_irqchip_in_kernel()) {
371 xics_kvm_disconnect(spapr
, &local_err
);
373 error_propagate(errp
, local_err
);
374 error_prepend(errp
, "KVM XICS disconnect failed: ");
377 kvmppc_xive_disconnect(spapr
->xive
, &local_err
);
379 error_propagate(errp
, local_err
);
380 error_prepend(errp
, "KVM XIVE disconnect failed: ");
385 spapr_irq_current(spapr
)->reset(spapr
, errp
);
388 static void spapr_irq_set_irq_dual(void *opaque
, int irq
, int val
)
390 SpaprMachineState
*spapr
= opaque
;
392 spapr_irq_current(spapr
)->set_irq(spapr
, irq
, val
);
396 * Define values in sync with the XIVE and XICS backend
398 SpaprIrq spapr_irq_dual
= {
399 .nr_xirqs
= SPAPR_NR_XIRQS
,
400 .nr_msis
= SPAPR_NR_MSIS
,
404 .claim
= spapr_irq_claim_dual
,
405 .free
= spapr_irq_free_dual
,
406 .print_info
= spapr_irq_print_info_dual
,
407 .dt_populate
= spapr_irq_dt_populate_dual
,
408 .post_load
= spapr_irq_post_load_dual
,
409 .reset
= spapr_irq_reset_dual
,
410 .set_irq
= spapr_irq_set_irq_dual
,
411 .init_kvm
= NULL
, /* should not be used */
415 static int spapr_irq_check(SpaprMachineState
*spapr
, Error
**errp
)
417 MachineState
*machine
= MACHINE(spapr
);
420 * Sanity checks on non-P9 machines. On these, XIVE is not
421 * advertised, see spapr_dt_ov5_platform_support()
423 if (!ppc_type_check_compat(machine
->cpu_type
, CPU_POWERPC_LOGICAL_3_00
,
424 0, spapr
->max_compat_pvr
)) {
426 * If the 'dual' interrupt mode is selected, force XICS as CAS
427 * negotiation is useless.
429 if (spapr
->irq
== &spapr_irq_dual
) {
430 spapr
->irq
= &spapr_irq_xics
;
435 * Non-P9 machines using only XIVE is a bogus setup. We have two
436 * scenarios to take into account because of the compat mode:
438 * 1. POWER7/8 machines should fail to init later on when creating
439 * the XIVE interrupt presenters because a POWER9 exception
442 * 2. POWER9 machines using the POWER8 compat mode won't fail and
443 * will let the OS boot with a partial XIVE setup : DT
444 * properties but no hcalls.
446 * To cover both and not confuse the OS, add an early failure in
449 if (spapr
->irq
== &spapr_irq_xive
) {
450 error_setg(errp
, "XIVE-only machines require a POWER9 CPU");
456 * On a POWER9 host, some older KVM XICS devices cannot be destroyed and
457 * re-created. Detect that early to avoid QEMU to exit later when the
461 spapr
->irq
== &spapr_irq_dual
&&
462 machine_kernel_irqchip_required(machine
) &&
463 xics_kvm_has_broken_disconnect(spapr
)) {
464 error_setg(errp
, "KVM is too old to support ic-mode=dual,kernel-irqchip=on");
472 * sPAPR IRQ frontend routines for devices
474 #define ALL_INTCS(spapr_) \
475 { SPAPR_INTC((spapr_)->ics), SPAPR_INTC((spapr_)->xive), }
477 int spapr_irq_cpu_intc_create(SpaprMachineState
*spapr
,
478 PowerPCCPU
*cpu
, Error
**errp
)
480 SpaprInterruptController
*intcs
[] = ALL_INTCS(spapr
);
484 for (i
= 0; i
< ARRAY_SIZE(intcs
); i
++) {
485 SpaprInterruptController
*intc
= intcs
[i
];
487 SpaprInterruptControllerClass
*sicc
= SPAPR_INTC_GET_CLASS(intc
);
488 rc
= sicc
->cpu_intc_create(intc
, cpu
, errp
);
498 void spapr_irq_init(SpaprMachineState
*spapr
, Error
**errp
)
500 MachineState
*machine
= MACHINE(spapr
);
502 if (machine_kernel_irqchip_split(machine
)) {
503 error_setg(errp
, "kernel_irqchip split mode not supported on pseries");
507 if (!kvm_enabled() && machine_kernel_irqchip_required(machine
)) {
509 "kernel_irqchip requested but only available with KVM");
513 if (spapr_irq_check(spapr
, errp
) < 0) {
517 /* Initialize the MSI IRQ allocator. */
518 if (!SPAPR_MACHINE_GET_CLASS(spapr
)->legacy_irq_allocation
) {
519 spapr_irq_msi_init(spapr
, spapr
->irq
->nr_msis
);
522 if (spapr
->irq
->xics
) {
523 Error
*local_err
= NULL
;
526 obj
= object_new(TYPE_ICS_SPAPR
);
527 object_property_add_child(OBJECT(spapr
), "ics", obj
, &local_err
);
529 error_propagate(errp
, local_err
);
533 object_property_add_const_link(obj
, ICS_PROP_XICS
, OBJECT(spapr
),
536 error_propagate(errp
, local_err
);
540 object_property_set_int(obj
, spapr
->irq
->nr_xirqs
, "nr-irqs",
543 error_propagate(errp
, local_err
);
547 object_property_set_bool(obj
, true, "realized", &local_err
);
549 error_propagate(errp
, local_err
);
553 spapr
->ics
= ICS_SPAPR(obj
);
556 if (spapr
->irq
->xive
) {
557 uint32_t nr_servers
= spapr_max_server_number(spapr
);
561 dev
= qdev_create(NULL
, TYPE_SPAPR_XIVE
);
562 qdev_prop_set_uint32(dev
, "nr-irqs",
563 spapr
->irq
->nr_xirqs
+ SPAPR_XIRQ_BASE
);
565 * 8 XIVE END structures per CPU. One for each available
568 qdev_prop_set_uint32(dev
, "nr-ends", nr_servers
<< 3);
569 qdev_init_nofail(dev
);
571 spapr
->xive
= SPAPR_XIVE(dev
);
573 /* Enable the CPU IPIs */
574 for (i
= 0; i
< nr_servers
; ++i
) {
575 if (spapr_xive_irq_claim(spapr
->xive
, SPAPR_IRQ_IPI
+ i
,
581 spapr_xive_hcall_init(spapr
);
584 spapr
->qirqs
= qemu_allocate_irqs(spapr
->irq
->set_irq
, spapr
,
585 spapr
->irq
->nr_xirqs
+ SPAPR_XIRQ_BASE
);
588 int spapr_irq_claim(SpaprMachineState
*spapr
, int irq
, bool lsi
, Error
**errp
)
590 assert(irq
>= SPAPR_XIRQ_BASE
);
591 assert(irq
< (spapr
->irq
->nr_xirqs
+ SPAPR_XIRQ_BASE
));
593 return spapr
->irq
->claim(spapr
, irq
, lsi
, errp
);
596 void spapr_irq_free(SpaprMachineState
*spapr
, int irq
, int num
)
600 assert(irq
>= SPAPR_XIRQ_BASE
);
601 assert((irq
+ num
) <= (spapr
->irq
->nr_xirqs
+ SPAPR_XIRQ_BASE
));
603 for (i
= irq
; i
< (irq
+ num
); i
++) {
604 spapr
->irq
->free(spapr
, i
);
608 qemu_irq
spapr_qirq(SpaprMachineState
*spapr
, int irq
)
611 * This interface is basically for VIO and PHB devices to find the
612 * right qemu_irq to manipulate, so we only allow access to the
613 * external irqs for now. Currently anything which needs to
614 * access the IPIs most naturally gets there via the guest side
615 * interfaces, we can change this if we need to in future.
617 assert(irq
>= SPAPR_XIRQ_BASE
);
618 assert(irq
< (spapr
->irq
->nr_xirqs
+ SPAPR_XIRQ_BASE
));
621 assert(ics_valid_irq(spapr
->ics
, irq
));
624 assert(irq
< spapr
->xive
->nr_irqs
);
625 assert(xive_eas_is_valid(&spapr
->xive
->eat
[irq
]));
628 return spapr
->qirqs
[irq
];
631 int spapr_irq_post_load(SpaprMachineState
*spapr
, int version_id
)
633 return spapr
->irq
->post_load(spapr
, version_id
);
636 void spapr_irq_reset(SpaprMachineState
*spapr
, Error
**errp
)
638 assert(!spapr
->irq_map
|| bitmap_empty(spapr
->irq_map
, spapr
->irq_map_nr
));
640 if (spapr
->irq
->reset
) {
641 spapr
->irq
->reset(spapr
, errp
);
645 int spapr_irq_get_phandle(SpaprMachineState
*spapr
, void *fdt
, Error
**errp
)
647 const char *nodename
= "interrupt-controller";
650 offset
= fdt_subnode_offset(fdt
, 0, nodename
);
652 error_setg(errp
, "Can't find node \"%s\": %s",
653 nodename
, fdt_strerror(offset
));
657 phandle
= fdt_get_phandle(fdt
, offset
);
659 error_setg(errp
, "Can't get phandle of node \"%s\"", nodename
);
667 * XICS legacy routines - to deprecate one day
670 static int ics_find_free_block(ICSState
*ics
, int num
, int alignnum
)
674 for (first
= 0; first
< ics
->nr_irqs
; first
+= alignnum
) {
675 if (num
> (ics
->nr_irqs
- first
)) {
678 for (i
= first
; i
< first
+ num
; ++i
) {
679 if (!ics_irq_free(ics
, i
)) {
683 if (i
== (first
+ num
)) {
691 int spapr_irq_find(SpaprMachineState
*spapr
, int num
, bool align
, Error
**errp
)
693 ICSState
*ics
= spapr
->ics
;
699 * MSIMesage::data is used for storing VIRQ so
700 * it has to be aligned to num to support multiple
701 * MSI vectors. MSI-X is not affected by this.
702 * The hint is used for the first IRQ, the rest should
703 * be allocated continuously.
706 assert((num
== 1) || (num
== 2) || (num
== 4) ||
707 (num
== 8) || (num
== 16) || (num
== 32));
708 first
= ics_find_free_block(ics
, num
, num
);
710 first
= ics_find_free_block(ics
, num
, 1);
714 error_setg(errp
, "can't find a free %d-IRQ block", num
);
718 return first
+ ics
->offset
;
721 #define SPAPR_IRQ_XICS_LEGACY_NR_XIRQS 0x400
723 SpaprIrq spapr_irq_xics_legacy
= {
724 .nr_xirqs
= SPAPR_IRQ_XICS_LEGACY_NR_XIRQS
,
725 .nr_msis
= SPAPR_IRQ_XICS_LEGACY_NR_XIRQS
,
729 .claim
= spapr_irq_claim_xics
,
730 .free
= spapr_irq_free_xics
,
731 .print_info
= spapr_irq_print_info_xics
,
732 .dt_populate
= spapr_dt_xics
,
733 .post_load
= spapr_irq_post_load_xics
,
734 .reset
= spapr_irq_reset_xics
,
735 .set_irq
= spapr_irq_set_irq_xics
,
736 .init_kvm
= spapr_irq_init_kvm_xics
,
739 static void spapr_irq_register_types(void)
741 type_register_static(&spapr_intc_info
);
744 type_init(spapr_irq_register_types
)