target/hppa: Include priv level in user-only iaoq
[qemu/ar7.git] / hw / ppc / mpc8544ds.c
blob1717953ec7c2321fb3c96e46bb0b29bdec603d72
1 /*
2 * Support for the PPC e500-based mpc8544ds board
4 * Copyright 2012 Freescale Semiconductor, Inc.
6 * This is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include "qemu/osdep.h"
13 #include "qemu-common.h"
14 #include "e500.h"
15 #include "hw/boards.h"
16 #include "sysemu/device_tree.h"
17 #include "hw/ppc/openpic.h"
18 #include "qemu/error-report.h"
19 #include "cpu.h"
21 static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
23 const char model[] = "MPC8544DS";
24 const char compatible[] = "MPC8544DS\0MPC85xxDS";
26 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
27 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
28 sizeof(compatible));
31 static void mpc8544ds_init(MachineState *machine)
33 PPCE500Params params = {
34 .pci_first_slot = 0x11,
35 .pci_nr_slots = 2,
36 .fixup_devtree = mpc8544ds_fixup_devtree,
37 .mpic_version = OPENPIC_MODEL_FSL_MPIC_20,
38 .ccsrbar_base = 0xE0000000ULL,
39 .pci_mmio_base = 0xC0000000ULL,
40 .pci_mmio_bus_base = 0xC0000000ULL,
41 .pci_pio_base = 0xE1000000ULL,
42 .spin_base = 0xEF000000ULL,
45 if (machine->ram_size > 0xc0000000) {
46 error_report("The MPC8544DS board only supports up to 3GB of RAM");
47 exit(1);
50 ppce500_init(machine, &params);
54 static void ppce500_machine_init(MachineClass *mc)
56 mc->desc = "mpc8544ds";
57 mc->init = mpc8544ds_init;
58 mc->max_cpus = 15;
59 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
62 DEFINE_MACHINE("mpc8544ds", ppce500_machine_init)