ui: avoid crash if vnc client disconnects with writes pending
[qemu/ar7.git] / target-arm / cpu-qom.h
blob3991173d47f8186f91c14e2655e84d084c2e7c0d
1 /*
2 * QEMU ARM CPU
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
20 #ifndef QEMU_ARM_CPU_QOM_H
21 #define QEMU_ARM_CPU_QOM_H
23 #include "qom/cpu.h"
25 struct arm_boot_info;
27 #define TYPE_ARM_CPU "arm-cpu"
29 #define ARM_CPU_CLASS(klass) \
30 OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU)
31 #define ARM_CPU(obj) \
32 OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU)
33 #define ARM_CPU_GET_CLASS(obj) \
34 OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
36 /**
37 * ARMCPUClass:
38 * @parent_realize: The parent class' realize handler.
39 * @parent_reset: The parent class' reset handler.
41 * An ARM CPU model.
43 typedef struct ARMCPUClass {
44 /*< private >*/
45 CPUClass parent_class;
46 /*< public >*/
48 DeviceRealize parent_realize;
49 void (*parent_reset)(CPUState *cpu);
50 } ARMCPUClass;
52 typedef struct ARMCPU ARMCPU;
54 #define TYPE_AARCH64_CPU "aarch64-cpu"
55 #define AARCH64_CPU_CLASS(klass) \
56 OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU)
57 #define AARCH64_CPU_GET_CLASS(obj) \
58 OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AArch64_CPU)
60 typedef struct AArch64CPUClass {
61 /*< private >*/
62 ARMCPUClass parent_class;
63 /*< public >*/
64 } AArch64CPUClass;
66 void register_cp_regs_for_features(ARMCPU *cpu);
67 void init_cpreg_list(ARMCPU *cpu);
69 /* Callback functions for the generic timer's timers. */
70 void arm_gt_ptimer_cb(void *opaque);
71 void arm_gt_vtimer_cb(void *opaque);
72 void arm_gt_htimer_cb(void *opaque);
73 void arm_gt_stimer_cb(void *opaque);
75 #define ARM_AFF0_SHIFT 0
76 #define ARM_AFF0_MASK (0xFFULL << ARM_AFF0_SHIFT)
77 #define ARM_AFF1_SHIFT 8
78 #define ARM_AFF1_MASK (0xFFULL << ARM_AFF1_SHIFT)
79 #define ARM_AFF2_SHIFT 16
80 #define ARM_AFF2_MASK (0xFFULL << ARM_AFF2_SHIFT)
81 #define ARM_AFF3_SHIFT 32
82 #define ARM_AFF3_MASK (0xFFULL << ARM_AFF3_SHIFT)
84 #define ARM32_AFFINITY_MASK (ARM_AFF0_MASK|ARM_AFF1_MASK|ARM_AFF2_MASK)
85 #define ARM64_AFFINITY_MASK \
86 (ARM_AFF0_MASK|ARM_AFF1_MASK|ARM_AFF2_MASK|ARM_AFF3_MASK)
88 #endif