hw/arm/npcm7xx_boards.c

   1 /*
   2  * Machine definitions for boards featuring an NPCM7xx SoC.
   3  *
   4  * Copyright 2020 Google LLC
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14  * for more details.
  15  */
  16
  17 #include "qemu/osdep.h"
  18
  19 #include "exec/address-spaces.h"
  20 #include "hw/arm/npcm7xx.h"
  21 #include "hw/core/cpu.h"
  22 #include "hw/loader.h"
  23 #include "hw/qdev-properties.h"
  24 #include "qapi/error.h"
  25 #include "qemu-common.h"
  26 #include "qemu/datadir.h"
  27 #include "qemu/units.h"
  28 #include "sysemu/sysemu.h"
  29
  30 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7
  31 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff
  32
  33 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
  34
  35 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
  36 {
  37     const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom;
  38     g_autofree char *filename = NULL;
  39     int ret;
  40
  41     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
  42     if (!filename) {
  43         error_report("Could not find ROM image '%s'", bios_name);
  44         if (!machine->kernel_filename) {
  45             /* We can't boot without a bootrom or a kernel image. */
  46             exit(1);
  47         }
  48         return;
  49     }
  50     ret = load_image_mr(filename, &soc->irom);
  51     if (ret < 0) {
  52         error_report("Failed to load ROM image '%s'", filename);
  53         exit(1);
  54     }
  55 }
  56
  57 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
  58                                   const char *flash_type, DriveInfo *dinfo)
  59 {
  60     DeviceState *flash;
  61     qemu_irq flash_cs;
  62
  63     flash = qdev_new(flash_type);
  64     if (dinfo) {
  65         qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
  66     }
  67     qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
  68
  69     flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
  70     qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
  71 }
  72
  73 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
  74 {
  75     memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
  76
  77     object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
  78                              &error_abort);
  79 }
  80
  81 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
  82                                         uint32_t hw_straps)
  83 {
  84     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
  85     MachineClass *mc = &nmc->parent;
  86     Object *obj;
  87
  88     if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
  89         error_report("This board can only be used with %s",
  90                      mc->default_cpu_type);
  91         exit(1);
  92     }
  93
  94     obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
  95                                 &error_abort, NULL);
  96     object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
  97
  98     return NPCM7XX(obj);
  99 }
 100
 101 static void npcm750_evb_init(MachineState *machine)
 102 {
 103     NPCM7xxState *soc;
 104
 105     soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
 106     npcm7xx_connect_dram(soc, machine->ram);
 107     qdev_realize(DEVICE(soc), NULL, &error_fatal);
 108
 109     npcm7xx_load_bootrom(machine, soc);
 110     npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0));
 111     npcm7xx_load_kernel(machine, soc);
 112 }
 113
 114 static void quanta_gsj_init(MachineState *machine)
 115 {
 116     NPCM7xxState *soc;
 117
 118     soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
 119     npcm7xx_connect_dram(soc, machine->ram);
 120     qdev_realize(DEVICE(soc), NULL, &error_fatal);
 121
 122     npcm7xx_load_bootrom(machine, soc);
 123     npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
 124                           drive_get(IF_MTD, 0, 0));
 125     npcm7xx_load_kernel(machine, soc);
 126 }
 127
 128 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
 129 {
 130     NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
 131     MachineClass *mc = MACHINE_CLASS(nmc);
 132
 133     nmc->soc_type = type;
 134     mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
 135 }
 136
 137 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
 138 {
 139     MachineClass *mc = MACHINE_CLASS(oc);
 140
 141     mc->no_floppy = 1;
 142     mc->no_cdrom = 1;
 143     mc->no_parallel = 1;
 144     mc->default_ram_id = "ram";
 145     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
 146 }
 147
 148 /*
 149  * Schematics:
 150  * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
 151  */
 152 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
 153 {
 154     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
 155     MachineClass *mc = MACHINE_CLASS(oc);
 156
 157     npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
 158
 159     mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex A9)";
 160     mc->init = npcm750_evb_init;
 161     mc->default_ram_size = 512 * MiB;
 162 };
 163
 164 static void gsj_machine_class_init(ObjectClass *oc, void *data)
 165 {
 166     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
 167     MachineClass *mc = MACHINE_CLASS(oc);
 168
 169     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
 170
 171     mc->desc = "Quanta GSJ (Cortex A9)";
 172     mc->init = quanta_gsj_init;
 173     mc->default_ram_size = 512 * MiB;
 174 };
 175
 176 static const TypeInfo npcm7xx_machine_types[] = {
 177     {
 178         .name           = TYPE_NPCM7XX_MACHINE,
 179         .parent         = TYPE_MACHINE,
 180         .instance_size  = sizeof(NPCM7xxMachine),
 181         .class_size     = sizeof(NPCM7xxMachineClass),
 182         .class_init     = npcm7xx_machine_class_init,
 183         .abstract       = true,
 184     }, {
 185         .name           = MACHINE_TYPE_NAME("npcm750-evb"),
 186         .parent         = TYPE_NPCM7XX_MACHINE,
 187         .class_init     = npcm750_evb_machine_class_init,
 188     }, {
 189         .name           = MACHINE_TYPE_NAME("quanta-gsj"),
 190         .parent         = TYPE_NPCM7XX_MACHINE,
 191         .class_init     = gsj_machine_class_init,
 192     },
 193 };
 194
 195 DEFINE_TYPES(npcm7xx_machine_types)