qemu-deprecated.texi: Rename the HMP section
[qemu/ar7.git] / hw / arm / xlnx-zcu102.c
blobb6bc6a93b8984a3a6faf8bb709358e91a9a229a8
1 /*
2 * Xilinx ZynqMP ZCU102 board
4 * Copyright (C) 2015 Xilinx Inc
5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
18 #include "qemu/osdep.h"
19 #include "qapi/error.h"
20 #include "qemu-common.h"
21 #include "cpu.h"
22 #include "hw/arm/xlnx-zynqmp.h"
23 #include "hw/boards.h"
24 #include "qemu/error-report.h"
25 #include "qemu/log.h"
26 #include "sysemu/qtest.h"
28 typedef struct XlnxZCU102 {
29 MachineState parent_obj;
31 XlnxZynqMPState soc;
32 MemoryRegion ddr_ram;
34 bool secure;
35 bool virt;
36 } XlnxZCU102;
38 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
39 #define ZCU102_MACHINE(obj) \
40 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
42 static struct arm_boot_info xlnx_zcu102_binfo;
44 static bool zcu102_get_secure(Object *obj, Error **errp)
46 XlnxZCU102 *s = ZCU102_MACHINE(obj);
48 return s->secure;
51 static void zcu102_set_secure(Object *obj, bool value, Error **errp)
53 XlnxZCU102 *s = ZCU102_MACHINE(obj);
55 s->secure = value;
58 static bool zcu102_get_virt(Object *obj, Error **errp)
60 XlnxZCU102 *s = ZCU102_MACHINE(obj);
62 return s->virt;
65 static void zcu102_set_virt(Object *obj, bool value, Error **errp)
67 XlnxZCU102 *s = ZCU102_MACHINE(obj);
69 s->virt = value;
72 static void xlnx_zcu102_init(MachineState *machine)
74 XlnxZCU102 *s = ZCU102_MACHINE(machine);
75 int i;
76 uint64_t ram_size = machine->ram_size;
78 /* Create the memory region to pass to the SoC */
79 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
80 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
81 "0x%llx", ram_size,
82 XLNX_ZYNQMP_MAX_RAM_SIZE);
83 exit(1);
86 if (ram_size < 0x08000000) {
87 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
88 ram_size);
91 memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
92 ram_size);
94 object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
95 object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
96 &error_abort);
98 object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
99 "ddr-ram", &error_abort);
100 object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
101 &error_fatal);
102 object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
103 &error_fatal);
105 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
107 /* Create and plug in the SD cards */
108 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
109 BusState *bus;
110 DriveInfo *di = drive_get_next(IF_SD);
111 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
112 DeviceState *carddev;
113 char *bus_name;
115 bus_name = g_strdup_printf("sd-bus%d", i);
116 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
117 g_free(bus_name);
118 if (!bus) {
119 error_report("No SD bus found for SD card %d", i);
120 exit(1);
122 carddev = qdev_create(bus, TYPE_SD_CARD);
123 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
124 object_property_set_bool(OBJECT(carddev), true, "realized",
125 &error_fatal);
128 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
129 SSIBus *spi_bus;
130 DeviceState *flash_dev;
131 qemu_irq cs_line;
132 DriveInfo *dinfo = drive_get_next(IF_MTD);
133 gchar *bus_name = g_strdup_printf("spi%d", i);
135 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
136 g_free(bus_name);
138 flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
139 if (dinfo) {
140 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
141 &error_fatal);
143 qdev_init_nofail(flash_dev);
145 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
147 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
150 for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
151 SSIBus *spi_bus;
152 DeviceState *flash_dev;
153 qemu_irq cs_line;
154 DriveInfo *dinfo = drive_get_next(IF_MTD);
155 int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
156 gchar *bus_name = g_strdup_printf("qspi%d", bus);
158 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
159 g_free(bus_name);
161 flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");
162 if (dinfo) {
163 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
164 &error_fatal);
166 qdev_init_nofail(flash_dev);
168 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
170 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
173 /* TODO create and connect IDE devices for ide_drive_get() */
175 xlnx_zcu102_binfo.ram_size = ram_size;
176 xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
177 xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
178 xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
179 xlnx_zcu102_binfo.loader_start = 0;
180 arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
183 static void xlnx_zcu102_machine_instance_init(Object *obj)
185 XlnxZCU102 *s = ZCU102_MACHINE(obj);
187 /* Default to secure mode being disabled */
188 s->secure = false;
189 object_property_add_bool(obj, "secure", zcu102_get_secure,
190 zcu102_set_secure, NULL);
191 object_property_set_description(obj, "secure",
192 "Set on/off to enable/disable the ARM "
193 "Security Extensions (TrustZone)",
194 NULL);
196 /* Default to virt (EL2) being disabled */
197 s->virt = false;
198 object_property_add_bool(obj, "virtualization", zcu102_get_virt,
199 zcu102_set_virt, NULL);
200 object_property_set_description(obj, "virtualization",
201 "Set on/off to enable/disable emulating a "
202 "guest CPU which implements the ARM "
203 "Virtualization Extensions",
204 NULL);
207 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
209 MachineClass *mc = MACHINE_CLASS(oc);
211 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
212 "the value of smp";
213 mc->init = xlnx_zcu102_init;
214 mc->block_default_type = IF_IDE;
215 mc->units_per_default_bus = 1;
216 mc->ignore_memory_transaction_failures = true;
217 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
218 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
221 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
222 .name = MACHINE_TYPE_NAME("xlnx-zcu102"),
223 .parent = TYPE_MACHINE,
224 .class_init = xlnx_zcu102_machine_class_init,
225 .instance_init = xlnx_zcu102_machine_instance_init,
226 .instance_size = sizeof(XlnxZCU102),
229 static void xlnx_zcu102_machine_init_register_types(void)
231 type_register_static(&xlnx_zcu102_machine_init_typeinfo);
234 type_init(xlnx_zcu102_machine_init_register_types)