| blob | 935100b4531959ba7d6e38fdf2a1a5bf81baac12 |
1 #
2 # HPPA instruction decode definitions.
3 #
4 # Copyright (c) 2018 Richard Henderson <rth@twiddle.net>
5 #
6 # This library is free software; you can redistribute it and/or
7 # modify it under the terms of the GNU Lesser General Public
8 # License as published by the Free Software Foundation; either
9 # version 2 of the License, or (at your option) any later version.
10 #
11 # This library is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 # Lesser General Public License for more details.
15 #
16 # You should have received a copy of the GNU Lesser General Public
17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 #
20 ####
21 # Field definitions
22 ####
24 %assemble_sr3 13:1 14:2
25 %assemble_sr3x 13:1 14:2 !function=expand_sr3x
27 %assemble_11a 0:s1 4:10 !function=expand_shl3
28 %assemble_12 0:s1 2:1 3:10 !function=expand_shl2
29 %assemble_12a 0:s1 3:11 !function=expand_shl2
30 %assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2
31 %assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2
33 %assemble_21 0:s1 1:11 14:2 16:5 12:2 !function=expand_shl11
35 %lowsign_11 0:s1 1:10
36 %lowsign_14 0:s1 1:13
38 %sm_imm 16:10 !function=expand_sm_imm
40 %rm64 1:1 16:5
41 %rt64 6:1 0:5
43 %im5_0 0:s1 1:4
44 %im5_16 16:s1 17:4
45 %ma_to_m 5:1 13:1 !function=ma_to_m
46 %ma2_to_m 2:2 !function=ma_to_m
47 %pos_to_m 0:1 !function=pos_to_m
48 %neg_to_m 0:1 !function=neg_to_m
49 %a_to_m 2:1 !function=neg_to_m
51 ####
52 # Argument set definitions
53 ####
55 # All insns that need to form a virtual address should use this set.
56 &ldst t b x disp sp m scale size
58 &rr_cf t r cf
59 &rrr_cf t r1 r2 cf
60 &rrr_cf_sh t r1 r2 cf sh
61 &rri_cf t r i cf
63 &rrb_c_f disp n c f r1 r2
64 &rib_c_f disp n c f r i
66 ####
67 # Format definitions
68 ####
70 @rr_cf ...... r:5 ..... cf:4 ....... t:5 &rr_cf
71 @rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf
72 @rrr_cf_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_sh
73 @rrr_cf_sh0 ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf_sh sh=0
74 @rri_cf ...... r:5 t:5 cf:4 . ........... &rri_cf i=%lowsign_11
76 @rrb_cf ...... r2:5 r1:5 c:3 ........... n:1 . \
77 &rrb_c_f disp=%assemble_12
78 @rib_cf ...... r:5 ..... c:3 ........... n:1 . \
79 &rib_c_f disp=%assemble_12 i=%im5_16
81 ####
82 # System
83 ####
85 break 000000 ----- ----- --- 00000000 -----
87 mtsp 000000 ----- r:5 ... 11000001 00000 sp=%assemble_sr3
88 mtctl 000000 t:5 r:5 --- 11000010 00000
89 mtsarcm 000000 01011 r:5 --- 11000110 00000
90 mtsm 000000 00000 r:5 000 11000011 00000
92 mfia 000000 ----- 00000 --- 10100101 t:5
93 mfsp 000000 ----- 00000 ... 00100101 t:5 sp=%assemble_sr3
94 mfctl 000000 r:5 00000- e:1 -01000101 t:5
96 sync 000000 ----- ----- 000 00100000 00000 # sync, syncdma
98 ldsid 000000 b:5 ----- sp:2 0 10000101 t:5
100 rsm 000000 .......... 000 01110011 t:5 i=%sm_imm
101 ssm 000000 .......... 000 01101011 t:5 i=%sm_imm
103 rfi 000000 ----- ----- --- 01100000 00000
104 rfi_r 000000 ----- ----- --- 01100101 00000
106 ####
107 # Memory Management
108 ####
110 @addrx ...... b:5 x:5 .. ........ m:1 ..... \
111 &ldst disp=0 scale=0 t=0 sp=0 size=0
113 nop 000001 ----- ----- -- 11001010 0 ----- # fdc, disp
114 nop_addrx 000001 ..... ..... -- 01001010 . ----- @addrx # fdc, index
115 nop_addrx 000001 ..... ..... -- 01001011 . ----- @addrx # fdce
116 nop_addrx 000001 ..... ..... --- 0001010 . ----- @addrx # fic 0x0a
117 nop_addrx 000001 ..... ..... -- 01001111 . 00000 @addrx # fic 0x4f
118 nop_addrx 000001 ..... ..... --- 0001011 . ----- @addrx # fice
119 nop_addrx 000001 ..... ..... -- 01001110 . 00000 @addrx # pdc
121 probe 000001 b:5 ri:5 sp:2 imm:1 100011 write:1 0 t:5
123 ixtlbx 000001 b:5 r:5 sp:2 0100000 addr:1 0 00000 data=1
124 ixtlbx 000001 b:5 r:5 ... 000000 addr:1 0 00000 \
125 sp=%assemble_sr3x data=0
127 pxtlbx 000001 b:5 x:5 sp:2 0100100 local:1 m:1 ----- data=1
128 pxtlbx 000001 b:5 x:5 ... 000100 local:1 m:1 ----- \
129 sp=%assemble_sr3x data=0
131 lpa 000001 b:5 x:5 sp:2 01001101 m:1 t:5 \
132 &ldst disp=0 scale=0 size=0
134 lci 000001 ----- ----- -- 01001100 0 t:5
136 ####
137 # Arith/Log
138 ####
140 andcm 000010 ..... ..... .... 000000 0 ..... @rrr_cf
141 and 000010 ..... ..... .... 001000 0 ..... @rrr_cf
142 or 000010 ..... ..... .... 001001 0 ..... @rrr_cf
143 xor 000010 ..... ..... .... 001010 0 ..... @rrr_cf
144 uxor 000010 ..... ..... .... 001110 0 ..... @rrr_cf
145 ds 000010 ..... ..... .... 010001 0 ..... @rrr_cf
146 cmpclr 000010 ..... ..... .... 100010 0 ..... @rrr_cf
147 uaddcm 000010 ..... ..... .... 100110 0 ..... @rrr_cf
148 uaddcm_tc 000010 ..... ..... .... 100111 0 ..... @rrr_cf
149 dcor 000010 ..... 00000 .... 101110 0 ..... @rr_cf
150 dcor_i 000010 ..... 00000 .... 101111 0 ..... @rr_cf
152 add 000010 ..... ..... .... 0110.. 0 ..... @rrr_cf_sh
153 add_l 000010 ..... ..... .... 1010.. 0 ..... @rrr_cf_sh
154 add_tsv 000010 ..... ..... .... 1110.. 0 ..... @rrr_cf_sh
155 add_c 000010 ..... ..... .... 011100 0 ..... @rrr_cf_sh0
156 add_c_tsv 000010 ..... ..... .... 111100 0 ..... @rrr_cf_sh0
158 sub 000010 ..... ..... .... 010000 0 ..... @rrr_cf
159 sub_tsv 000010 ..... ..... .... 110000 0 ..... @rrr_cf
160 sub_tc 000010 ..... ..... .... 010011 0 ..... @rrr_cf
161 sub_tsv_tc 000010 ..... ..... .... 110011 0 ..... @rrr_cf
162 sub_b 000010 ..... ..... .... 010100 0 ..... @rrr_cf
163 sub_b_tsv 000010 ..... ..... .... 110100 0 ..... @rrr_cf
165 ldil 001000 t:5 ..................... i=%assemble_21
166 addil 001010 r:5 ..................... i=%assemble_21
167 ldo 001101 b:5 t:5 -- .............. i=%lowsign_14
169 addi 101101 ..... ..... .... 0 ........... @rri_cf
170 addi_tsv 101101 ..... ..... .... 1 ........... @rri_cf
171 addi_tc 101100 ..... ..... .... 0 ........... @rri_cf
172 addi_tc_tsv 101100 ..... ..... .... 1 ........... @rri_cf
174 subi 100101 ..... ..... .... 0 ........... @rri_cf
175 subi_tsv 100101 ..... ..... .... 1 ........... @rri_cf
177 cmpiclr 100100 ..... ..... .... 0 ........... @rri_cf
179 ####
180 # Index Mem
181 ####
183 @ldstx ...... b:5 x:5 sp:2 scale:1 ....... m:1 t:5 &ldst disp=0
184 @ldim5 ...... b:5 ..... sp:2 ......... t:5 \
185 &ldst disp=%im5_16 x=0 scale=0 m=%ma_to_m
186 @stim5 ...... b:5 t:5 sp:2 ......... ..... \
187 &ldst disp=%im5_0 x=0 scale=0 m=%ma_to_m
189 ld 000011 ..... ..... .. . 1 -- 00 size:2 ...... @ldim5
190 ld 000011 ..... ..... .. . 0 -- 00 size:2 ...... @ldstx
191 st 000011 ..... ..... .. . 1 -- 10 size:2 ...... @stim5
192 ldc 000011 ..... ..... .. . 1 -- 0111 ...... @ldim5 size=2
193 ldc 000011 ..... ..... .. . 0 -- 0111 ...... @ldstx size=2
194 lda 000011 ..... ..... .. . 1 -- 0110 ...... @ldim5 size=2
195 lda 000011 ..... ..... .. . 0 -- 0110 ...... @ldstx size=2
196 sta 000011 ..... ..... .. . 1 -- 1110 ...... @stim5 size=2
197 stby 000011 b:5 r:5 sp:2 a:1 1 -- 1100 m:1 ..... disp=%im5_0
199 @fldstwx ...... b:5 x:5 sp:2 scale:1 ....... m:1 ..... \
200 &ldst t=%rt64 disp=0 size=2
201 @fldstwi ...... b:5 ..... sp:2 . ....... . ..... \
202 &ldst t=%rt64 disp=%im5_16 m=%ma_to_m x=0 scale=0 size=2
204 fldw 001001 ..... ..... .. . 0 -- 000 . . ..... @fldstwx
205 fldw 001001 ..... ..... .. . 1 -- 000 . . ..... @fldstwi
206 fstw 001001 ..... ..... .. . 0 -- 100 . . ..... @fldstwx
207 fstw 001001 ..... ..... .. . 1 -- 100 . . ..... @fldstwi
209 @fldstdx ...... b:5 x:5 sp:2 scale:1 ....... m:1 t:5 \
210 &ldst disp=0 size=3
211 @fldstdi ...... b:5 ..... sp:2 . ....... . t:5 \
212 &ldst disp=%im5_16 m=%ma_to_m x=0 scale=0 size=3
214 fldd 001011 ..... ..... .. . 0 -- 000 0 . ..... @fldstdx
215 fldd 001011 ..... ..... .. . 1 -- 000 0 . ..... @fldstdi
216 fstd 001011 ..... ..... .. . 0 -- 100 0 . ..... @fldstdx
217 fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi
219 ####
220 # Offset Mem
221 ####
223 @ldstim14 ...... b:5 t:5 sp:2 .............. \
224 &ldst disp=%lowsign_14 x=0 scale=0 m=0
225 @ldstim14m ...... b:5 t:5 sp:2 .............. \
226 &ldst disp=%lowsign_14 x=0 scale=0 m=%neg_to_m
227 @ldstim12m ...... b:5 t:5 sp:2 .............. \
228 &ldst disp=%assemble_12a x=0 scale=0 m=%pos_to_m
230 # LDB, LDH, LDW, LDWM
231 ld 010000 ..... ..... .. .............. @ldstim14 size=0
232 ld 010001 ..... ..... .. .............. @ldstim14 size=1
233 ld 010010 ..... ..... .. .............. @ldstim14 size=2
234 ld 010011 ..... ..... .. .............. @ldstim14m size=2
235 ld 010111 ..... ..... .. ...........10. @ldstim12m size=2
237 # STB, STH, STW, STWM
238 st 011000 ..... ..... .. .............. @ldstim14 size=0
239 st 011001 ..... ..... .. .............. @ldstim14 size=1
240 st 011010 ..... ..... .. .............. @ldstim14 size=2
241 st 011011 ..... ..... .. .............. @ldstim14m size=2
242 st 011111 ..... ..... .. ...........10. @ldstim12m size=2
244 fldw 010110 b:5 ..... sp:2 .............. \
245 &ldst disp=%assemble_12a t=%rm64 m=%a_to_m x=0 scale=0 size=2
246 fldw 010111 b:5 ..... sp:2 ...........0.. \
247 &ldst disp=%assemble_12a t=%rm64 m=0 x=0 scale=0 size=2
249 fstw 011110 b:5 ..... sp:2 .............. \
250 &ldst disp=%assemble_12a t=%rm64 m=%a_to_m x=0 scale=0 size=2
251 fstw 011111 b:5 ..... sp:2 ...........0.. \
252 &ldst disp=%assemble_12a t=%rm64 m=0 x=0 scale=0 size=2
254 fldd 010100 b:5 t:5 sp:2 .......... .. 1 . \
255 &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3
257 fstd 011100 b:5 t:5 sp:2 .......... .. 1 . \
258 &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3
260 ####
261 # Floating-point Multiply Add
262 ####
264 &mpyadd rm1 rm2 ta ra tm
265 @mpyadd ...... rm1:5 rm2:5 ta:5 ra:5 . tm:5 &mpyadd
267 fmpyadd_f 000110 ..... ..... ..... ..... 0 ..... @mpyadd
268 fmpyadd_d 000110 ..... ..... ..... ..... 1 ..... @mpyadd
269 fmpysub_f 100110 ..... ..... ..... ..... 0 ..... @mpyadd
270 fmpysub_d 100110 ..... ..... ..... ..... 1 ..... @mpyadd
272 ####
273 # Conditional Branches
274 ####
276 bb_sar 110000 00000 r:5 c:1 10 ........... n:1 . disp=%assemble_12
277 bb_imm 110001 p:5 r:5 c:1 10 ........... n:1 . disp=%assemble_12
279 movb 110010 ..... ..... ... ........... . . @rrb_cf f=0
280 movbi 110011 ..... ..... ... ........... . . @rib_cf f=0
282 cmpb 100000 ..... ..... ... ........... . . @rrb_cf f=0
283 cmpb 100010 ..... ..... ... ........... . . @rrb_cf f=1
284 cmpbi 100001 ..... ..... ... ........... . . @rib_cf f=0
285 cmpbi 100011 ..... ..... ... ........... . . @rib_cf f=1
287 addb 101000 ..... ..... ... ........... . . @rrb_cf f=0
288 addb 101010 ..... ..... ... ........... . . @rrb_cf f=1
289 addbi 101001 ..... ..... ... ........... . . @rib_cf f=0
290 addbi 101011 ..... ..... ... ........... . . @rib_cf f=1
292 ####
293 # Shift, Extract, Deposit
294 ####
296 shrpw_sar 110100 r2:5 r1:5 c:3 00 0 00000 t:5
297 shrpw_imm 110100 r2:5 r1:5 c:3 01 0 cpos:5 t:5
299 extrw_sar 110100 r:5 t:5 c:3 10 se:1 00000 clen:5
300 extrw_imm 110100 r:5 t:5 c:3 11 se:1 pos:5 clen:5
302 depw_sar 110101 t:5 r:5 c:3 00 nz:1 00000 clen:5
303 depw_imm 110101 t:5 r:5 c:3 01 nz:1 cpos:5 clen:5
304 depwi_sar 110101 t:5 ..... c:3 10 nz:1 00000 clen:5 i=%im5_16
305 depwi_imm 110101 t:5 ..... c:3 11 nz:1 cpos:5 clen:5 i=%im5_16
307 ####
308 # Branch External
309 ####
311 &BE b l n disp sp
312 @be ...... b:5 ..... ... ........... n:1 . \
313 &BE disp=%assemble_17 sp=%assemble_sr3
315 be 111000 ..... ..... ... ........... . . @be l=0
316 be 111001 ..... ..... ... ........... . . @be l=31
318 ####
319 # Branch
320 ####
322 &BL l n disp
323 @bl ...... l:5 ..... ... ........... n:1 . &BL disp=%assemble_17
325 # B,L and B,L,PUSH
326 bl 111010 ..... ..... 000 ........... . . @bl
327 bl 111010 ..... ..... 100 ........... . . @bl
328 # B,L (long displacement)
329 bl 111010 ..... ..... 101 ........... n:1 . &BL l=2 \
330 disp=%assemble_22
331 b_gate 111010 ..... ..... 001 ........... . . @bl
332 blr 111010 l:5 x:5 010 00000000000 n:1 0
333 bv 111010 b:5 x:5 110 00000000000 n:1 0
334 bve 111010 b:5 00000 110 10000000000 n:1 - l=0
335 bve 111010 b:5 00000 111 10000000000 n:1 - l=2