2 * ARM MPS2 AN505 FPGAIO emulation
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
12 /* This is a model of the "FPGA system control and I/O" block found
13 * in the AN505 FPGA image for the MPS2 devboard.
14 * It is documented in AN505:
15 * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
18 #include "qemu/osdep.h"
20 #include "qemu/module.h"
21 #include "qapi/error.h"
23 #include "hw/sysbus.h"
24 #include "migration/vmstate.h"
25 #include "hw/registerfields.h"
26 #include "hw/misc/mps2-fpgaio.h"
27 #include "hw/misc/led.h"
28 #include "hw/qdev-properties.h"
29 #include "qemu/timer.h"
40 static uint32_t counter_from_tickoff(int64_t now
, int64_t tick_offset
, int frq
)
42 return muldiv64(now
- tick_offset
, frq
, NANOSECONDS_PER_SECOND
);
45 static int64_t tickoff_from_counter(int64_t now
, uint32_t count
, int frq
)
47 return now
- muldiv64(count
, NANOSECONDS_PER_SECOND
, frq
);
50 static void resync_counter(MPS2FPGAIO
*s
)
53 * Update s->counter and s->pscntr to their true current values
54 * by calculating how many times PSCNTR has ticked since the
55 * last time we did a resync.
57 int64_t now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
58 int64_t elapsed
= now
- s
->pscntr_sync_ticks
;
61 * Round elapsed down to a whole number of PSCNTR ticks, so we don't
62 * lose time if we do multiple resyncs in a single tick.
64 uint64_t ticks
= muldiv64(elapsed
, s
->prescale_clk
, NANOSECONDS_PER_SECOND
);
67 * Work out what PSCNTR and COUNTER have moved to. We assume that
68 * PSCNTR reloads from PRESCALE one tick-period after it hits zero,
69 * and that COUNTER increments at the same moment.
72 /* We haven't ticked since the last time we were asked */
74 } else if (ticks
< s
->pscntr
) {
75 /* We haven't yet reached zero, just reduce the PSCNTR */
78 if (s
->prescale
== 0) {
80 * If the reload value is zero then the PSCNTR will stick
81 * at zero once it reaches it, and so we will increment
82 * COUNTER every tick after that.
84 s
->counter
+= ticks
- s
->pscntr
;
88 * This is the complicated bit. This ASCII art diagram gives an
89 * example with PRESCALE==5 PSCNTR==7:
91 * ticks 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
92 * PSCNTR 7 6 5 4 3 2 1 0 5 4 3 2 1 0 5
94 * y 0 1 2 3 4 5 6 7 8 9 10 11 12
95 * x 0 1 2 3 4 5 0 1 2 3 4 5 0
97 * where x = y % (s->prescale + 1)
98 * and so PSCNTR = s->prescale - x
99 * and COUNTER is incremented by y / (s->prescale + 1)
101 * The case where PSCNTR < PRESCALE works out the same,
102 * though we must be careful to calculate y as 64-bit unsigned
103 * for all parts of the expression.
104 * y < 0 is not possible because that implies ticks < s->pscntr.
106 uint64_t y
= ticks
- s
->pscntr
+ s
->prescale
;
107 s
->pscntr
= s
->prescale
- (y
% (s
->prescale
+ 1));
108 s
->counter
+= y
/ (s
->prescale
+ 1);
113 * Only advance the sync time to the timestamp of the last PSCNTR tick,
114 * not all the way to 'now', so we don't lose time if we do multiple
115 * resyncs in a single tick.
117 s
->pscntr_sync_ticks
+= muldiv64(ticks
, NANOSECONDS_PER_SECOND
,
121 static uint64_t mps2_fpgaio_read(void *opaque
, hwaddr offset
, unsigned size
)
123 MPS2FPGAIO
*s
= MPS2_FPGAIO(opaque
);
132 /* User-pressable board buttons. We don't model that, so just return
144 now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
145 r
= counter_from_tickoff(now
, s
->clk1hz_tick_offset
, 1);
148 now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
149 r
= counter_from_tickoff(now
, s
->clk100hz_tick_offset
, 100);
160 qemu_log_mask(LOG_GUEST_ERROR
,
161 "MPS2 FPGAIO read: bad offset %x\n", (int) offset
);
166 trace_mps2_fpgaio_read(offset
, r
, size
);
170 static void mps2_fpgaio_write(void *opaque
, hwaddr offset
, uint64_t value
,
173 MPS2FPGAIO
*s
= MPS2_FPGAIO(opaque
);
176 trace_mps2_fpgaio_write(offset
, value
, size
);
180 if (s
->num_leds
!= 0) {
183 s
->led0
= value
& MAKE_64BIT_MASK(0, s
->num_leds
);
184 for (i
= 0; i
< s
->num_leds
; i
++) {
185 led_set_state(s
->led
[i
], value
& (1 << i
));
194 /* These are control bits for some of the other devices on the
195 * board (SPI, CLCD, etc). We don't implement that yet, so just
196 * make the bits read as written.
198 qemu_log_mask(LOG_UNIMP
,
199 "MPS2 FPGAIO: MISC control bits unimplemented\n");
203 now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
204 s
->clk1hz_tick_offset
= tickoff_from_counter(now
, value
, 1);
207 now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
208 s
->clk100hz_tick_offset
= tickoff_from_counter(now
, value
, 100);
219 qemu_log_mask(LOG_GUEST_ERROR
,
220 "MPS2 FPGAIO write: bad offset 0x%x\n", (int) offset
);
225 static const MemoryRegionOps mps2_fpgaio_ops
= {
226 .read
= mps2_fpgaio_read
,
227 .write
= mps2_fpgaio_write
,
228 .endianness
= DEVICE_LITTLE_ENDIAN
,
231 static void mps2_fpgaio_reset(DeviceState
*dev
)
233 MPS2FPGAIO
*s
= MPS2_FPGAIO(dev
);
234 int64_t now
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
236 trace_mps2_fpgaio_reset();
240 s
->clk1hz_tick_offset
= tickoff_from_counter(now
, 0, 1);
241 s
->clk100hz_tick_offset
= tickoff_from_counter(now
, 0, 100);
244 s
->pscntr_sync_ticks
= now
;
246 for (size_t i
= 0; i
< s
->num_leds
; i
++) {
247 device_cold_reset(DEVICE(s
->led
[i
]));
251 static void mps2_fpgaio_init(Object
*obj
)
253 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
254 MPS2FPGAIO
*s
= MPS2_FPGAIO(obj
);
256 memory_region_init_io(&s
->iomem
, obj
, &mps2_fpgaio_ops
, s
,
257 "mps2-fpgaio", 0x1000);
258 sysbus_init_mmio(sbd
, &s
->iomem
);
261 static void mps2_fpgaio_realize(DeviceState
*dev
, Error
**errp
)
263 MPS2FPGAIO
*s
= MPS2_FPGAIO(dev
);
266 if (s
->num_leds
> MPS2FPGAIO_MAX_LEDS
) {
267 error_setg(errp
, "num-leds cannot be greater than %d",
268 MPS2FPGAIO_MAX_LEDS
);
272 for (i
= 0; i
< s
->num_leds
; i
++) {
273 g_autofree
char *ledname
= g_strdup_printf("USERLED%d", i
);
274 s
->led
[i
] = led_create_simple(OBJECT(dev
), GPIO_POLARITY_ACTIVE_HIGH
,
275 LED_COLOR_GREEN
, ledname
);
279 static bool mps2_fpgaio_counters_needed(void *opaque
)
281 /* Currently vmstate.c insists all subsections have a 'needed' function */
285 static const VMStateDescription mps2_fpgaio_counters_vmstate
= {
286 .name
= "mps2-fpgaio/counters",
288 .minimum_version_id
= 2,
289 .needed
= mps2_fpgaio_counters_needed
,
290 .fields
= (VMStateField
[]) {
291 VMSTATE_INT64(clk1hz_tick_offset
, MPS2FPGAIO
),
292 VMSTATE_INT64(clk100hz_tick_offset
, MPS2FPGAIO
),
293 VMSTATE_UINT32(counter
, MPS2FPGAIO
),
294 VMSTATE_UINT32(pscntr
, MPS2FPGAIO
),
295 VMSTATE_INT64(pscntr_sync_ticks
, MPS2FPGAIO
),
296 VMSTATE_END_OF_LIST()
300 static const VMStateDescription mps2_fpgaio_vmstate
= {
301 .name
= "mps2-fpgaio",
303 .minimum_version_id
= 1,
304 .fields
= (VMStateField
[]) {
305 VMSTATE_UINT32(led0
, MPS2FPGAIO
),
306 VMSTATE_UINT32(prescale
, MPS2FPGAIO
),
307 VMSTATE_UINT32(misc
, MPS2FPGAIO
),
308 VMSTATE_END_OF_LIST()
310 .subsections
= (const VMStateDescription
*[]) {
311 &mps2_fpgaio_counters_vmstate
,
316 static Property mps2_fpgaio_properties
[] = {
317 /* Frequency of the prescale counter */
318 DEFINE_PROP_UINT32("prescale-clk", MPS2FPGAIO
, prescale_clk
, 20000000),
319 /* Number of LEDs controlled by LED0 register */
320 DEFINE_PROP_UINT32("num-leds", MPS2FPGAIO
, num_leds
, 2),
321 DEFINE_PROP_END_OF_LIST(),
324 static void mps2_fpgaio_class_init(ObjectClass
*klass
, void *data
)
326 DeviceClass
*dc
= DEVICE_CLASS(klass
);
328 dc
->vmsd
= &mps2_fpgaio_vmstate
;
329 dc
->realize
= mps2_fpgaio_realize
;
330 dc
->reset
= mps2_fpgaio_reset
;
331 device_class_set_props(dc
, mps2_fpgaio_properties
);
334 static const TypeInfo mps2_fpgaio_info
= {
335 .name
= TYPE_MPS2_FPGAIO
,
336 .parent
= TYPE_SYS_BUS_DEVICE
,
337 .instance_size
= sizeof(MPS2FPGAIO
),
338 .instance_init
= mps2_fpgaio_init
,
339 .class_init
= mps2_fpgaio_class_init
,
342 static void mps2_fpgaio_register_types(void)
344 type_register_static(&mps2_fpgaio_info
);
347 type_init(mps2_fpgaio_register_types
);