include/hw/ppc/spapr_vio.h

   1 #ifndef HW_SPAPR_VIO_H
   2 #define HW_SPAPR_VIO_H
   3
   4 /*
   5  * QEMU sPAPR VIO bus definitions
   6  *
   7  * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
   8  * Based on the s390 virtio bus definitions:
   9  * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License as published by the Free Software Foundation; either
  14  * version 2 of the License, or (at your option) any later version.
  15  *
  16  * This library is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * Lesser General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU Lesser General Public
  22  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #include "hw/ppc/spapr.h"
  26 #include "sysemu/dma.h"
  27 #include "hw/irq.h"
  28
  29 #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
  30 #define VIO_SPAPR_DEVICE(obj) \
  31      OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
  32 #define VIO_SPAPR_DEVICE_CLASS(klass) \
  33      OBJECT_CLASS_CHECK(SpaprVioDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
  34 #define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
  35      OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
  36
  37 #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
  38 #define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS)
  39
  40 #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
  41
  42 typedef struct SpaprVioCrq {
  43     uint64_t qladdr;
  44     uint32_t qsize;
  45     uint32_t qnext;
  46     int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq);
  47 } SpaprVioCrq;
  48
  49 typedef struct SpaprVioDevice SpaprVioDevice;
  50 typedef struct SpaprVioBus SpaprVioBus;
  51
  52 typedef struct SpaprVioDeviceClass {
  53     DeviceClass parent_class;
  54
  55     const char *dt_name, *dt_type, *dt_compatible;
  56     target_ulong signal_mask;
  57     uint32_t rtce_window_size;
  58     void (*realize)(SpaprVioDevice *dev, Error **errp);
  59     void (*reset)(SpaprVioDevice *dev);
  60     int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off);
  61     const char *(*get_dt_compatible)(SpaprVioDevice *dev);
  62 } SpaprVioDeviceClass;
  63
  64 struct SpaprVioDevice {
  65     DeviceState qdev;
  66     uint32_t reg;
  67     uint32_t irq;
  68     uint64_t signal_state;
  69     SpaprVioCrq crq;
  70     AddressSpace as;
  71     MemoryRegion mrroot;
  72     MemoryRegion mrbypass;
  73     SpaprTceTable *tcet;
  74 };
  75
  76 #define DEFINE_SPAPR_PROPERTIES(type, field)           \
  77         DEFINE_PROP_UINT32("reg", type, field.reg, -1)
  78
  79 struct SpaprVioBus {
  80     BusState bus;
  81     uint32_t next_reg;
  82 };
  83
  84 SpaprVioBus *spapr_vio_bus_init(void);
  85 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg);
  86 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt);
  87 gchar *spapr_vio_stdout_path(SpaprVioBus *bus);
  88
  89 static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
  90 {
  91     SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  92
  93     qemu_irq_pulse(spapr_qirq(spapr, dev->irq));
  94 }
  95
  96 static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
  97                                        uint32_t size, DMADirection dir)
  98 {
  99     return dma_memory_valid(&dev->as, taddr, size, dir);
 100 }
 101
 102 static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
 103                                      void *buf, uint32_t size)
 104 {
 105     return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
 106         H_DEST_PARM : H_SUCCESS;
 107 }
 108
 109 static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
 110                                       const void *buf, uint32_t size)
 111 {
 112     return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
 113         H_DEST_PARM : H_SUCCESS;
 114 }
 115
 116 static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
 117                                     uint8_t c, uint32_t size)
 118 {
 119     return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
 120         H_DEST_PARM : H_SUCCESS;
 121 }
 122
 123 #define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
 124 #define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
 125 #define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
 126 #define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
 127 #define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
 128
 129 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq);
 130
 131 SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg);
 132 void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len);
 133 void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev);
 134 void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd);
 135 void spapr_vscsi_create(SpaprVioBus *bus);
 136
 137 SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus);
 138
 139 extern const VMStateDescription vmstate_spapr_vio;
 140
 141 #define VMSTATE_SPAPR_VIO(_f, _s) \
 142     VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice)
 143
 144 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass);
 145
 146 #endif /* HW_SPAPR_VIO_H */