target/mips: msa: Split helpers for DPADD_U.<H|W|D>
[qemu/ar7.git] / include / hw / ppc / spapr_nvdimm.h
blobb3330cc485d27d8604ed6ba7614285255e110b7a
1 /*
2 * QEMU PowerPC PAPR SCM backend definitions
4 * Copyright (c) 2020, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
8 */
10 #ifndef HW_SPAPR_NVDIMM_H
11 #define HW_SPAPR_NVDIMM_H
13 #include "hw/mem/nvdimm.h"
14 #include "hw/ppc/spapr.h"
17 * The nvdimm size should be aligned to SCM block size.
18 * The SCM block size should be aligned to SPAPR_MEMORY_BLOCK_SIZE
19 * inorder to have SCM regions not to overlap with dimm memory regions.
20 * The SCM devices can have variable block sizes. For now, fixing the
21 * block size to the minimum value.
23 #define SPAPR_MINIMUM_SCM_BLOCK_SIZE SPAPR_MEMORY_BLOCK_SIZE
25 /* Have an explicit check for alignment */
26 QEMU_BUILD_BUG_ON(SPAPR_MINIMUM_SCM_BLOCK_SIZE % SPAPR_MEMORY_BLOCK_SIZE);
28 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
29 void *fdt, int *fdt_start_offset, Error **errp);
30 int spapr_dt_nvdimm(void *fdt, int parent_offset, NVDIMMDevice *nvdimm);
31 void spapr_dt_persistent_memory(void *fdt);
32 void spapr_nvdimm_validate_opts(NVDIMMDevice *nvdimm, uint64_t size,
33 Error **errp);
34 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp);
35 void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr);
37 #endif