2 * RAM allocation and memory access
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
25 #include "qemu/cacheflush.h"
28 #include "hw/core/tcg-cpu-ops.h"
29 #endif /* CONFIG_TCG */
31 #include "exec/exec-all.h"
32 #include "exec/target_page.h"
33 #include "hw/qdev-core.h"
34 #include "hw/qdev-properties.h"
35 #include "hw/boards.h"
36 #include "hw/xen/xen.h"
37 #include "sysemu/kvm.h"
38 #include "sysemu/tcg.h"
39 #include "sysemu/qtest.h"
40 #include "qemu/timer.h"
41 #include "qemu/config-file.h"
42 #include "qemu/error-report.h"
43 #include "qemu/qemu-print.h"
44 #include "exec/memory.h"
45 #include "exec/ioport.h"
46 #include "sysemu/dma.h"
47 #include "sysemu/hostmem.h"
48 #include "sysemu/hw_accel.h"
49 #include "sysemu/xen-mapcache.h"
50 #include "trace/trace-root.h"
52 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
53 #include <linux/falloc.h>
56 #include "qemu/rcu_queue.h"
57 #include "qemu/main-loop.h"
58 #include "exec/translate-all.h"
59 #include "sysemu/replay.h"
61 #include "exec/memory-internal.h"
62 #include "exec/ram_addr.h"
65 #include "qemu/pmem.h"
67 #include "migration/vmstate.h"
69 #include "qemu/range.h"
71 #include "qemu/mmap-alloc.h"
74 #include "monitor/monitor.h"
76 #ifdef CONFIG_LIBDAXCTL
77 #include <daxctl/libdaxctl.h>
80 //#define DEBUG_SUBPAGE
82 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
83 * are protected by the ramlist lock.
85 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
87 static MemoryRegion
*system_memory
;
88 static MemoryRegion
*system_io
;
90 AddressSpace address_space_io
;
91 AddressSpace address_space_memory
;
93 static MemoryRegion io_mem_unassigned
;
95 typedef struct PhysPageEntry PhysPageEntry
;
97 struct PhysPageEntry
{
98 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
100 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
104 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
106 /* Size of the L2 (and L3, etc) page tables. */
107 #define ADDR_SPACE_BITS 64
110 #define P_L2_SIZE (1 << P_L2_BITS)
112 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
114 typedef PhysPageEntry Node
[P_L2_SIZE
];
116 typedef struct PhysPageMap
{
119 unsigned sections_nb
;
120 unsigned sections_nb_alloc
;
122 unsigned nodes_nb_alloc
;
124 MemoryRegionSection
*sections
;
127 struct AddressSpaceDispatch
{
128 MemoryRegionSection
*mru_section
;
129 /* This is a multi-level map on the physical address space.
130 * The bottom level has pointers to MemoryRegionSections.
132 PhysPageEntry phys_map
;
136 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
137 typedef struct subpage_t
{
141 uint16_t sub_section
[];
144 #define PHYS_SECTION_UNASSIGNED 0
146 static void io_mem_init(void);
147 static void memory_map_init(void);
148 static void tcg_log_global_after_sync(MemoryListener
*listener
);
149 static void tcg_commit(MemoryListener
*listener
);
152 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
153 * @cpu: the CPU whose AddressSpace this is
154 * @as: the AddressSpace itself
155 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
156 * @tcg_as_listener: listener for tracking changes to the AddressSpace
158 struct CPUAddressSpace
{
161 struct AddressSpaceDispatch
*memory_dispatch
;
162 MemoryListener tcg_as_listener
;
165 struct DirtyBitmapSnapshot
{
168 unsigned long dirty
[];
171 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
173 static unsigned alloc_hint
= 16;
174 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
175 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
176 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
177 alloc_hint
= map
->nodes_nb_alloc
;
181 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
188 ret
= map
->nodes_nb
++;
190 assert(ret
!= PHYS_MAP_NODE_NIL
);
191 assert(ret
!= map
->nodes_nb_alloc
);
193 e
.skip
= leaf
? 0 : 1;
194 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
195 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
196 memcpy(&p
[i
], &e
, sizeof(e
));
201 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
202 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
206 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
208 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
209 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
211 p
= map
->nodes
[lp
->ptr
];
212 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
214 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
215 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
221 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
227 static void phys_page_set(AddressSpaceDispatch
*d
,
228 hwaddr index
, uint64_t nb
,
231 /* Wildly overreserve - it doesn't matter much. */
232 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
234 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
237 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
238 * and update our entry so we can skip it and go directly to the destination.
240 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
242 unsigned valid_ptr
= P_L2_SIZE
;
247 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
252 for (i
= 0; i
< P_L2_SIZE
; i
++) {
253 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
260 phys_page_compact(&p
[i
], nodes
);
264 /* We can only compress if there's only one child. */
269 assert(valid_ptr
< P_L2_SIZE
);
271 /* Don't compress if it won't fit in the # of bits we have. */
272 if (P_L2_LEVELS
>= (1 << 6) &&
273 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
277 lp
->ptr
= p
[valid_ptr
].ptr
;
278 if (!p
[valid_ptr
].skip
) {
279 /* If our only child is a leaf, make this a leaf. */
280 /* By design, we should have made this node a leaf to begin with so we
281 * should never reach here.
282 * But since it's so simple to handle this, let's do it just in case we
287 lp
->skip
+= p
[valid_ptr
].skip
;
291 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
293 if (d
->phys_map
.skip
) {
294 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
298 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
301 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
302 * the section must cover the entire address space.
304 return int128_gethi(section
->size
) ||
305 range_covers_byte(section
->offset_within_address_space
,
306 int128_getlo(section
->size
), addr
);
309 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
311 PhysPageEntry lp
= d
->phys_map
, *p
;
312 Node
*nodes
= d
->map
.nodes
;
313 MemoryRegionSection
*sections
= d
->map
.sections
;
314 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
317 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
318 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
319 return §ions
[PHYS_SECTION_UNASSIGNED
];
322 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
325 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
326 return §ions
[lp
.ptr
];
328 return §ions
[PHYS_SECTION_UNASSIGNED
];
332 /* Called from RCU critical section */
333 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
335 bool resolve_subpage
)
337 MemoryRegionSection
*section
= qatomic_read(&d
->mru_section
);
340 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
341 !section_covers_addr(section
, addr
)) {
342 section
= phys_page_find(d
, addr
);
343 qatomic_set(&d
->mru_section
, section
);
345 if (resolve_subpage
&& section
->mr
->subpage
) {
346 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
347 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
352 /* Called from RCU critical section */
353 static MemoryRegionSection
*
354 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
355 hwaddr
*plen
, bool resolve_subpage
)
357 MemoryRegionSection
*section
;
361 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
362 /* Compute offset within MemoryRegionSection */
363 addr
-= section
->offset_within_address_space
;
365 /* Compute offset within MemoryRegion */
366 *xlat
= addr
+ section
->offset_within_region
;
370 /* MMIO registers can be expected to perform full-width accesses based only
371 * on their address, without considering adjacent registers that could
372 * decode to completely different MemoryRegions. When such registers
373 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
374 * regions overlap wildly. For this reason we cannot clamp the accesses
377 * If the length is small (as is the case for address_space_ldl/stl),
378 * everything works fine. If the incoming length is large, however,
379 * the caller really has to do the clamping through memory_access_size.
381 if (memory_region_is_ram(mr
)) {
382 diff
= int128_sub(section
->size
, int128_make64(addr
));
383 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
389 * address_space_translate_iommu - translate an address through an IOMMU
390 * memory region and then through the target address space.
392 * @iommu_mr: the IOMMU memory region that we start the translation from
393 * @addr: the address to be translated through the MMU
394 * @xlat: the translated address offset within the destination memory region.
395 * It cannot be %NULL.
396 * @plen_out: valid read/write length of the translated address. It
398 * @page_mask_out: page mask for the translated address. This
399 * should only be meaningful for IOMMU translated
400 * addresses, since there may be huge pages that this bit
401 * would tell. It can be %NULL if we don't care about it.
402 * @is_write: whether the translation operation is for write
403 * @is_mmio: whether this can be MMIO, set true if it can
404 * @target_as: the address space targeted by the IOMMU
405 * @attrs: transaction attributes
407 * This function is called from RCU critical section. It is the common
408 * part of flatview_do_translate and address_space_translate_cached.
410 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
413 hwaddr
*page_mask_out
,
416 AddressSpace
**target_as
,
419 MemoryRegionSection
*section
;
420 hwaddr page_mask
= (hwaddr
)-1;
424 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
428 if (imrc
->attrs_to_index
) {
429 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
432 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
433 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
435 if (!(iotlb
.perm
& (1 << is_write
))) {
439 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
440 | (addr
& iotlb
.addr_mask
));
441 page_mask
&= iotlb
.addr_mask
;
442 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
443 *target_as
= iotlb
.target_as
;
445 section
= address_space_translate_internal(
446 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
449 iommu_mr
= memory_region_get_iommu(section
->mr
);
450 } while (unlikely(iommu_mr
));
453 *page_mask_out
= page_mask
;
458 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
462 * flatview_do_translate - translate an address in FlatView
464 * @fv: the flat view that we want to translate on
465 * @addr: the address to be translated in above address space
466 * @xlat: the translated address offset within memory region. It
468 * @plen_out: valid read/write length of the translated address. It
469 * can be @NULL when we don't care about it.
470 * @page_mask_out: page mask for the translated address. This
471 * should only be meaningful for IOMMU translated
472 * addresses, since there may be huge pages that this bit
473 * would tell. It can be @NULL if we don't care about it.
474 * @is_write: whether the translation operation is for write
475 * @is_mmio: whether this can be MMIO, set true if it can
476 * @target_as: the address space targeted by the IOMMU
477 * @attrs: memory transaction attributes
479 * This function is called from RCU critical section
481 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
485 hwaddr
*page_mask_out
,
488 AddressSpace
**target_as
,
491 MemoryRegionSection
*section
;
492 IOMMUMemoryRegion
*iommu_mr
;
493 hwaddr plen
= (hwaddr
)(-1);
499 section
= address_space_translate_internal(
500 flatview_to_dispatch(fv
), addr
, xlat
,
503 iommu_mr
= memory_region_get_iommu(section
->mr
);
504 if (unlikely(iommu_mr
)) {
505 return address_space_translate_iommu(iommu_mr
, xlat
,
506 plen_out
, page_mask_out
,
511 /* Not behind an IOMMU, use default page size. */
512 *page_mask_out
= ~TARGET_PAGE_MASK
;
518 /* Called from RCU critical section */
519 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
520 bool is_write
, MemTxAttrs attrs
)
522 MemoryRegionSection section
;
523 hwaddr xlat
, page_mask
;
526 * This can never be MMIO, and we don't really care about plen,
529 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
530 NULL
, &page_mask
, is_write
, false, &as
,
533 /* Illegal translation */
534 if (section
.mr
== &io_mem_unassigned
) {
538 /* Convert memory region offset into address space offset */
539 xlat
+= section
.offset_within_address_space
-
540 section
.offset_within_region
;
542 return (IOMMUTLBEntry
) {
544 .iova
= addr
& ~page_mask
,
545 .translated_addr
= xlat
& ~page_mask
,
546 .addr_mask
= page_mask
,
547 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
552 return (IOMMUTLBEntry
) {0};
555 /* Called from RCU critical section */
556 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
557 hwaddr
*plen
, bool is_write
,
561 MemoryRegionSection section
;
562 AddressSpace
*as
= NULL
;
564 /* This can be MMIO, so setup MMIO bit. */
565 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
566 is_write
, true, &as
, attrs
);
569 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
570 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
571 *plen
= MIN(page
, *plen
);
577 typedef struct TCGIOMMUNotifier
{
585 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
587 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
589 if (!notifier
->active
) {
592 tlb_flush(notifier
->cpu
);
593 notifier
->active
= false;
594 /* We leave the notifier struct on the list to avoid reallocating it later.
595 * Generally the number of IOMMUs a CPU deals with will be small.
596 * In any case we can't unregister the iommu notifier from a notify
601 static void tcg_register_iommu_notifier(CPUState
*cpu
,
602 IOMMUMemoryRegion
*iommu_mr
,
605 /* Make sure this CPU has an IOMMU notifier registered for this
606 * IOMMU/IOMMU index combination, so that we can flush its TLB
607 * when the IOMMU tells us the mappings we've cached have changed.
609 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
610 TCGIOMMUNotifier
*notifier
= NULL
;
613 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
614 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
615 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
619 if (i
== cpu
->iommu_notifiers
->len
) {
620 /* Not found, add a new entry at the end of the array */
621 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
622 notifier
= g_new0(TCGIOMMUNotifier
, 1);
623 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
626 notifier
->iommu_idx
= iommu_idx
;
628 /* Rather than trying to register interest in the specific part
629 * of the iommu's address space that we've accessed and then
630 * expand it later as subsequent accesses touch more of it, we
631 * just register interest in the whole thing, on the assumption
632 * that iommu reconfiguration will be rare.
634 iommu_notifier_init(¬ifier
->n
,
635 tcg_iommu_unmap_notify
,
636 IOMMU_NOTIFIER_UNMAP
,
640 memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
644 if (!notifier
->active
) {
645 notifier
->active
= true;
649 void tcg_iommu_free_notifier_list(CPUState
*cpu
)
651 /* Destroy the CPU's notifier list */
653 TCGIOMMUNotifier
*notifier
;
655 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
656 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
657 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
660 g_array_free(cpu
->iommu_notifiers
, true);
663 void tcg_iommu_init_notifier_list(CPUState
*cpu
)
665 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
668 /* Called from RCU critical section */
669 MemoryRegionSection
*
670 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
671 hwaddr
*xlat
, hwaddr
*plen
,
672 MemTxAttrs attrs
, int *prot
)
674 MemoryRegionSection
*section
;
675 IOMMUMemoryRegion
*iommu_mr
;
676 IOMMUMemoryRegionClass
*imrc
;
679 AddressSpaceDispatch
*d
=
680 qatomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
683 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
685 iommu_mr
= memory_region_get_iommu(section
->mr
);
690 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
692 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
693 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
694 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
695 * doesn't short-cut its translation table walk.
697 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
698 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
699 | (addr
& iotlb
.addr_mask
));
700 /* Update the caller's prot bits to remove permissions the IOMMU
701 * is giving us a failure response for. If we get down to no
702 * permissions left at all we can give up now.
704 if (!(iotlb
.perm
& IOMMU_RO
)) {
705 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
707 if (!(iotlb
.perm
& IOMMU_WO
)) {
708 *prot
&= ~PAGE_WRITE
;
715 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
718 assert(!memory_region_is_iommu(section
->mr
));
723 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
726 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
727 const char *prefix
, MemoryRegion
*mr
)
729 CPUAddressSpace
*newas
;
730 AddressSpace
*as
= g_new0(AddressSpace
, 1);
734 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
735 address_space_init(as
, mr
, as_name
);
738 /* Target code should have set num_ases before calling us */
739 assert(asidx
< cpu
->num_ases
);
742 /* address space 0 gets the convenience alias */
746 /* KVM cannot currently support multiple address spaces. */
747 assert(asidx
== 0 || !kvm_enabled());
749 if (!cpu
->cpu_ases
) {
750 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
753 newas
= &cpu
->cpu_ases
[asidx
];
757 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
758 newas
->tcg_as_listener
.commit
= tcg_commit
;
759 memory_listener_register(&newas
->tcg_as_listener
, as
);
763 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
765 /* Return the AddressSpace corresponding to the specified index */
766 return cpu
->cpu_ases
[asidx
].as
;
769 /* Add a watchpoint. */
770 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
771 int flags
, CPUWatchpoint
**watchpoint
)
776 /* forbid ranges which are empty or run off the end of the address space */
777 if (len
== 0 || (addr
+ len
- 1) < addr
) {
778 error_report("tried to set invalid watchpoint at %"
779 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
782 wp
= g_malloc(sizeof(*wp
));
788 /* keep all GDB-injected watchpoints in front */
789 if (flags
& BP_GDB
) {
790 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
792 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
795 in_page
= -(addr
| TARGET_PAGE_MASK
);
796 if (len
<= in_page
) {
797 tlb_flush_page(cpu
, addr
);
807 /* Remove a specific watchpoint. */
808 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
813 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
814 if (addr
== wp
->vaddr
&& len
== wp
->len
815 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
816 cpu_watchpoint_remove_by_ref(cpu
, wp
);
823 /* Remove a specific watchpoint by reference. */
824 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
826 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
828 tlb_flush_page(cpu
, watchpoint
->vaddr
);
833 /* Remove all matching watchpoints. */
834 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
836 CPUWatchpoint
*wp
, *next
;
838 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
839 if (wp
->flags
& mask
) {
840 cpu_watchpoint_remove_by_ref(cpu
, wp
);
846 /* Return true if this watchpoint address matches the specified
847 * access (ie the address range covered by the watchpoint overlaps
848 * partially or completely with the address range covered by the
851 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
852 vaddr addr
, vaddr len
)
854 /* We know the lengths are non-zero, but a little caution is
855 * required to avoid errors in the case where the range ends
856 * exactly at the top of the address space and so addr + len
857 * wraps round to zero.
859 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
860 vaddr addrend
= addr
+ len
- 1;
862 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
865 /* Return flags for watchpoints that match addr + prot. */
866 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
871 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
872 if (watchpoint_address_matches(wp
, addr
, len
)) {
879 /* Generate a debug exception if a watchpoint has been hit. */
880 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
881 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
883 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
886 assert(tcg_enabled());
887 if (cpu
->watchpoint_hit
) {
889 * We re-entered the check after replacing the TB.
890 * Now raise the debug interrupt so that it will
891 * trigger after the current instruction.
893 qemu_mutex_lock_iothread();
894 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
895 qemu_mutex_unlock_iothread();
899 if (cc
->tcg_ops
->adjust_watchpoint_address
) {
900 /* this is currently used only by ARM BE32 */
901 addr
= cc
->tcg_ops
->adjust_watchpoint_address(cpu
, addr
, len
);
903 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
904 if (watchpoint_address_matches(wp
, addr
, len
)
905 && (wp
->flags
& flags
)) {
906 if (replay_running_debug()) {
908 * replay_breakpoint reads icount.
909 * Force recompile to succeed, because icount may
910 * be read only at the end of the block.
912 if (!cpu
->can_do_io
) {
913 /* Force execution of one insn next time. */
914 cpu
->cflags_next_tb
= 1 | CF_LAST_IO
| curr_cflags(cpu
);
915 cpu_loop_exit_restore(cpu
, ra
);
918 * Don't process the watchpoints when we are
919 * in a reverse debugging operation.
924 if (flags
== BP_MEM_READ
) {
925 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
927 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
929 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
930 wp
->hitattrs
= attrs
;
931 if (!cpu
->watchpoint_hit
) {
932 if (wp
->flags
& BP_CPU
&& cc
->tcg_ops
->debug_check_watchpoint
&&
933 !cc
->tcg_ops
->debug_check_watchpoint(cpu
, wp
)) {
934 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
937 cpu
->watchpoint_hit
= wp
;
940 tb_check_watchpoint(cpu
, ra
);
941 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
942 cpu
->exception_index
= EXCP_DEBUG
;
944 cpu_loop_exit_restore(cpu
, ra
);
946 /* Force execution of one insn next time. */
947 cpu
->cflags_next_tb
= 1 | curr_cflags(cpu
);
950 cpu_restore_state(cpu
, ra
, true);
952 cpu_loop_exit_noexc(cpu
);
956 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
961 #endif /* CONFIG_TCG */
963 /* Called from RCU critical section */
964 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
968 block
= qatomic_rcu_read(&ram_list
.mru_block
);
969 if (block
&& addr
- block
->offset
< block
->max_length
) {
972 RAMBLOCK_FOREACH(block
) {
973 if (addr
- block
->offset
< block
->max_length
) {
978 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
982 /* It is safe to write mru_block outside the iothread lock. This
987 * xxx removed from list
991 * call_rcu(reclaim_ramblock, xxx);
994 * qatomic_rcu_set is not needed here. The block was already published
995 * when it was placed into the list. Here we're just making an extra
996 * copy of the pointer.
998 ram_list
.mru_block
= block
;
1002 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1009 assert(tcg_enabled());
1010 end
= TARGET_PAGE_ALIGN(start
+ length
);
1011 start
&= TARGET_PAGE_MASK
;
1013 RCU_READ_LOCK_GUARD();
1014 block
= qemu_get_ram_block(start
);
1015 assert(block
== qemu_get_ram_block(end
- 1));
1016 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1018 tlb_reset_dirty(cpu
, start1
, length
);
1022 /* Note: start and end must be within the same ram block. */
1023 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1027 DirtyMemoryBlocks
*blocks
;
1028 unsigned long end
, page
, start_page
;
1031 uint64_t mr_offset
, mr_size
;
1037 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1038 start_page
= start
>> TARGET_PAGE_BITS
;
1041 WITH_RCU_READ_LOCK_GUARD() {
1042 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1043 ramblock
= qemu_get_ram_block(start
);
1044 /* Range sanity check on the ramblock */
1045 assert(start
>= ramblock
->offset
&&
1046 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1048 while (page
< end
) {
1049 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1050 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1051 unsigned long num
= MIN(end
- page
,
1052 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1054 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1059 mr_offset
= (ram_addr_t
)(start_page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1060 mr_size
= (end
- start_page
) << TARGET_PAGE_BITS
;
1061 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1064 if (dirty
&& tcg_enabled()) {
1065 tlb_reset_dirty_range_all(start
, length
);
1071 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1072 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1074 DirtyMemoryBlocks
*blocks
;
1075 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1076 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1077 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1078 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1079 DirtyBitmapSnapshot
*snap
;
1080 unsigned long page
, end
, dest
;
1082 snap
= g_malloc0(sizeof(*snap
) +
1083 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1084 snap
->start
= first
;
1087 page
= first
>> TARGET_PAGE_BITS
;
1088 end
= last
>> TARGET_PAGE_BITS
;
1091 WITH_RCU_READ_LOCK_GUARD() {
1092 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1094 while (page
< end
) {
1095 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1096 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1097 unsigned long num
= MIN(end
- page
,
1098 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1100 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1101 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1102 offset
>>= BITS_PER_LEVEL
;
1104 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1105 blocks
->blocks
[idx
] + offset
,
1108 dest
+= num
>> BITS_PER_LEVEL
;
1112 if (tcg_enabled()) {
1113 tlb_reset_dirty_range_all(start
, length
);
1116 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1121 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1125 unsigned long page
, end
;
1127 assert(start
>= snap
->start
);
1128 assert(start
+ length
<= snap
->end
);
1130 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1131 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1133 while (page
< end
) {
1134 if (test_bit(page
, snap
->dirty
)) {
1142 /* Called from RCU critical section */
1143 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1144 MemoryRegionSection
*section
)
1146 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
1147 return section
- d
->map
.sections
;
1150 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1152 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1154 static uint16_t phys_section_add(PhysPageMap
*map
,
1155 MemoryRegionSection
*section
)
1157 /* The physical section number is ORed with a page-aligned
1158 * pointer to produce the iotlb entries. Thus it should
1159 * never overflow into the page-aligned value.
1161 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1163 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1164 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1165 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1166 map
->sections_nb_alloc
);
1168 map
->sections
[map
->sections_nb
] = *section
;
1169 memory_region_ref(section
->mr
);
1170 return map
->sections_nb
++;
1173 static void phys_section_destroy(MemoryRegion
*mr
)
1175 bool have_sub_page
= mr
->subpage
;
1177 memory_region_unref(mr
);
1179 if (have_sub_page
) {
1180 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1181 object_unref(OBJECT(&subpage
->iomem
));
1186 static void phys_sections_free(PhysPageMap
*map
)
1188 while (map
->sections_nb
> 0) {
1189 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1190 phys_section_destroy(section
->mr
);
1192 g_free(map
->sections
);
1196 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1198 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1200 hwaddr base
= section
->offset_within_address_space
1202 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1203 MemoryRegionSection subsection
= {
1204 .offset_within_address_space
= base
,
1205 .size
= int128_make64(TARGET_PAGE_SIZE
),
1209 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1211 if (!(existing
->mr
->subpage
)) {
1212 subpage
= subpage_init(fv
, base
);
1214 subsection
.mr
= &subpage
->iomem
;
1215 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1216 phys_section_add(&d
->map
, &subsection
));
1218 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1220 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1221 end
= start
+ int128_get64(section
->size
) - 1;
1222 subpage_register(subpage
, start
, end
,
1223 phys_section_add(&d
->map
, section
));
1227 static void register_multipage(FlatView
*fv
,
1228 MemoryRegionSection
*section
)
1230 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1231 hwaddr start_addr
= section
->offset_within_address_space
;
1232 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1233 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1237 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1241 * The range in *section* may look like this:
1245 * where s stands for subpage and P for page.
1247 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1249 MemoryRegionSection remain
= *section
;
1250 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1252 /* register first subpage */
1253 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1254 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1255 - remain
.offset_within_address_space
;
1257 MemoryRegionSection now
= remain
;
1258 now
.size
= int128_min(int128_make64(left
), now
.size
);
1259 register_subpage(fv
, &now
);
1260 if (int128_eq(remain
.size
, now
.size
)) {
1263 remain
.size
= int128_sub(remain
.size
, now
.size
);
1264 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1265 remain
.offset_within_region
+= int128_get64(now
.size
);
1268 /* register whole pages */
1269 if (int128_ge(remain
.size
, page_size
)) {
1270 MemoryRegionSection now
= remain
;
1271 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1272 register_multipage(fv
, &now
);
1273 if (int128_eq(remain
.size
, now
.size
)) {
1276 remain
.size
= int128_sub(remain
.size
, now
.size
);
1277 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1278 remain
.offset_within_region
+= int128_get64(now
.size
);
1281 /* register last subpage */
1282 register_subpage(fv
, &remain
);
1285 void qemu_flush_coalesced_mmio_buffer(void)
1288 kvm_flush_coalesced_mmio_buffer();
1291 void qemu_mutex_lock_ramlist(void)
1293 qemu_mutex_lock(&ram_list
.mutex
);
1296 void qemu_mutex_unlock_ramlist(void)
1298 qemu_mutex_unlock(&ram_list
.mutex
);
1301 void ram_block_dump(Monitor
*mon
)
1306 RCU_READ_LOCK_GUARD();
1307 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1308 "Block Name", "PSize", "Offset", "Used", "Total");
1309 RAMBLOCK_FOREACH(block
) {
1310 psize
= size_to_str(block
->page_size
);
1311 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1312 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1313 (uint64_t)block
->offset
,
1314 (uint64_t)block
->used_length
,
1315 (uint64_t)block
->max_length
);
1322 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1323 * may or may not name the same files / on the same filesystem now as
1324 * when we actually open and map them. Iterate over the file
1325 * descriptors instead, and use qemu_fd_getpagesize().
1327 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1329 long *hpsize_min
= opaque
;
1331 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1332 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1333 long hpsize
= host_memory_backend_pagesize(backend
);
1335 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1336 *hpsize_min
= hpsize
;
1343 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1345 long *hpsize_max
= opaque
;
1347 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1348 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1349 long hpsize
= host_memory_backend_pagesize(backend
);
1351 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1352 *hpsize_max
= hpsize
;
1360 * TODO: We assume right now that all mapped host memory backends are
1361 * used as RAM, however some might be used for different purposes.
1363 long qemu_minrampagesize(void)
1365 long hpsize
= LONG_MAX
;
1366 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1368 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1372 long qemu_maxrampagesize(void)
1375 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1377 object_child_foreach(memdev_root
, find_max_backend_pagesize
, &pagesize
);
1381 long qemu_minrampagesize(void)
1383 return qemu_real_host_page_size
;
1385 long qemu_maxrampagesize(void)
1387 return qemu_real_host_page_size
;
1392 static int64_t get_file_size(int fd
)
1395 #if defined(__linux__)
1398 if (fstat(fd
, &st
) < 0) {
1402 /* Special handling for devdax character devices */
1403 if (S_ISCHR(st
.st_mode
)) {
1404 g_autofree
char *subsystem_path
= NULL
;
1405 g_autofree
char *subsystem
= NULL
;
1407 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1408 major(st
.st_rdev
), minor(st
.st_rdev
));
1409 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1411 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1412 g_autofree
char *size_path
= NULL
;
1413 g_autofree
char *size_str
= NULL
;
1415 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1416 major(st
.st_rdev
), minor(st
.st_rdev
));
1418 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1419 return g_ascii_strtoll(size_str
, NULL
, 0);
1423 #endif /* defined(__linux__) */
1425 /* st.st_size may be zero for special files yet lseek(2) works */
1426 size
= lseek(fd
, 0, SEEK_END
);
1433 static int64_t get_file_align(int fd
)
1436 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1439 if (fstat(fd
, &st
) < 0) {
1443 /* Special handling for devdax character devices */
1444 if (S_ISCHR(st
.st_mode
)) {
1445 g_autofree
char *path
= NULL
;
1446 g_autofree
char *rpath
= NULL
;
1447 struct daxctl_ctx
*ctx
;
1448 struct daxctl_region
*region
;
1451 path
= g_strdup_printf("/sys/dev/char/%d:%d",
1452 major(st
.st_rdev
), minor(st
.st_rdev
));
1453 rpath
= realpath(path
, NULL
);
1455 rc
= daxctl_new(&ctx
);
1460 daxctl_region_foreach(ctx
, region
) {
1461 if (strstr(rpath
, daxctl_region_get_path(region
))) {
1462 align
= daxctl_region_get_align(region
);
1468 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1473 static int file_ram_open(const char *path
,
1474 const char *region_name
,
1480 char *sanitized_name
;
1486 fd
= open(path
, readonly
? O_RDONLY
: O_RDWR
);
1488 /* @path names an existing file, use it */
1491 if (errno
== ENOENT
) {
1492 /* @path names a file that doesn't exist, create it */
1493 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1498 } else if (errno
== EISDIR
) {
1499 /* @path names a directory, create a file there */
1500 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1501 sanitized_name
= g_strdup(region_name
);
1502 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1508 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1510 g_free(sanitized_name
);
1512 fd
= mkstemp(filename
);
1520 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1521 error_setg_errno(errp
, errno
,
1522 "can't open backing store %s for guest RAM",
1527 * Try again on EINTR and EEXIST. The latter happens when
1528 * something else creates the file between our two open().
1535 static void *file_ram_alloc(RAMBlock
*block
,
1543 uint32_t qemu_map_flags
;
1546 block
->page_size
= qemu_fd_getpagesize(fd
);
1547 if (block
->mr
->align
% block
->page_size
) {
1548 error_setg(errp
, "alignment 0x%" PRIx64
1549 " must be multiples of page size 0x%zx",
1550 block
->mr
->align
, block
->page_size
);
1552 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1553 error_setg(errp
, "alignment 0x%" PRIx64
1554 " must be a power of two", block
->mr
->align
);
1557 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1558 #if defined(__s390x__)
1559 if (kvm_enabled()) {
1560 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1564 if (memory
< block
->page_size
) {
1565 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1566 "or larger than page size 0x%zx",
1567 memory
, block
->page_size
);
1571 memory
= ROUND_UP(memory
, block
->page_size
);
1574 * ftruncate is not supported by hugetlbfs in older
1575 * hosts, so don't bother bailing out on errors.
1576 * If anything goes wrong with it under other filesystems,
1579 * Do not truncate the non-empty backend file to avoid corrupting
1580 * the existing data in the file. Disabling shrinking is not
1581 * enough. For example, the current vNVDIMM implementation stores
1582 * the guest NVDIMM labels at the end of the backend file. If the
1583 * backend file is later extended, QEMU will not be able to find
1584 * those labels. Therefore, extending the non-empty backend file
1585 * is disabled as well.
1587 if (truncate
&& ftruncate(fd
, memory
)) {
1588 perror("ftruncate");
1591 qemu_map_flags
= readonly
? QEMU_MAP_READONLY
: 0;
1592 qemu_map_flags
|= (block
->flags
& RAM_SHARED
) ? QEMU_MAP_SHARED
: 0;
1593 qemu_map_flags
|= (block
->flags
& RAM_PMEM
) ? QEMU_MAP_SYNC
: 0;
1594 qemu_map_flags
|= (block
->flags
& RAM_NORESERVE
) ? QEMU_MAP_NORESERVE
: 0;
1595 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
, qemu_map_flags
, offset
);
1596 if (area
== MAP_FAILED
) {
1597 error_setg_errno(errp
, errno
,
1598 "unable to map backing store for guest RAM");
1607 /* Allocate space within the ram_addr_t space that governs the
1609 * Called with the ramlist lock held.
1611 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1613 RAMBlock
*block
, *next_block
;
1614 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1616 assert(size
!= 0); /* it would hand out same offset multiple times */
1618 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1622 RAMBLOCK_FOREACH(block
) {
1623 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1625 /* Align blocks to start on a 'long' in the bitmap
1626 * which makes the bitmap sync'ing take the fast path.
1628 candidate
= block
->offset
+ block
->max_length
;
1629 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1631 /* Search for the closest following block
1634 RAMBLOCK_FOREACH(next_block
) {
1635 if (next_block
->offset
>= candidate
) {
1636 next
= MIN(next
, next_block
->offset
);
1640 /* If it fits remember our place and remember the size
1641 * of gap, but keep going so that we might find a smaller
1642 * gap to fill so avoiding fragmentation.
1644 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1646 mingap
= next
- candidate
;
1649 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1652 if (offset
== RAM_ADDR_MAX
) {
1653 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1658 trace_find_ram_offset(size
, offset
);
1663 static unsigned long last_ram_page(void)
1666 ram_addr_t last
= 0;
1668 RCU_READ_LOCK_GUARD();
1669 RAMBLOCK_FOREACH(block
) {
1670 last
= MAX(last
, block
->offset
+ block
->max_length
);
1672 return last
>> TARGET_PAGE_BITS
;
1675 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1679 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1680 if (!machine_dump_guest_core(current_machine
)) {
1681 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1683 perror("qemu_madvise");
1684 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1685 "but dump_guest_core=off specified\n");
1690 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1695 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
1700 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
1705 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
1707 return rb
->used_length
;
1710 ram_addr_t
qemu_ram_get_max_length(RAMBlock
*rb
)
1712 return rb
->max_length
;
1715 bool qemu_ram_is_shared(RAMBlock
*rb
)
1717 return rb
->flags
& RAM_SHARED
;
1720 bool qemu_ram_is_noreserve(RAMBlock
*rb
)
1722 return rb
->flags
& RAM_NORESERVE
;
1725 /* Note: Only set at the start of postcopy */
1726 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
1728 return rb
->flags
& RAM_UF_ZEROPAGE
;
1731 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
1733 rb
->flags
|= RAM_UF_ZEROPAGE
;
1736 bool qemu_ram_is_migratable(RAMBlock
*rb
)
1738 return rb
->flags
& RAM_MIGRATABLE
;
1741 void qemu_ram_set_migratable(RAMBlock
*rb
)
1743 rb
->flags
|= RAM_MIGRATABLE
;
1746 void qemu_ram_unset_migratable(RAMBlock
*rb
)
1748 rb
->flags
&= ~RAM_MIGRATABLE
;
1751 /* Called with iothread lock held. */
1752 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1757 assert(!new_block
->idstr
[0]);
1760 char *id
= qdev_get_dev_path(dev
);
1762 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1766 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1768 RCU_READ_LOCK_GUARD();
1769 RAMBLOCK_FOREACH(block
) {
1770 if (block
!= new_block
&&
1771 !strcmp(block
->idstr
, new_block
->idstr
)) {
1772 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1779 /* Called with iothread lock held. */
1780 void qemu_ram_unset_idstr(RAMBlock
*block
)
1782 /* FIXME: arch_init.c assumes that this is not called throughout
1783 * migration. Ignore the problem since hot-unplug during migration
1784 * does not work anyway.
1787 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1791 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1793 return rb
->page_size
;
1796 /* Returns the largest size of page in use */
1797 size_t qemu_ram_pagesize_largest(void)
1802 RAMBLOCK_FOREACH(block
) {
1803 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1809 static int memory_try_enable_merging(void *addr
, size_t len
)
1811 if (!machine_mem_merge(current_machine
)) {
1812 /* disabled by the user */
1816 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1820 * Resizing RAM while migrating can result in the migration being canceled.
1821 * Care has to be taken if the guest might have already detected the memory.
1823 * As memory core doesn't know how is memory accessed, it is up to
1824 * resize callback to update device state and/or add assertions to detect
1825 * misuse, if necessary.
1827 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1829 const ram_addr_t oldsize
= block
->used_length
;
1830 const ram_addr_t unaligned_size
= newsize
;
1834 newsize
= HOST_PAGE_ALIGN(newsize
);
1836 if (block
->used_length
== newsize
) {
1838 * We don't have to resize the ram block (which only knows aligned
1839 * sizes), however, we have to notify if the unaligned size changed.
1841 if (unaligned_size
!= memory_region_size(block
->mr
)) {
1842 memory_region_set_size(block
->mr
, unaligned_size
);
1843 if (block
->resized
) {
1844 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1850 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1851 error_setg_errno(errp
, EINVAL
,
1852 "Size mismatch: %s: 0x" RAM_ADDR_FMT
1853 " != 0x" RAM_ADDR_FMT
, block
->idstr
,
1854 newsize
, block
->used_length
);
1858 if (block
->max_length
< newsize
) {
1859 error_setg_errno(errp
, EINVAL
,
1860 "Size too large: %s: 0x" RAM_ADDR_FMT
1861 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1862 newsize
, block
->max_length
);
1866 /* Notify before modifying the ram block and touching the bitmaps. */
1868 ram_block_notify_resize(block
->host
, oldsize
, newsize
);
1871 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1872 block
->used_length
= newsize
;
1873 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1875 memory_region_set_size(block
->mr
, unaligned_size
);
1876 if (block
->resized
) {
1877 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1883 * Trigger sync on the given ram block for range [start, start + length]
1884 * with the backing store if one is available.
1886 * @Note: this is supposed to be a synchronous op.
1888 void qemu_ram_msync(RAMBlock
*block
, ram_addr_t start
, ram_addr_t length
)
1890 /* The requested range should fit in within the block range */
1891 g_assert((start
+ length
) <= block
->used_length
);
1893 #ifdef CONFIG_LIBPMEM
1894 /* The lack of support for pmem should not block the sync */
1895 if (ramblock_is_pmem(block
)) {
1896 void *addr
= ramblock_ptr(block
, start
);
1897 pmem_persist(addr
, length
);
1901 if (block
->fd
>= 0) {
1903 * Case there is no support for PMEM or the memory has not been
1904 * specified as persistent (or is not one) - use the msync.
1905 * Less optimal but still achieves the same goal
1907 void *addr
= ramblock_ptr(block
, start
);
1908 if (qemu_msync(addr
, length
, block
->fd
)) {
1909 warn_report("%s: failed to sync memory range: start: "
1910 RAM_ADDR_FMT
" length: " RAM_ADDR_FMT
,
1911 __func__
, start
, length
);
1916 /* Called with ram_list.mutex held */
1917 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1918 ram_addr_t new_ram_size
)
1920 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1921 DIRTY_MEMORY_BLOCK_SIZE
);
1922 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1923 DIRTY_MEMORY_BLOCK_SIZE
);
1926 /* Only need to extend if block count increased */
1927 if (new_num_blocks
<= old_num_blocks
) {
1931 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1932 DirtyMemoryBlocks
*old_blocks
;
1933 DirtyMemoryBlocks
*new_blocks
;
1936 old_blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1937 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1938 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1940 if (old_num_blocks
) {
1941 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1942 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1945 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1946 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1949 qatomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1952 g_free_rcu(old_blocks
, rcu
);
1957 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1959 const bool noreserve
= qemu_ram_is_noreserve(new_block
);
1960 const bool shared
= qemu_ram_is_shared(new_block
);
1962 RAMBlock
*last_block
= NULL
;
1963 ram_addr_t old_ram_size
, new_ram_size
;
1966 old_ram_size
= last_ram_page();
1968 qemu_mutex_lock_ramlist();
1969 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1971 if (!new_block
->host
) {
1972 if (xen_enabled()) {
1973 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1974 new_block
->mr
, &err
);
1976 error_propagate(errp
, err
);
1977 qemu_mutex_unlock_ramlist();
1981 new_block
->host
= qemu_anon_ram_alloc(new_block
->max_length
,
1982 &new_block
->mr
->align
,
1984 if (!new_block
->host
) {
1985 error_setg_errno(errp
, errno
,
1986 "cannot set up guest memory '%s'",
1987 memory_region_name(new_block
->mr
));
1988 qemu_mutex_unlock_ramlist();
1991 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1995 new_ram_size
= MAX(old_ram_size
,
1996 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1997 if (new_ram_size
> old_ram_size
) {
1998 dirty_memory_extend(old_ram_size
, new_ram_size
);
2000 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2001 * QLIST (which has an RCU-friendly variant) does not have insertion at
2002 * tail, so save the last element in last_block.
2004 RAMBLOCK_FOREACH(block
) {
2006 if (block
->max_length
< new_block
->max_length
) {
2011 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2012 } else if (last_block
) {
2013 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2014 } else { /* list is empty */
2015 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2017 ram_list
.mru_block
= NULL
;
2019 /* Write list before version */
2022 qemu_mutex_unlock_ramlist();
2024 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2025 new_block
->used_length
,
2028 if (new_block
->host
) {
2029 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2030 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2032 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
2033 * Configure it unless the machine is a qtest server, in which case
2034 * KVM is not used and it may be forked (eg for fuzzing purposes).
2036 if (!qtest_enabled()) {
2037 qemu_madvise(new_block
->host
, new_block
->max_length
,
2038 QEMU_MADV_DONTFORK
);
2040 ram_block_notify_add(new_block
->host
, new_block
->used_length
,
2041 new_block
->max_length
);
2046 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2047 uint32_t ram_flags
, int fd
, off_t offset
,
2048 bool readonly
, Error
**errp
)
2050 RAMBlock
*new_block
;
2051 Error
*local_err
= NULL
;
2052 int64_t file_size
, file_align
;
2054 /* Just support these ram flags by now. */
2055 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
| RAM_NORESERVE
)) == 0);
2057 if (xen_enabled()) {
2058 error_setg(errp
, "-mem-path not supported with Xen");
2062 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2064 "host lacks kvm mmu notifiers, -mem-path unsupported");
2068 size
= HOST_PAGE_ALIGN(size
);
2069 file_size
= get_file_size(fd
);
2070 if (file_size
> 0 && file_size
< size
) {
2071 error_setg(errp
, "backing store size 0x%" PRIx64
2072 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2077 file_align
= get_file_align(fd
);
2078 if (file_align
> 0 && mr
&& file_align
> mr
->align
) {
2079 error_setg(errp
, "backing store align 0x%" PRIx64
2080 " is larger than 'align' option 0x%" PRIx64
,
2081 file_align
, mr
->align
);
2085 new_block
= g_malloc0(sizeof(*new_block
));
2087 new_block
->used_length
= size
;
2088 new_block
->max_length
= size
;
2089 new_block
->flags
= ram_flags
;
2090 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, readonly
,
2091 !file_size
, offset
, errp
);
2092 if (!new_block
->host
) {
2097 ram_block_add(new_block
, &local_err
);
2100 error_propagate(errp
, local_err
);
2108 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2109 uint32_t ram_flags
, const char *mem_path
,
2110 bool readonly
, Error
**errp
)
2116 fd
= file_ram_open(mem_path
, memory_region_name(mr
), readonly
, &created
,
2122 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, 0, readonly
, errp
);
2136 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2137 void (*resized
)(const char*,
2140 void *host
, uint32_t ram_flags
,
2141 MemoryRegion
*mr
, Error
**errp
)
2143 RAMBlock
*new_block
;
2144 Error
*local_err
= NULL
;
2146 assert((ram_flags
& ~(RAM_SHARED
| RAM_RESIZEABLE
| RAM_PREALLOC
|
2147 RAM_NORESERVE
)) == 0);
2148 assert(!host
^ (ram_flags
& RAM_PREALLOC
));
2150 size
= HOST_PAGE_ALIGN(size
);
2151 max_size
= HOST_PAGE_ALIGN(max_size
);
2152 new_block
= g_malloc0(sizeof(*new_block
));
2154 new_block
->resized
= resized
;
2155 new_block
->used_length
= size
;
2156 new_block
->max_length
= max_size
;
2157 assert(max_size
>= size
);
2159 new_block
->page_size
= qemu_real_host_page_size
;
2160 new_block
->host
= host
;
2161 new_block
->flags
= ram_flags
;
2162 ram_block_add(new_block
, &local_err
);
2165 error_propagate(errp
, local_err
);
2171 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2172 MemoryRegion
*mr
, Error
**errp
)
2174 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, RAM_PREALLOC
, mr
,
2178 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, uint32_t ram_flags
,
2179 MemoryRegion
*mr
, Error
**errp
)
2181 assert((ram_flags
& ~(RAM_SHARED
| RAM_NORESERVE
)) == 0);
2182 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, ram_flags
, mr
, errp
);
2185 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2186 void (*resized
)(const char*,
2189 MemoryRegion
*mr
, Error
**errp
)
2191 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
,
2192 RAM_RESIZEABLE
, mr
, errp
);
2195 static void reclaim_ramblock(RAMBlock
*block
)
2197 if (block
->flags
& RAM_PREALLOC
) {
2199 } else if (xen_enabled()) {
2200 xen_invalidate_map_cache_entry(block
->host
);
2202 } else if (block
->fd
>= 0) {
2203 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2207 qemu_anon_ram_free(block
->host
, block
->max_length
);
2212 void qemu_ram_free(RAMBlock
*block
)
2219 ram_block_notify_remove(block
->host
, block
->used_length
,
2223 qemu_mutex_lock_ramlist();
2224 QLIST_REMOVE_RCU(block
, next
);
2225 ram_list
.mru_block
= NULL
;
2226 /* Write list before version */
2229 call_rcu(block
, reclaim_ramblock
, rcu
);
2230 qemu_mutex_unlock_ramlist();
2234 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2241 RAMBLOCK_FOREACH(block
) {
2242 offset
= addr
- block
->offset
;
2243 if (offset
< block
->max_length
) {
2244 vaddr
= ramblock_ptr(block
, offset
);
2245 if (block
->flags
& RAM_PREALLOC
) {
2247 } else if (xen_enabled()) {
2251 flags
|= block
->flags
& RAM_SHARED
?
2252 MAP_SHARED
: MAP_PRIVATE
;
2253 flags
|= block
->flags
& RAM_NORESERVE
? MAP_NORESERVE
: 0;
2254 if (block
->fd
>= 0) {
2255 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2256 flags
, block
->fd
, offset
);
2258 flags
|= MAP_ANONYMOUS
;
2259 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2262 if (area
!= vaddr
) {
2263 error_report("Could not remap addr: "
2264 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2268 memory_try_enable_merging(vaddr
, length
);
2269 qemu_ram_setup_dump(vaddr
, length
);
2274 #endif /* !_WIN32 */
2276 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2277 * This should not be used for general purpose DMA. Use address_space_map
2278 * or address_space_rw instead. For local memory (e.g. video ram) that the
2279 * device owns, use memory_region_get_ram_ptr.
2281 * Called within RCU critical section.
2283 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2285 RAMBlock
*block
= ram_block
;
2287 if (block
== NULL
) {
2288 block
= qemu_get_ram_block(addr
);
2289 addr
-= block
->offset
;
2292 if (xen_enabled() && block
->host
== NULL
) {
2293 /* We need to check if the requested address is in the RAM
2294 * because we don't want to map the entire memory in QEMU.
2295 * In that case just map until the end of the page.
2297 if (block
->offset
== 0) {
2298 return xen_map_cache(addr
, 0, 0, false);
2301 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2303 return ramblock_ptr(block
, addr
);
2306 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2307 * but takes a size argument.
2309 * Called within RCU critical section.
2311 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2312 hwaddr
*size
, bool lock
)
2314 RAMBlock
*block
= ram_block
;
2319 if (block
== NULL
) {
2320 block
= qemu_get_ram_block(addr
);
2321 addr
-= block
->offset
;
2323 *size
= MIN(*size
, block
->max_length
- addr
);
2325 if (xen_enabled() && block
->host
== NULL
) {
2326 /* We need to check if the requested address is in the RAM
2327 * because we don't want to map the entire memory in QEMU.
2328 * In that case just map the requested area.
2330 if (block
->offset
== 0) {
2331 return xen_map_cache(addr
, *size
, lock
, lock
);
2334 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2337 return ramblock_ptr(block
, addr
);
2340 /* Return the offset of a hostpointer within a ramblock */
2341 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2343 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2344 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2345 assert(res
< rb
->max_length
);
2351 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2354 * ptr: Host pointer to look up
2355 * round_offset: If true round the result offset down to a page boundary
2356 * *ram_addr: set to result ram_addr
2357 * *offset: set to result offset within the RAMBlock
2359 * Returns: RAMBlock (or NULL if not found)
2361 * By the time this function returns, the returned pointer is not protected
2362 * by RCU anymore. If the caller is not within an RCU critical section and
2363 * does not hold the iothread lock, it must have other means of protecting the
2364 * pointer, such as a reference to the region that includes the incoming
2367 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2371 uint8_t *host
= ptr
;
2373 if (xen_enabled()) {
2374 ram_addr_t ram_addr
;
2375 RCU_READ_LOCK_GUARD();
2376 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2377 block
= qemu_get_ram_block(ram_addr
);
2379 *offset
= ram_addr
- block
->offset
;
2384 RCU_READ_LOCK_GUARD();
2385 block
= qatomic_rcu_read(&ram_list
.mru_block
);
2386 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2390 RAMBLOCK_FOREACH(block
) {
2391 /* This case append when the block is not mapped. */
2392 if (block
->host
== NULL
) {
2395 if (host
- block
->host
< block
->max_length
) {
2403 *offset
= (host
- block
->host
);
2405 *offset
&= TARGET_PAGE_MASK
;
2411 * Finds the named RAMBlock
2413 * name: The name of RAMBlock to find
2415 * Returns: RAMBlock (or NULL if not found)
2417 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2421 RAMBLOCK_FOREACH(block
) {
2422 if (!strcmp(name
, block
->idstr
)) {
2430 /* Some of the softmmu routines need to translate from a host pointer
2431 (typically a TLB entry) back to a ram offset. */
2432 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2437 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2439 return RAM_ADDR_INVALID
;
2442 return block
->offset
+ offset
;
2445 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2446 MemTxAttrs attrs
, void *buf
, hwaddr len
);
2447 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2448 const void *buf
, hwaddr len
);
2449 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2450 bool is_write
, MemTxAttrs attrs
);
2452 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2453 unsigned len
, MemTxAttrs attrs
)
2455 subpage_t
*subpage
= opaque
;
2459 #if defined(DEBUG_SUBPAGE)
2460 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2461 subpage
, len
, addr
);
2463 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2467 *data
= ldn_p(buf
, len
);
2471 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2472 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2474 subpage_t
*subpage
= opaque
;
2477 #if defined(DEBUG_SUBPAGE)
2478 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2479 " value %"PRIx64
"\n",
2480 __func__
, subpage
, len
, addr
, value
);
2482 stn_p(buf
, len
, value
);
2483 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2486 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2487 unsigned len
, bool is_write
,
2490 subpage_t
*subpage
= opaque
;
2491 #if defined(DEBUG_SUBPAGE)
2492 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2493 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2496 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2497 len
, is_write
, attrs
);
2500 static const MemoryRegionOps subpage_ops
= {
2501 .read_with_attrs
= subpage_read
,
2502 .write_with_attrs
= subpage_write
,
2503 .impl
.min_access_size
= 1,
2504 .impl
.max_access_size
= 8,
2505 .valid
.min_access_size
= 1,
2506 .valid
.max_access_size
= 8,
2507 .valid
.accepts
= subpage_accepts
,
2508 .endianness
= DEVICE_NATIVE_ENDIAN
,
2511 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2516 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2518 idx
= SUBPAGE_IDX(start
);
2519 eidx
= SUBPAGE_IDX(end
);
2520 #if defined(DEBUG_SUBPAGE)
2521 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2522 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2524 for (; idx
<= eidx
; idx
++) {
2525 mmio
->sub_section
[idx
] = section
;
2531 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2535 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2536 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2539 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2540 NULL
, TARGET_PAGE_SIZE
);
2541 mmio
->iomem
.subpage
= true;
2542 #if defined(DEBUG_SUBPAGE)
2543 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2544 mmio
, base
, TARGET_PAGE_SIZE
);
2550 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2553 MemoryRegionSection section
= {
2556 .offset_within_address_space
= 0,
2557 .offset_within_region
= 0,
2558 .size
= int128_2_64(),
2561 return phys_section_add(map
, §ion
);
2564 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2565 hwaddr index
, MemTxAttrs attrs
)
2567 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2568 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2569 AddressSpaceDispatch
*d
= qatomic_rcu_read(&cpuas
->memory_dispatch
);
2570 MemoryRegionSection
*sections
= d
->map
.sections
;
2572 return §ions
[index
& ~TARGET_PAGE_MASK
];
2575 static void io_mem_init(void)
2577 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2581 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2583 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2586 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2587 assert(n
== PHYS_SECTION_UNASSIGNED
);
2589 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2594 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2596 phys_sections_free(&d
->map
);
2600 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2604 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2606 CPUAddressSpace
*cpuas
;
2608 /* Wait for the CPU to end the current TB. This avoids the following
2612 * ---------------------- -------------------------
2613 * TLB check -> slow path
2614 * notdirty_mem_write
2618 * TLB check -> fast path
2622 * by pushing the migration thread's memory read after the vCPU thread has
2623 * written the memory.
2625 if (replay_mode
== REPLAY_MODE_NONE
) {
2627 * VGA can make calls to this function while updating the screen.
2628 * In record/replay mode this causes a deadlock, because
2629 * run_on_cpu waits for rr mutex. Therefore no races are possible
2630 * in this case and no need for making run_on_cpu when
2631 * record/replay is not enabled.
2633 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2634 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2638 static void tcg_commit(MemoryListener
*listener
)
2640 CPUAddressSpace
*cpuas
;
2641 AddressSpaceDispatch
*d
;
2643 assert(tcg_enabled());
2644 /* since each CPU stores ram addresses in its TLB cache, we must
2645 reset the modified entries */
2646 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2647 cpu_reloading_memory_map();
2648 /* The CPU and TLB are protected by the iothread lock.
2649 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2650 * may have split the RCU critical section.
2652 d
= address_space_to_dispatch(cpuas
->as
);
2653 qatomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2654 tlb_flush(cpuas
->cpu
);
2657 static void memory_map_init(void)
2659 system_memory
= g_malloc(sizeof(*system_memory
));
2661 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2662 address_space_init(&address_space_memory
, system_memory
, "memory");
2664 system_io
= g_malloc(sizeof(*system_io
));
2665 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2667 address_space_init(&address_space_io
, system_io
, "I/O");
2670 MemoryRegion
*get_system_memory(void)
2672 return system_memory
;
2675 MemoryRegion
*get_system_io(void)
2680 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2683 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2684 addr
+= memory_region_get_ram_addr(mr
);
2686 /* No early return if dirty_log_mask is or becomes 0, because
2687 * cpu_physical_memory_set_dirty_range will still call
2688 * xen_modified_memory.
2690 if (dirty_log_mask
) {
2692 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2694 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2695 assert(tcg_enabled());
2696 tb_invalidate_phys_range(addr
, addr
+ length
);
2697 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2699 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2702 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
2705 * In principle this function would work on other memory region types too,
2706 * but the ROM device use case is the only one where this operation is
2707 * necessary. Other memory regions should use the
2708 * address_space_read/write() APIs.
2710 assert(memory_region_is_romd(mr
));
2712 invalidate_and_set_dirty(mr
, addr
, size
);
2715 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2717 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2719 /* Regions are assumed to support 1-4 byte accesses unless
2720 otherwise specified. */
2721 if (access_size_max
== 0) {
2722 access_size_max
= 4;
2725 /* Bound the maximum access by the alignment of the address. */
2726 if (!mr
->ops
->impl
.unaligned
) {
2727 unsigned align_size_max
= addr
& -addr
;
2728 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2729 access_size_max
= align_size_max
;
2733 /* Don't attempt accesses larger than the maximum. */
2734 if (l
> access_size_max
) {
2735 l
= access_size_max
;
2742 static bool prepare_mmio_access(MemoryRegion
*mr
)
2744 bool release_lock
= false;
2746 if (!qemu_mutex_iothread_locked()) {
2747 qemu_mutex_lock_iothread();
2748 release_lock
= true;
2750 if (mr
->flush_coalesced_mmio
) {
2751 qemu_flush_coalesced_mmio_buffer();
2754 return release_lock
;
2757 /* Called within RCU critical section. */
2758 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2761 hwaddr len
, hwaddr addr1
,
2762 hwaddr l
, MemoryRegion
*mr
)
2766 MemTxResult result
= MEMTX_OK
;
2767 bool release_lock
= false;
2768 const uint8_t *buf
= ptr
;
2771 if (!memory_access_is_direct(mr
, true)) {
2772 release_lock
|= prepare_mmio_access(mr
);
2773 l
= memory_access_size(mr
, l
, addr1
);
2774 /* XXX: could force current_cpu to NULL to avoid
2776 val
= ldn_he_p(buf
, l
);
2777 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
2778 size_memop(l
), attrs
);
2781 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2782 memcpy(ram_ptr
, buf
, l
);
2783 invalidate_and_set_dirty(mr
, addr1
, l
);
2787 qemu_mutex_unlock_iothread();
2788 release_lock
= false;
2800 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2806 /* Called from RCU critical section. */
2807 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2808 const void *buf
, hwaddr len
)
2813 MemTxResult result
= MEMTX_OK
;
2816 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2817 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
2823 /* Called within RCU critical section. */
2824 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
2825 MemTxAttrs attrs
, void *ptr
,
2826 hwaddr len
, hwaddr addr1
, hwaddr l
,
2831 MemTxResult result
= MEMTX_OK
;
2832 bool release_lock
= false;
2835 fuzz_dma_read_cb(addr
, len
, mr
);
2837 if (!memory_access_is_direct(mr
, false)) {
2839 release_lock
|= prepare_mmio_access(mr
);
2840 l
= memory_access_size(mr
, l
, addr1
);
2841 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
2842 size_memop(l
), attrs
);
2843 stn_he_p(buf
, l
, val
);
2846 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2847 memcpy(buf
, ram_ptr
, l
);
2851 qemu_mutex_unlock_iothread();
2852 release_lock
= false;
2864 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2870 /* Called from RCU critical section. */
2871 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2872 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2879 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2880 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
2884 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
2885 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2887 MemTxResult result
= MEMTX_OK
;
2891 RCU_READ_LOCK_GUARD();
2892 fv
= address_space_to_flatview(as
);
2893 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
2899 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
2901 const void *buf
, hwaddr len
)
2903 MemTxResult result
= MEMTX_OK
;
2907 RCU_READ_LOCK_GUARD();
2908 fv
= address_space_to_flatview(as
);
2909 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
2915 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2916 void *buf
, hwaddr len
, bool is_write
)
2919 return address_space_write(as
, addr
, attrs
, buf
, len
);
2921 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
2925 void cpu_physical_memory_rw(hwaddr addr
, void *buf
,
2926 hwaddr len
, bool is_write
)
2928 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
2929 buf
, len
, is_write
);
2932 enum write_rom_type
{
2937 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
2942 enum write_rom_type type
)
2948 const uint8_t *buf
= ptr
;
2950 RCU_READ_LOCK_GUARD();
2953 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
2955 if (!(memory_region_is_ram(mr
) ||
2956 memory_region_is_romd(mr
))) {
2957 l
= memory_access_size(mr
, l
, addr1
);
2960 ram_ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2963 memcpy(ram_ptr
, buf
, l
);
2964 invalidate_and_set_dirty(mr
, addr1
, l
);
2967 flush_idcache_range((uintptr_t)ram_ptr
, (uintptr_t)ram_ptr
, l
);
2978 /* used for ROM loading : can write in RAM and ROM */
2979 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
2981 const void *buf
, hwaddr len
)
2983 return address_space_write_rom_internal(as
, addr
, attrs
,
2984 buf
, len
, WRITE_DATA
);
2987 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
2990 * This function should do the same thing as an icache flush that was
2991 * triggered from within the guest. For TCG we are always cache coherent,
2992 * so there is no need to flush anything. For KVM / Xen we need to flush
2993 * the host's instruction cache at least.
2995 if (tcg_enabled()) {
2999 address_space_write_rom_internal(&address_space_memory
,
3000 start
, MEMTXATTRS_UNSPECIFIED
,
3001 NULL
, len
, FLUSH_CACHE
);
3012 static BounceBuffer bounce
;
3014 typedef struct MapClient
{
3016 QLIST_ENTRY(MapClient
) link
;
3019 QemuMutex map_client_list_lock
;
3020 static QLIST_HEAD(, MapClient
) map_client_list
3021 = QLIST_HEAD_INITIALIZER(map_client_list
);
3023 static void cpu_unregister_map_client_do(MapClient
*client
)
3025 QLIST_REMOVE(client
, link
);
3029 static void cpu_notify_map_clients_locked(void)
3033 while (!QLIST_EMPTY(&map_client_list
)) {
3034 client
= QLIST_FIRST(&map_client_list
);
3035 qemu_bh_schedule(client
->bh
);
3036 cpu_unregister_map_client_do(client
);
3040 void cpu_register_map_client(QEMUBH
*bh
)
3042 MapClient
*client
= g_malloc(sizeof(*client
));
3044 qemu_mutex_lock(&map_client_list_lock
);
3046 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3047 if (!qatomic_read(&bounce
.in_use
)) {
3048 cpu_notify_map_clients_locked();
3050 qemu_mutex_unlock(&map_client_list_lock
);
3053 void cpu_exec_init_all(void)
3055 qemu_mutex_init(&ram_list
.mutex
);
3056 /* The data structures we set up here depend on knowing the page size,
3057 * so no more changes can be made after this point.
3058 * In an ideal world, nothing we did before we had finished the
3059 * machine setup would care about the target page size, and we could
3060 * do this much later, rather than requiring board models to state
3061 * up front what their requirements are.
3063 finalize_target_page_bits();
3066 qemu_mutex_init(&map_client_list_lock
);
3069 void cpu_unregister_map_client(QEMUBH
*bh
)
3073 qemu_mutex_lock(&map_client_list_lock
);
3074 QLIST_FOREACH(client
, &map_client_list
, link
) {
3075 if (client
->bh
== bh
) {
3076 cpu_unregister_map_client_do(client
);
3080 qemu_mutex_unlock(&map_client_list_lock
);
3083 static void cpu_notify_map_clients(void)
3085 qemu_mutex_lock(&map_client_list_lock
);
3086 cpu_notify_map_clients_locked();
3087 qemu_mutex_unlock(&map_client_list_lock
);
3090 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3091 bool is_write
, MemTxAttrs attrs
)
3098 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3099 if (!memory_access_is_direct(mr
, is_write
)) {
3100 l
= memory_access_size(mr
, l
, addr
);
3101 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3112 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3113 hwaddr len
, bool is_write
,
3119 RCU_READ_LOCK_GUARD();
3120 fv
= address_space_to_flatview(as
);
3121 result
= flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3126 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3128 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3129 bool is_write
, MemTxAttrs attrs
)
3133 MemoryRegion
*this_mr
;
3139 if (target_len
== 0) {
3144 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3145 &len
, is_write
, attrs
);
3146 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3152 /* Map a physical memory region into a host virtual address.
3153 * May map a subset of the requested range, given by and returned in *plen.
3154 * May return NULL if resources needed to perform the mapping are exhausted.
3155 * Use only for reads OR writes - not for read-modify-write operations.
3156 * Use cpu_register_map_client() to know when retrying the map operation is
3157 * likely to succeed.
3159 void *address_space_map(AddressSpace
*as
,
3176 RCU_READ_LOCK_GUARD();
3177 fv
= address_space_to_flatview(as
);
3178 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3180 if (!memory_access_is_direct(mr
, is_write
)) {
3181 if (qatomic_xchg(&bounce
.in_use
, true)) {
3185 /* Avoid unbounded allocations */
3186 l
= MIN(l
, TARGET_PAGE_SIZE
);
3187 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3191 memory_region_ref(mr
);
3194 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3199 return bounce
.buffer
;
3203 memory_region_ref(mr
);
3204 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3205 l
, is_write
, attrs
);
3206 fuzz_dma_read_cb(addr
, *plen
, mr
);
3207 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3212 /* Unmaps a memory region previously mapped by address_space_map().
3213 * Will also mark the memory as dirty if is_write is true. access_len gives
3214 * the amount of memory that was actually read or written by the caller.
3216 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3217 bool is_write
, hwaddr access_len
)
3219 if (buffer
!= bounce
.buffer
) {
3223 mr
= memory_region_from_host(buffer
, &addr1
);
3226 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3228 if (xen_enabled()) {
3229 xen_invalidate_map_cache_entry(buffer
);
3231 memory_region_unref(mr
);
3235 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3236 bounce
.buffer
, access_len
);
3238 qemu_vfree(bounce
.buffer
);
3239 bounce
.buffer
= NULL
;
3240 memory_region_unref(bounce
.mr
);
3241 qatomic_mb_set(&bounce
.in_use
, false);
3242 cpu_notify_map_clients();
3245 void *cpu_physical_memory_map(hwaddr addr
,
3249 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3250 MEMTXATTRS_UNSPECIFIED
);
3253 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3254 bool is_write
, hwaddr access_len
)
3256 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3259 #define ARG1_DECL AddressSpace *as
3262 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3263 #define RCU_READ_LOCK(...) rcu_read_lock()
3264 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3265 #include "memory_ldst.c.inc"
3267 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3273 AddressSpaceDispatch
*d
;
3281 cache
->fv
= address_space_get_flatview(as
);
3282 d
= flatview_to_dispatch(cache
->fv
);
3283 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3286 * cache->xlat is now relative to cache->mrs.mr, not to the section itself.
3287 * Take that into account to compute how many bytes are there between
3288 * cache->xlat and the end of the section.
3290 diff
= int128_sub(cache
->mrs
.size
,
3291 int128_make64(cache
->xlat
- cache
->mrs
.offset_within_region
));
3292 l
= int128_get64(int128_min(diff
, int128_make64(l
)));
3295 memory_region_ref(mr
);
3296 if (memory_access_is_direct(mr
, is_write
)) {
3297 /* We don't care about the memory attributes here as we're only
3298 * doing this if we found actual RAM, which behaves the same
3299 * regardless of attributes; so UNSPECIFIED is fine.
3301 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3302 cache
->xlat
, l
, is_write
,
3303 MEMTXATTRS_UNSPECIFIED
);
3304 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3310 cache
->is_write
= is_write
;
3314 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3318 assert(cache
->is_write
);
3319 if (likely(cache
->ptr
)) {
3320 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3324 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3326 if (!cache
->mrs
.mr
) {
3330 if (xen_enabled()) {
3331 xen_invalidate_map_cache_entry(cache
->ptr
);
3333 memory_region_unref(cache
->mrs
.mr
);
3334 flatview_unref(cache
->fv
);
3335 cache
->mrs
.mr
= NULL
;
3339 /* Called from RCU critical section. This function has the same
3340 * semantics as address_space_translate, but it only works on a
3341 * predefined range of a MemoryRegion that was mapped with
3342 * address_space_cache_init.
3344 static inline MemoryRegion
*address_space_translate_cached(
3345 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3346 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3348 MemoryRegionSection section
;
3350 IOMMUMemoryRegion
*iommu_mr
;
3351 AddressSpace
*target_as
;
3353 assert(!cache
->ptr
);
3354 *xlat
= addr
+ cache
->xlat
;
3357 iommu_mr
= memory_region_get_iommu(mr
);
3363 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3364 NULL
, is_write
, true,
3369 /* Called from RCU critical section. address_space_read_cached uses this
3370 * out of line function when the target is an MMIO or IOMMU region.
3373 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3374 void *buf
, hwaddr len
)
3380 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3381 MEMTXATTRS_UNSPECIFIED
);
3382 return flatview_read_continue(cache
->fv
,
3383 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3387 /* Called from RCU critical section. address_space_write_cached uses this
3388 * out of line function when the target is an MMIO or IOMMU region.
3391 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3392 const void *buf
, hwaddr len
)
3398 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3399 MEMTXATTRS_UNSPECIFIED
);
3400 return flatview_write_continue(cache
->fv
,
3401 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3405 #define ARG1_DECL MemoryRegionCache *cache
3407 #define SUFFIX _cached_slow
3408 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3409 #define RCU_READ_LOCK() ((void)0)
3410 #define RCU_READ_UNLOCK() ((void)0)
3411 #include "memory_ldst.c.inc"
3413 /* virtual memory access for debug (includes writing to ROM) */
3414 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3415 void *ptr
, target_ulong len
, bool is_write
)
3418 target_ulong l
, page
;
3421 cpu_synchronize_state(cpu
);
3427 page
= addr
& TARGET_PAGE_MASK
;
3428 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3429 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3430 /* if no physical page mapped, return an error */
3431 if (phys_addr
== -1)
3433 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3436 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3438 res
= address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3441 res
= address_space_read(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3444 if (res
!= MEMTX_OK
) {
3455 * Allows code that needs to deal with migration bitmaps etc to still be built
3456 * target independent.
3458 size_t qemu_target_page_size(void)
3460 return TARGET_PAGE_SIZE
;
3463 int qemu_target_page_bits(void)
3465 return TARGET_PAGE_BITS
;
3468 int qemu_target_page_bits_min(void)
3470 return TARGET_PAGE_BITS_MIN
;
3473 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3479 RCU_READ_LOCK_GUARD();
3480 mr
= address_space_translate(&address_space_memory
,
3481 phys_addr
, &phys_addr
, &l
, false,
3482 MEMTXATTRS_UNSPECIFIED
);
3484 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3488 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3493 RCU_READ_LOCK_GUARD();
3494 RAMBLOCK_FOREACH(block
) {
3495 ret
= func(block
, opaque
);
3504 * Unmap pages of memory from start to start+length such that
3505 * they a) read as 0, b) Trigger whatever fault mechanism
3506 * the OS provides for postcopy.
3507 * The pages must be unmapped by the end of the function.
3508 * Returns: 0 on success, none-0 on failure
3511 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3515 uint8_t *host_startaddr
= rb
->host
+ start
;
3517 if (!QEMU_PTR_IS_ALIGNED(host_startaddr
, rb
->page_size
)) {
3518 error_report("ram_block_discard_range: Unaligned start address: %p",
3523 if ((start
+ length
) <= rb
->max_length
) {
3524 bool need_madvise
, need_fallocate
;
3525 if (!QEMU_IS_ALIGNED(length
, rb
->page_size
)) {
3526 error_report("ram_block_discard_range: Unaligned length: %zx",
3531 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3533 /* The logic here is messy;
3534 * madvise DONTNEED fails for hugepages
3535 * fallocate works on hugepages and shmem
3536 * shared anonymous memory requires madvise REMOVE
3538 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3539 need_fallocate
= rb
->fd
!= -1;
3540 if (need_fallocate
) {
3541 /* For a file, this causes the area of the file to be zero'd
3542 * if read, and for hugetlbfs also causes it to be unmapped
3543 * so a userfault will trigger.
3545 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3546 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3550 error_report("ram_block_discard_range: Failed to fallocate "
3551 "%s:%" PRIx64
" +%zx (%d)",
3552 rb
->idstr
, start
, length
, ret
);
3557 error_report("ram_block_discard_range: fallocate not available/file"
3558 "%s:%" PRIx64
" +%zx (%d)",
3559 rb
->idstr
, start
, length
, ret
);
3564 /* For normal RAM this causes it to be unmapped,
3565 * for shared memory it causes the local mapping to disappear
3566 * and to fall back on the file contents (which we just
3567 * fallocate'd away).
3569 #if defined(CONFIG_MADVISE)
3570 if (qemu_ram_is_shared(rb
) && rb
->fd
< 0) {
3571 ret
= madvise(host_startaddr
, length
, QEMU_MADV_REMOVE
);
3573 ret
= madvise(host_startaddr
, length
, QEMU_MADV_DONTNEED
);
3577 error_report("ram_block_discard_range: Failed to discard range "
3578 "%s:%" PRIx64
" +%zx (%d)",
3579 rb
->idstr
, start
, length
, ret
);
3584 error_report("ram_block_discard_range: MADVISE not available"
3585 "%s:%" PRIx64
" +%zx (%d)",
3586 rb
->idstr
, start
, length
, ret
);
3590 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3591 need_madvise
, need_fallocate
, ret
);
3593 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3594 "/%zx/" RAM_ADDR_FMT
")",
3595 rb
->idstr
, start
, length
, rb
->max_length
);
3602 bool ramblock_is_pmem(RAMBlock
*rb
)
3604 return rb
->flags
& RAM_PMEM
;
3607 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3609 if (start
== end
- 1) {
3610 qemu_printf("\t%3d ", start
);
3612 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
3614 qemu_printf(" skip=%d ", skip
);
3615 if (ptr
== PHYS_MAP_NODE_NIL
) {
3616 qemu_printf(" ptr=NIL");
3618 qemu_printf(" ptr=#%d", ptr
);
3620 qemu_printf(" ptr=[%d]", ptr
);
3625 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3626 int128_sub((size), int128_one())) : 0)
3628 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3632 qemu_printf(" Dispatch\n");
3633 qemu_printf(" Physical sections\n");
3635 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3636 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3637 const char *names
[] = { " [unassigned]", " [not dirty]",
3638 " [ROM]", " [watch]" };
3640 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
3643 s
->offset_within_address_space
,
3644 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
3645 s
->mr
->name
? s
->mr
->name
: "(noname)",
3646 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3647 s
->mr
== root
? " [ROOT]" : "",
3648 s
== d
->mru_section
? " [MRU]" : "",
3649 s
->mr
->is_iommu
? " [iommu]" : "");
3652 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
3653 s
->mr
->alias
->name
: "noname");
3658 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3659 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3660 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3663 Node
*n
= d
->map
.nodes
+ i
;
3665 qemu_printf(" [%d]\n", i
);
3667 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3668 PhysPageEntry
*pe
= *n
+ j
;
3670 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3674 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3680 if (jprev
!= ARRAY_SIZE(*n
)) {
3681 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3686 /* Require any discards to work. */
3687 static unsigned int ram_block_discard_required_cnt
;
3688 /* Require only coordinated discards to work. */
3689 static unsigned int ram_block_coordinated_discard_required_cnt
;
3690 /* Disable any discards. */
3691 static unsigned int ram_block_discard_disabled_cnt
;
3692 /* Disable only uncoordinated discards. */
3693 static unsigned int ram_block_uncoordinated_discard_disabled_cnt
;
3694 static QemuMutex ram_block_discard_disable_mutex
;
3696 static void ram_block_discard_disable_mutex_lock(void)
3698 static gsize initialized
;
3700 if (g_once_init_enter(&initialized
)) {
3701 qemu_mutex_init(&ram_block_discard_disable_mutex
);
3702 g_once_init_leave(&initialized
, 1);
3704 qemu_mutex_lock(&ram_block_discard_disable_mutex
);
3707 static void ram_block_discard_disable_mutex_unlock(void)
3709 qemu_mutex_unlock(&ram_block_discard_disable_mutex
);
3712 int ram_block_discard_disable(bool state
)
3716 ram_block_discard_disable_mutex_lock();
3718 ram_block_discard_disabled_cnt
--;
3719 } else if (ram_block_discard_required_cnt
||
3720 ram_block_coordinated_discard_required_cnt
) {
3723 ram_block_discard_disabled_cnt
++;
3725 ram_block_discard_disable_mutex_unlock();
3729 int ram_block_uncoordinated_discard_disable(bool state
)
3733 ram_block_discard_disable_mutex_lock();
3735 ram_block_uncoordinated_discard_disabled_cnt
--;
3736 } else if (ram_block_discard_required_cnt
) {
3739 ram_block_uncoordinated_discard_disabled_cnt
++;
3741 ram_block_discard_disable_mutex_unlock();
3745 int ram_block_discard_require(bool state
)
3749 ram_block_discard_disable_mutex_lock();
3751 ram_block_discard_required_cnt
--;
3752 } else if (ram_block_discard_disabled_cnt
||
3753 ram_block_uncoordinated_discard_disabled_cnt
) {
3756 ram_block_discard_required_cnt
++;
3758 ram_block_discard_disable_mutex_unlock();
3762 int ram_block_coordinated_discard_require(bool state
)
3766 ram_block_discard_disable_mutex_lock();
3768 ram_block_coordinated_discard_required_cnt
--;
3769 } else if (ram_block_discard_disabled_cnt
) {
3772 ram_block_coordinated_discard_required_cnt
++;
3774 ram_block_discard_disable_mutex_unlock();
3778 bool ram_block_discard_is_disabled(void)
3780 return qatomic_read(&ram_block_discard_disabled_cnt
) ||
3781 qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt
);
3784 bool ram_block_discard_is_required(void)
3786 return qatomic_read(&ram_block_discard_required_cnt
) ||
3787 qatomic_read(&ram_block_coordinated_discard_required_cnt
);