2 * UniCore-F64 simulation helpers for QEMU.
4 * Copyright (C) 2010-2012 Guan Xuetao
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation, or any later version.
9 * See the COPYING file in the top-level directory.
12 #include "exec/helper-proto.h"
15 * The convention used for UniCore-F64 instructions:
16 * Single precition routines have a "s" suffix
17 * Double precision routines have a "d" suffix.
20 /* Convert host exception flags to f64 form. */
21 static inline int ucf64_exceptbits_from_host(int host_bits
)
25 if (host_bits
& float_flag_invalid
) {
26 target_bits
|= UCF64_FPSCR_FLAG_INVALID
;
28 if (host_bits
& float_flag_divbyzero
) {
29 target_bits
|= UCF64_FPSCR_FLAG_DIVZERO
;
31 if (host_bits
& float_flag_overflow
) {
32 target_bits
|= UCF64_FPSCR_FLAG_OVERFLOW
;
34 if (host_bits
& float_flag_underflow
) {
35 target_bits
|= UCF64_FPSCR_FLAG_UNDERFLOW
;
37 if (host_bits
& float_flag_inexact
) {
38 target_bits
|= UCF64_FPSCR_FLAG_INEXACT
;
43 uint32_t HELPER(ucf64_get_fpscr
)(CPUUniCore32State
*env
)
48 fpscr
= (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & UCF64_FPSCR_MASK
);
49 i
= get_float_exception_flags(&env
->ucf64
.fp_status
);
50 fpscr
|= ucf64_exceptbits_from_host(i
);
54 /* Convert ucf64 exception flags to target form. */
55 static inline int ucf64_exceptbits_to_host(int target_bits
)
59 if (target_bits
& UCF64_FPSCR_FLAG_INVALID
) {
60 host_bits
|= float_flag_invalid
;
62 if (target_bits
& UCF64_FPSCR_FLAG_DIVZERO
) {
63 host_bits
|= float_flag_divbyzero
;
65 if (target_bits
& UCF64_FPSCR_FLAG_OVERFLOW
) {
66 host_bits
|= float_flag_overflow
;
68 if (target_bits
& UCF64_FPSCR_FLAG_UNDERFLOW
) {
69 host_bits
|= float_flag_underflow
;
71 if (target_bits
& UCF64_FPSCR_FLAG_INEXACT
) {
72 host_bits
|= float_flag_inexact
;
77 void HELPER(ucf64_set_fpscr
)(CPUUniCore32State
*env
, uint32_t val
)
79 UniCore32CPU
*cpu
= uc32_env_get_cpu(env
);
83 changed
= env
->ucf64
.xregs
[UC32_UCF64_FPSCR
];
84 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (val
& UCF64_FPSCR_MASK
);
87 if (changed
& (UCF64_FPSCR_RND_MASK
)) {
88 i
= UCF64_FPSCR_RND(val
);
91 i
= float_round_nearest_even
;
94 i
= float_round_to_zero
;
100 i
= float_round_down
;
102 default: /* 100 and 101 not implement */
103 cpu_abort(CPU(cpu
), "Unsupported UniCore-F64 round mode");
105 set_float_rounding_mode(i
, &env
->ucf64
.fp_status
);
108 i
= ucf64_exceptbits_to_host(UCF64_FPSCR_TRAPEN(val
));
109 set_float_exception_flags(i
, &env
->ucf64
.fp_status
);
112 float32
HELPER(ucf64_adds
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
114 return float32_add(a
, b
, &env
->ucf64
.fp_status
);
117 float64
HELPER(ucf64_addd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
119 return float64_add(a
, b
, &env
->ucf64
.fp_status
);
122 float32
HELPER(ucf64_subs
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
124 return float32_sub(a
, b
, &env
->ucf64
.fp_status
);
127 float64
HELPER(ucf64_subd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
129 return float64_sub(a
, b
, &env
->ucf64
.fp_status
);
132 float32
HELPER(ucf64_muls
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
134 return float32_mul(a
, b
, &env
->ucf64
.fp_status
);
137 float64
HELPER(ucf64_muld
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
139 return float64_mul(a
, b
, &env
->ucf64
.fp_status
);
142 float32
HELPER(ucf64_divs
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
144 return float32_div(a
, b
, &env
->ucf64
.fp_status
);
147 float64
HELPER(ucf64_divd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
149 return float64_div(a
, b
, &env
->ucf64
.fp_status
);
152 float32
HELPER(ucf64_negs
)(float32 a
)
154 return float32_chs(a
);
157 float64
HELPER(ucf64_negd
)(float64 a
)
159 return float64_chs(a
);
162 float32
HELPER(ucf64_abss
)(float32 a
)
164 return float32_abs(a
);
167 float64
HELPER(ucf64_absd
)(float64 a
)
169 return float64_abs(a
);
172 void HELPER(ucf64_cmps
)(float32 a
, float32 b
, uint32_t c
,
173 CPUUniCore32State
*env
)
176 flag
= float32_compare_quiet(a
, b
, &env
->ucf64
.fp_status
);
192 if ((flag
== 0) || (flag
== 2)) {
202 if ((flag
== -1) || (flag
== 2)) {
207 if ((flag
== -1) || (flag
== 0)) {
217 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (env
->CF
<< 29)
218 | (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & 0x0fffffff);
221 void HELPER(ucf64_cmpd
)(float64 a
, float64 b
, uint32_t c
,
222 CPUUniCore32State
*env
)
225 flag
= float64_compare_quiet(a
, b
, &env
->ucf64
.fp_status
);
241 if ((flag
== 0) || (flag
== 2)) {
251 if ((flag
== -1) || (flag
== 2)) {
256 if ((flag
== -1) || (flag
== 0)) {
266 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (env
->CF
<< 29)
267 | (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & 0x0fffffff);
270 /* Helper routines to perform bitwise copies between float and int. */
271 static inline float32
ucf64_itos(uint32_t i
)
282 static inline uint32_t ucf64_stoi(float32 s
)
293 /* Integer to float conversion. */
294 float32
HELPER(ucf64_si2sf
)(float32 x
, CPUUniCore32State
*env
)
296 return int32_to_float32(ucf64_stoi(x
), &env
->ucf64
.fp_status
);
299 float64
HELPER(ucf64_si2df
)(float32 x
, CPUUniCore32State
*env
)
301 return int32_to_float64(ucf64_stoi(x
), &env
->ucf64
.fp_status
);
304 /* Float to integer conversion. */
305 float32
HELPER(ucf64_sf2si
)(float32 x
, CPUUniCore32State
*env
)
307 return ucf64_itos(float32_to_int32(x
, &env
->ucf64
.fp_status
));
310 float32
HELPER(ucf64_df2si
)(float64 x
, CPUUniCore32State
*env
)
312 return ucf64_itos(float64_to_int32(x
, &env
->ucf64
.fp_status
));
315 /* floating point conversion */
316 float64
HELPER(ucf64_sf2df
)(float32 x
, CPUUniCore32State
*env
)
318 return float32_to_float64(x
, &env
->ucf64
.fp_status
);
321 float32
HELPER(ucf64_df2sf
)(float64 x
, CPUUniCore32State
*env
)
323 return float64_to_float32(x
, &env
->ucf64
.fp_status
);