?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
tests: numa: test one backend with prealloc enabled
[qemu/ar7.git] / hw / arm / aspeed.c
bloba6a2102a93cbe2199c28e58deee480518076476e
1 /*
2 * OpenPOWER Palmetto BMC
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See
9 * the COPYING file in the top-level directory.
10 */
11
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "cpu.h"
15 #include "exec/address-spaces.h"
16 #include "hw/arm/boot.h"
17 #include "hw/arm/aspeed.h"
18 #include "hw/arm/aspeed_soc.h"
19 #include "hw/boards.h"
20 #include "hw/i2c/smbus_eeprom.h"
21 #include "hw/misc/pca9552.h"
22 #include "hw/misc/tmp105.h"
23 #include "hw/qdev-properties.h"
24 #include "qemu/log.h"
25 #include "sysemu/block-backend.h"
26 #include "sysemu/sysemu.h"
27 #include "hw/loader.h"
28 #include "qemu/error-report.h"
29 #include "qemu/units.h"
30
31 static struct arm_boot_info aspeed_board_binfo = {
32 .board_id = -1, /* device-tree-only board */
33 };
34
35 struct AspeedBoardState {
36 AspeedSoCState soc;
37 MemoryRegion ram_container;
38 MemoryRegion max_ram;
39 };
40
41 /* Palmetto hardware value: 0x120CE416 */
42 #define PALMETTO_BMC_HW_STRAP1 ( \
43 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
44 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
45 SCU_AST2400_HW_STRAP_ACPI_DIS | \
46 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
47 SCU_HW_STRAP_VGA_CLASS_CODE | \
48 SCU_HW_STRAP_LPC_RESET_PIN | \
49 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
50 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
51 SCU_HW_STRAP_SPI_WIDTH | \
52 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
53 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
54
55 /* AST2500 evb hardware value: 0xF100C2E6 */
56 #define AST2500_EVB_HW_STRAP1 (( \
57 AST2500_HW_STRAP1_DEFAULTS | \
58 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
59 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
60 SCU_AST2500_HW_STRAP_UART_DEBUG | \
61 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
62 SCU_HW_STRAP_MAC1_RGMII | \
63 SCU_HW_STRAP_MAC0_RGMII) & \
64 ~SCU_HW_STRAP_2ND_BOOT_WDT)
65
66 /* Romulus hardware value: 0xF10AD206 */
67 #define ROMULUS_BMC_HW_STRAP1 ( \
68 AST2500_HW_STRAP1_DEFAULTS | \
69 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
70 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
71 SCU_AST2500_HW_STRAP_UART_DEBUG | \
72 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
73 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
74 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
75
76 /* Swift hardware value: 0xF11AD206 */
77 #define SWIFT_BMC_HW_STRAP1 ( \
78 AST2500_HW_STRAP1_DEFAULTS | \
79 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
80 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
81 SCU_AST2500_HW_STRAP_UART_DEBUG | \
82 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
83 SCU_H_PLL_BYPASS_EN | \
84 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
85 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
86
87 /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
88 #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
89
90 /* AST2600 evb hardware value */
91 #define AST2600_EVB_HW_STRAP1 0x000000C0
92 #define AST2600_EVB_HW_STRAP2 0x00000003
93
94 /* Tacoma hardware value */
95 #define TACOMA_BMC_HW_STRAP1 0x00000000
96 #define TACOMA_BMC_HW_STRAP2 0x00000000
97
98 /*
99 * The max ram region is for firmwares that scan the address space
100 * with load/store to guess how much RAM the SoC has.
101 */
102 static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size)
103 {
104 return 0;
105 }
106
107 static void max_ram_write(void *opaque, hwaddr offset, uint64_t value,
108 unsigned size)
109 {
110 /* Discard writes */
111 }
112
113 static const MemoryRegionOps max_ram_ops = {
114 .read = max_ram_read,
115 .write = max_ram_write,
116 .endianness = DEVICE_NATIVE_ENDIAN,
117 };
118
119 #define FIRMWARE_ADDR 0x0
120
121 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
122 Error **errp)
123 {
124 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
125 uint8_t *storage;
126 int64_t size;
127
128 /* The block backend size should have already been 'validated' by
129 * the creation of the m25p80 object.
130 */
131 size = blk_getlength(blk);
132 if (size <= 0) {
133 error_setg(errp, "failed to get flash size");
134 return;
135 }
136
137 if (rom_size > size) {
138 rom_size = size;
139 }
140
141 storage = g_new0(uint8_t, rom_size);
142 if (blk_pread(blk, 0, storage, rom_size) < 0) {
143 error_setg(errp, "failed to read the initial flash content");
144 return;
145 }
146
147 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
148 g_free(storage);
149 }
150
151 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
152 Error **errp)
153 {
154 int i ;
155
156 for (i = 0; i < s->num_cs; ++i) {
157 AspeedSMCFlash *fl = &s->flashes[i];
158 DriveInfo *dinfo = drive_get_next(IF_MTD);
159 qemu_irq cs_line;
160
161 fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
162 if (dinfo) {
163 qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
164 errp);
165 }
166 qdev_init_nofail(fl->flash);
167
168 cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
169 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
170 }
171 }
172
173 static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
174 {
175 DeviceState *card;
176
177 card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
178 TYPE_SD_CARD);
179 if (dinfo) {
180 qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo),
181 &error_fatal);
182 }
183 object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
184 }
185
186 static void aspeed_machine_init(MachineState *machine)
187 {
188 AspeedBoardState *bmc;
189 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
190 AspeedSoCClass *sc;
191 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
192 ram_addr_t max_ram_size;
193 int i;
194
195 bmc = g_new0(AspeedBoardState, 1);
196
197 memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container",
198 UINT32_MAX);
199 memory_region_add_subregion(&bmc->ram_container, 0, machine->ram);
200
201 object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
202 (sizeof(bmc->soc)), amc->soc_name, &error_abort,
203 NULL);
204
205 sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
206
207 /*
208 * This will error out if isize is not supported by memory controller.
209 */
210 object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
211 &error_fatal);
212
213 object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
214 &error_abort);
215 object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
216 &error_abort);
217 object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
218 &error_abort);
219 object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
220 &error_abort);
221 object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container),
222 "dram", &error_abort);
223 if (machine->kernel_filename) {
224 /*
225 * When booting with a -kernel command line there is no u-boot
226 * that runs to unlock the SCU. In this case set the default to
227 * be unlocked as the kernel expects
228 */
229 object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
230 "hw-prot-key", &error_abort);
231 }
232 object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
233 &error_abort);
234
235 memory_region_add_subregion(get_system_memory(),
236 sc->memmap[ASPEED_SDRAM],
237 &bmc->ram_container);
238
239 max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size",
240 &error_abort);
241 memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL,
242 "max_ram", max_ram_size - ram_size);
243 memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
244
245 aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort);
246 aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort);
247
248 /* Install first FMC flash content as a boot rom. */
249 if (drive0) {
250 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
251 MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
252
253 /*
254 * create a ROM region using the default mapping window size of
255 * the flash module. The window size is 64MB for the AST2400
256 * SoC and 128MB for the AST2500 SoC, which is twice as big as
257 * needed by the flash modules of the Aspeed machines.
258 */
259 if (ASPEED_MACHINE(machine)->mmio_exec) {
260 memory_region_init_alias(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
261 &fl->mmio, 0, fl->size);
262 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
263 boot_rom);
264 } else {
265 memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
266 fl->size, &error_abort);
267 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
268 boot_rom);
269 write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
270 }
271 }
272
273 aspeed_board_binfo.ram_size = ram_size;
274 aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
275 aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
276
277 if (amc->i2c_init) {
278 amc->i2c_init(bmc);
279 }
280
281 for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
282 sdhci_attach_drive(&bmc->soc.sdhci.slots[i], drive_get_next(IF_SD));
283 }
284
285 if (bmc->soc.emmc.num_slots) {
286 sdhci_attach_drive(&bmc->soc.emmc.slots[0], drive_get_next(IF_SD));
287 }
288
289 arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
290 }
291
292 static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
293 {
294 AspeedSoCState *soc = &bmc->soc;
295 DeviceState *dev;
296 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
297
298 /* The palmetto platform expects a ds3231 RTC but a ds1338 is
299 * enough to provide basic RTC features. Alarms will be missing */
300 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
301
302 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50,
303 eeprom_buf);
304
305 /* add a TMP423 temperature sensor */
306 dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
307 "tmp423", 0x4c);
308 object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
309 object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
310 object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
311 object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
312 }
313
314 static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
315 {
316 AspeedSoCState *soc = &bmc->soc;
317 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
318
319 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50,
320 eeprom_buf);
321
322 /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
323 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7),
324 TYPE_TMP105, 0x4d);
325
326 /* The AST2500 EVB does not have an RTC. Let's pretend that one is
327 * plugged on the I2C bus header */
328 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
329 }
330
331 static void ast2600_evb_i2c_init(AspeedBoardState *bmc)
332 {
333 /* Start with some devices on our I2C busses */
334 ast2500_evb_i2c_init(bmc);
335 }
336
337 static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
338 {
339 AspeedSoCState *soc = &bmc->soc;
340
341 /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
342 * good enough */
343 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
344 }
345
346 static void swift_bmc_i2c_init(AspeedBoardState *bmc)
347 {
348 AspeedSoCState *soc = &bmc->soc;
349
350 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
351
352 /* The swift board expects a TMP275 but a TMP105 is compatible */
353 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48);
354 /* The swift board expects a pca9551 but a pca9552 is compatible */
355 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60);
356
357 /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */
358 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32);
359 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60);
360
361 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c);
362 /* The swift board expects a pca9539 but a pca9552 is compatible */
363 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74);
364
365 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c);
366 /* The swift board expects a pca9539 but a pca9552 is compatible */
367 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552",
368 0x74);
369
370 /* The swift board expects a TMP275 but a TMP105 is compatible */
371 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48);
372 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a);
373 }
374
375 static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
376 {
377 AspeedSoCState *soc = &bmc->soc;
378 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
379
380 /* Bus 3: TODO bmp280@77 */
381 /* Bus 3: TODO max31785@52 */
382 /* Bus 3: TODO dps310@76 */
383 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552,
384 0x60);
385
386 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
387 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
388
389 /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
390 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
391 0x4a);
392
393 /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
394 * good enough */
395 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
396
397 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
398 eeprom_buf);
399 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552,
400 0x60);
401 /* Bus 11: TODO ucd90160@64 */
402 }
403
404 static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
405 {
406 return ASPEED_MACHINE(obj)->mmio_exec;
407 }
408
409 static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp)
410 {
411 ASPEED_MACHINE(obj)->mmio_exec = value;
412 }
413
414 static void aspeed_machine_instance_init(Object *obj)
415 {
416 ASPEED_MACHINE(obj)->mmio_exec = false;
417 }
418
419 static void aspeed_machine_class_props_init(ObjectClass *oc)
420 {
421 object_class_property_add_bool(oc, "execute-in-place",
422 aspeed_get_mmio_exec,
423 aspeed_set_mmio_exec, &error_abort);
424 object_class_property_set_description(oc, "execute-in-place",
425 "boot directly from CE0 flash device", &error_abort);
426 }
427
428 static void aspeed_machine_class_init(ObjectClass *oc, void *data)
429 {
430 MachineClass *mc = MACHINE_CLASS(oc);
431
432 mc->init = aspeed_machine_init;
433 mc->max_cpus = ASPEED_CPUS_NUM;
434 mc->no_floppy = 1;
435 mc->no_cdrom = 1;
436 mc->no_parallel = 1;
437 mc->default_ram_id = "ram";
438
439 aspeed_machine_class_props_init(oc);
440 }
441
442 static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
443 {
444 MachineClass *mc = MACHINE_CLASS(oc);
445 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
446
447 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
448 amc->soc_name = "ast2400-a1";
449 amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
450 amc->fmc_model = "n25q256a";
451 amc->spi_model = "mx25l25635e";
452 amc->num_cs = 1;
453 amc->i2c_init = palmetto_bmc_i2c_init;
454 mc->default_ram_size = 256 * MiB;
455 };
456
457 static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
458 {
459 MachineClass *mc = MACHINE_CLASS(oc);
460 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
461
462 mc->desc = "Aspeed AST2500 EVB (ARM1176)";
463 amc->soc_name = "ast2500-a1";
464 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
465 amc->fmc_model = "w25q256";
466 amc->spi_model = "mx25l25635e";
467 amc->num_cs = 1;
468 amc->i2c_init = ast2500_evb_i2c_init;
469 mc->default_ram_size = 512 * MiB;
470 };
471
472 static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
473 {
474 MachineClass *mc = MACHINE_CLASS(oc);
475 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
476
477 mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
478 amc->soc_name = "ast2500-a1";
479 amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
480 amc->fmc_model = "n25q256a";
481 amc->spi_model = "mx66l1g45g";
482 amc->num_cs = 2;
483 amc->i2c_init = romulus_bmc_i2c_init;
484 mc->default_ram_size = 512 * MiB;
485 };
486
487 static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data)
488 {
489 MachineClass *mc = MACHINE_CLASS(oc);
490 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
491
492 mc->desc = "OpenPOWER Swift BMC (ARM1176)";
493 amc->soc_name = "ast2500-a1";
494 amc->hw_strap1 = SWIFT_BMC_HW_STRAP1;
495 amc->fmc_model = "mx66l1g45g";
496 amc->spi_model = "mx66l1g45g";
497 amc->num_cs = 2;
498 amc->i2c_init = swift_bmc_i2c_init;
499 mc->default_ram_size = 512 * MiB;
500 };
501
502 static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
503 {
504 MachineClass *mc = MACHINE_CLASS(oc);
505 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
506
507 mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
508 amc->soc_name = "ast2500-a1";
509 amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
510 amc->fmc_model = "mx25l25635e";
511 amc->spi_model = "mx66l1g45g";
512 amc->num_cs = 2;
513 amc->i2c_init = witherspoon_bmc_i2c_init;
514 mc->default_ram_size = 512 * MiB;
515 };
516
517 static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
518 {
519 MachineClass *mc = MACHINE_CLASS(oc);
520 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
521
522 mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
523 amc->soc_name = "ast2600-a0";
524 amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
525 amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
526 amc->fmc_model = "w25q512jv";
527 amc->spi_model = "mx66u51235f";
528 amc->num_cs = 1;
529 amc->i2c_init = ast2600_evb_i2c_init;
530 mc->default_ram_size = 1 * GiB;
531 };
532
533 static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
534 {
535 MachineClass *mc = MACHINE_CLASS(oc);
536 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
537
538 mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
539 amc->soc_name = "ast2600-a0";
540 amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
541 amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
542 amc->fmc_model = "mx66l1g45g";
543 amc->spi_model = "mx66l1g45g";
544 amc->num_cs = 2;
545 amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */
546 mc->default_ram_size = 1 * GiB;
547 };
548
549 static const TypeInfo aspeed_machine_types[] = {
550 {
551 .name = MACHINE_TYPE_NAME("palmetto-bmc"),
552 .parent = TYPE_ASPEED_MACHINE,
553 .class_init = aspeed_machine_palmetto_class_init,
554 }, {
555 .name = MACHINE_TYPE_NAME("ast2500-evb"),
556 .parent = TYPE_ASPEED_MACHINE,
557 .class_init = aspeed_machine_ast2500_evb_class_init,
558 }, {
559 .name = MACHINE_TYPE_NAME("romulus-bmc"),
560 .parent = TYPE_ASPEED_MACHINE,
561 .class_init = aspeed_machine_romulus_class_init,
562 }, {
563 .name = MACHINE_TYPE_NAME("swift-bmc"),
564 .parent = TYPE_ASPEED_MACHINE,
565 .class_init = aspeed_machine_swift_class_init,
566 }, {
567 .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
568 .parent = TYPE_ASPEED_MACHINE,
569 .class_init = aspeed_machine_witherspoon_class_init,
570 }, {
571 .name = MACHINE_TYPE_NAME("ast2600-evb"),
572 .parent = TYPE_ASPEED_MACHINE,
573 .class_init = aspeed_machine_ast2600_evb_class_init,
574 }, {
575 .name = MACHINE_TYPE_NAME("tacoma-bmc"),
576 .parent = TYPE_ASPEED_MACHINE,
577 .class_init = aspeed_machine_tacoma_class_init,
578 }, {
579 .name = TYPE_ASPEED_MACHINE,
580 .parent = TYPE_MACHINE,
581 .instance_size = sizeof(AspeedMachine),
582 .instance_init = aspeed_machine_instance_init,
583 .class_size = sizeof(AspeedMachineClass),
584 .class_init = aspeed_machine_class_init,
585 .abstract = true,
586 }
587 };
588
589 DEFINE_TYPES(aspeed_machine_types)
AR7 emulation for QEMU