target-arm/gdbstub.c

   1 /*
   2  * ARM gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  * Copyright (c) 2013 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include "qemu/osdep.h"
  21 #include "qemu-common.h"
  22 #include "exec/gdbstub.h"
  23
  24 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
  25    whatever the target description contains.  Due to a historical mishap
  26    the FPA registers appear in between core integer regs and the CPSR.
  27    We hack round this by giving the FPA regs zero size when talking to a
  28    newer gdb.  */
  29
  30 int arm_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
  31 {
  32     ARMCPU *cpu = ARM_CPU(cs);
  33     CPUARMState *env = &cpu->env;
  34
  35     if (n < 16) {
  36         /* Core integer register.  */
  37         return gdb_get_reg32(mem_buf, env->regs[n]);
  38     }
  39     if (n < 24) {
  40         /* FPA registers.  */
  41         if (gdb_has_xml) {
  42             return 0;
  43         }
  44         memset(mem_buf, 0, 12);
  45         return 12;
  46     }
  47     switch (n) {
  48     case 24:
  49         /* FPA status register.  */
  50         if (gdb_has_xml) {
  51             return 0;
  52         }
  53         return gdb_get_reg32(mem_buf, 0);
  54     case 25:
  55         /* CPSR */
  56         return gdb_get_reg32(mem_buf, cpsr_read(env));
  57     }
  58     /* Unknown register.  */
  59     return 0;
  60 }
  61
  62 int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
  63 {
  64     ARMCPU *cpu = ARM_CPU(cs);
  65     CPUARMState *env = &cpu->env;
  66     uint32_t tmp;
  67
  68     tmp = ldl_p(mem_buf);
  69
  70     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
  71        cause problems if we ever implement the Jazelle DBX extensions.  */
  72     if (n == 15) {
  73         tmp &= ~1;
  74     }
  75
  76     if (n < 16) {
  77         /* Core integer register.  */
  78         env->regs[n] = tmp;
  79         return 4;
  80     }
  81     if (n < 24) { /* 16-23 */
  82         /* FPA registers (ignored).  */
  83         if (gdb_has_xml) {
  84             return 0;
  85         }
  86         return 12;
  87     }
  88     switch (n) {
  89     case 24:
  90         /* FPA status register (ignored).  */
  91         if (gdb_has_xml) {
  92             return 0;
  93         }
  94         return 4;
  95     case 25:
  96         /* CPSR */
  97         cpsr_write(env, tmp, 0xffffffff, CPSRWriteByGDBStub);
  98         return 4;
  99     }
 100     /* Unknown register.  */
 101     return 0;
 102 }