2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "qom/object.h"
21 #include "qapi/error.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/kvm.h"
24 #include "sysemu/kvm_int.h"
28 #include "internals.h"
29 #include "hw/pci/pci.h"
30 #include "exec/memattrs.h"
31 #include "exec/address-spaces.h"
32 #include "hw/boards.h"
36 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
40 static bool cap_has_mp_state
;
41 static bool cap_has_inject_serror_esr
;
42 static bool cap_has_inject_ext_dabt
;
44 static ARMHostCPUFeatures arm_host_cpu_features
;
46 int kvm_arm_vcpu_init(CPUState
*cs
)
48 ARMCPU
*cpu
= ARM_CPU(cs
);
49 struct kvm_vcpu_init init
;
51 init
.target
= cpu
->kvm_target
;
52 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
54 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
57 int kvm_arm_vcpu_finalize(CPUState
*cs
, int feature
)
59 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_FINALIZE
, &feature
);
62 void kvm_arm_init_serror_injection(CPUState
*cs
)
64 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
65 KVM_CAP_ARM_INJECT_SERROR_ESR
);
68 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
70 struct kvm_vcpu_init
*init
)
72 int ret
= 0, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
74 kvmfd
= qemu_open_old("/dev/kvm", O_RDWR
);
78 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, 0);
82 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
88 /* Caller doesn't want the VCPU to be initialized, so skip it */
92 if (init
->target
== -1) {
93 struct kvm_vcpu_init preferred
;
95 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, &preferred
);
97 init
->target
= preferred
.target
;
101 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
105 } else if (cpus_to_try
) {
106 /* Old kernel which doesn't know about the
107 * PREFERRED_TARGET ioctl: we know it will only support
108 * creating one kind of guest CPU which is its preferred
111 struct kvm_vcpu_init
try;
113 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
114 try.target
= *cpus_to_try
++;
115 memcpy(try.features
, init
->features
, sizeof(init
->features
));
116 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, &try);
124 init
->target
= try.target
;
126 /* Treat a NULL cpus_to_try argument the same as an empty
127 * list, which means we will fail the call since this must
128 * be an old kernel which doesn't support PREFERRED_TARGET.
154 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
158 for (i
= 2; i
>= 0; i
--) {
163 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
165 CPUARMState
*env
= &cpu
->env
;
167 if (!arm_host_cpu_features
.dtb_compatible
) {
168 if (!kvm_enabled() ||
169 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
170 /* We can't report this error yet, so flag that we need to
171 * in arm_cpu_realizefn().
173 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
174 cpu
->host_cpu_probe_failed
= true;
179 cpu
->kvm_target
= arm_host_cpu_features
.target
;
180 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
181 cpu
->isar
= arm_host_cpu_features
.isar
;
182 env
->features
= arm_host_cpu_features
.features
;
185 static bool kvm_no_adjvtime_get(Object
*obj
, Error
**errp
)
187 return !ARM_CPU(obj
)->kvm_adjvtime
;
190 static void kvm_no_adjvtime_set(Object
*obj
, bool value
, Error
**errp
)
192 ARM_CPU(obj
)->kvm_adjvtime
= !value
;
195 /* KVM VCPU properties should be prefixed with "kvm-". */
196 void kvm_arm_add_vcpu_properties(Object
*obj
)
198 ARMCPU
*cpu
= ARM_CPU(obj
);
199 CPUARMState
*env
= &cpu
->env
;
201 if (arm_feature(env
, ARM_FEATURE_GENERIC_TIMER
)) {
202 cpu
->kvm_adjvtime
= true;
203 object_property_add_bool(obj
, "kvm-no-adjvtime", kvm_no_adjvtime_get
,
204 kvm_no_adjvtime_set
);
205 object_property_set_description(obj
, "kvm-no-adjvtime",
206 "Set on to disable the adjustment of "
207 "the virtual counter. VM stopped time "
212 bool kvm_arm_pmu_supported(void)
214 return kvm_check_extension(kvm_state
, KVM_CAP_ARM_PMU_V3
);
217 int kvm_arm_get_max_vm_ipa_size(MachineState
*ms
)
219 KVMState
*s
= KVM_STATE(ms
->accelerator
);
222 ret
= kvm_check_extension(s
, KVM_CAP_ARM_VM_IPA_SIZE
);
223 return ret
> 0 ? ret
: 40;
226 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
229 /* For ARM interrupt delivery is always asynchronous,
230 * whether we are using an in-kernel VGIC or not.
232 kvm_async_interrupts_allowed
= true;
235 * PSCI wakes up secondary cores, so we always need to
236 * have vCPUs waiting in kernel space
238 kvm_halt_in_kernel_allowed
= true;
240 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
242 if (ms
->smp
.cpus
> 256 &&
243 !kvm_check_extension(s
, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2
)) {
244 error_report("Using more than 256 vcpus requires a host kernel "
245 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
249 if (kvm_check_extension(s
, KVM_CAP_ARM_NISV_TO_USER
)) {
250 if (kvm_vm_enable_cap(s
, KVM_CAP_ARM_NISV_TO_USER
, 0)) {
251 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
253 /* Set status for supporting the external dabt injection */
254 cap_has_inject_ext_dabt
= kvm_check_extension(s
,
255 KVM_CAP_ARM_INJECT_EXT_DABT
);
262 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
264 return cpu
->cpu_index
;
267 /* We track all the KVM devices which need their memory addresses
268 * passing to the kernel in a list of these structures.
269 * When board init is complete we run through the list and
270 * tell the kernel the base addresses of the memory regions.
271 * We use a MemoryListener to track mapping and unmapping of
272 * the regions during board creation, so the board models don't
273 * need to do anything special for the KVM case.
275 * Sometimes the address must be OR'ed with some other fields
276 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
277 * @kda_addr_ormask aims at storing the value of those fields.
279 typedef struct KVMDevice
{
280 struct kvm_arm_device_addr kda
;
281 struct kvm_device_attr kdattr
;
282 uint64_t kda_addr_ormask
;
284 QSLIST_ENTRY(KVMDevice
) entries
;
288 static QSLIST_HEAD(, KVMDevice
) kvm_devices_head
;
290 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
291 MemoryRegionSection
*section
)
295 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
296 if (section
->mr
== kd
->mr
) {
297 kd
->kda
.addr
= section
->offset_within_address_space
;
302 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
303 MemoryRegionSection
*section
)
307 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
308 if (section
->mr
== kd
->mr
) {
314 static MemoryListener devlistener
= {
315 .region_add
= kvm_arm_devlistener_add
,
316 .region_del
= kvm_arm_devlistener_del
,
319 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
321 struct kvm_device_attr
*attr
= &kd
->kdattr
;
324 /* If the device control API is available and we have a device fd on the
325 * KVMDevice struct, let's use the newer API
327 if (kd
->dev_fd
>= 0) {
328 uint64_t addr
= kd
->kda
.addr
;
330 addr
|= kd
->kda_addr_ormask
;
331 attr
->addr
= (uintptr_t)&addr
;
332 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
334 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
338 fprintf(stderr
, "Failed to set device address: %s\n",
344 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
348 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
349 if (kd
->kda
.addr
!= -1) {
350 kvm_arm_set_device_addr(kd
);
352 memory_region_unref(kd
->mr
);
353 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
356 memory_listener_unregister(&devlistener
);
359 static Notifier notify
= {
360 .notify
= kvm_arm_machine_init_done
,
363 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
364 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
368 if (!kvm_irqchip_in_kernel()) {
372 if (QSLIST_EMPTY(&kvm_devices_head
)) {
373 memory_listener_register(&devlistener
, &address_space_memory
);
374 qemu_add_machine_init_done_notifier(¬ify
);
376 kd
= g_new0(KVMDevice
, 1);
380 kd
->kdattr
.flags
= 0;
381 kd
->kdattr
.group
= group
;
382 kd
->kdattr
.attr
= attr
;
384 kd
->kda_addr_ormask
= addr_ormask
;
385 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
386 memory_region_ref(kd
->mr
);
389 static int compare_u64(const void *a
, const void *b
)
391 if (*(uint64_t *)a
> *(uint64_t *)b
) {
394 if (*(uint64_t *)a
< *(uint64_t *)b
) {
401 * cpreg_values are sorted in ascending order by KVM register ID
402 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
403 * the storage for a KVM register by ID with a binary search.
405 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU
*cpu
, uint64_t regidx
)
409 res
= bsearch(®idx
, cpu
->cpreg_indexes
, cpu
->cpreg_array_len
,
410 sizeof(uint64_t), compare_u64
);
413 return &cpu
->cpreg_values
[res
- cpu
->cpreg_indexes
];
416 /* Initialize the ARMCPU cpreg list according to the kernel's
417 * definition of what CPU registers it knows about (and throw away
418 * the previous TCG-created cpreg list).
420 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
422 struct kvm_reg_list rl
;
423 struct kvm_reg_list
*rlp
;
424 int i
, ret
, arraylen
;
425 CPUState
*cs
= CPU(cpu
);
428 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
432 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
434 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
438 /* Sort the list we get back from the kernel, since cpreg_tuples
439 * must be in strictly ascending order.
441 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
443 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
444 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
447 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
448 case KVM_REG_SIZE_U32
:
449 case KVM_REG_SIZE_U64
:
452 fprintf(stderr
, "Can't handle size of register in kernel list\n");
460 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
461 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
462 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
464 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
466 cpu
->cpreg_array_len
= arraylen
;
467 cpu
->cpreg_vmstate_array_len
= arraylen
;
469 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
470 uint64_t regidx
= rlp
->reg
[i
];
471 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
474 cpu
->cpreg_indexes
[arraylen
] = regidx
;
477 assert(cpu
->cpreg_array_len
== arraylen
);
479 if (!write_kvmstate_to_list(cpu
)) {
480 /* Shouldn't happen unless kernel is inconsistent about
481 * what registers exist.
483 fprintf(stderr
, "Initial read of kernel register state failed\n");
493 bool write_kvmstate_to_list(ARMCPU
*cpu
)
495 CPUState
*cs
= CPU(cpu
);
499 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
500 struct kvm_one_reg r
;
501 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
507 switch (regidx
& KVM_REG_SIZE_MASK
) {
508 case KVM_REG_SIZE_U32
:
509 r
.addr
= (uintptr_t)&v32
;
510 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
512 cpu
->cpreg_values
[i
] = v32
;
515 case KVM_REG_SIZE_U64
:
516 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
517 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
529 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
531 CPUState
*cs
= CPU(cpu
);
535 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
536 struct kvm_one_reg r
;
537 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
541 if (kvm_arm_cpreg_level(regidx
) > level
) {
546 switch (regidx
& KVM_REG_SIZE_MASK
) {
547 case KVM_REG_SIZE_U32
:
548 v32
= cpu
->cpreg_values
[i
];
549 r
.addr
= (uintptr_t)&v32
;
551 case KVM_REG_SIZE_U64
:
552 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
557 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
559 /* We might fail for "unknown register" and also for
560 * "you tried to set a register which is constant with
561 * a different value from what it actually contains".
569 void kvm_arm_cpu_pre_save(ARMCPU
*cpu
)
571 /* KVM virtual time adjustment */
572 if (cpu
->kvm_vtime_dirty
) {
573 *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
) = cpu
->kvm_vtime
;
577 void kvm_arm_cpu_post_load(ARMCPU
*cpu
)
579 /* KVM virtual time adjustment */
580 if (cpu
->kvm_adjvtime
) {
581 cpu
->kvm_vtime
= *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
);
582 cpu
->kvm_vtime_dirty
= true;
586 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
590 /* Re-init VCPU so that all registers are set to
591 * their respective reset values.
593 ret
= kvm_arm_vcpu_init(CPU(cpu
));
595 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
598 if (!write_kvmstate_to_list(cpu
)) {
599 fprintf(stderr
, "write_kvmstate_to_list failed\n");
603 * Sync the reset values also into the CPUState. This is necessary
604 * because the next thing we do will be a kvm_arch_put_registers()
605 * which will update the list values from the CPUState before copying
606 * the list values back to KVM. It's OK to ignore failure returns here
607 * for the same reason we do so in kvm_arch_get_registers().
609 write_list_to_cpustate(cpu
);
613 * Update KVM's MP_STATE based on what QEMU thinks it is
615 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
617 if (cap_has_mp_state
) {
618 struct kvm_mp_state mp_state
= {
619 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
620 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
622 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
624 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
625 __func__
, ret
, strerror(-ret
));
634 * Sync the KVM MP_STATE into QEMU
636 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
638 if (cap_has_mp_state
) {
639 struct kvm_mp_state mp_state
;
640 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
642 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
643 __func__
, ret
, strerror(-ret
));
646 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
653 void kvm_arm_get_virtual_time(CPUState
*cs
)
655 ARMCPU
*cpu
= ARM_CPU(cs
);
656 struct kvm_one_reg reg
= {
657 .id
= KVM_REG_ARM_TIMER_CNT
,
658 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
662 if (cpu
->kvm_vtime_dirty
) {
666 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
668 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
672 cpu
->kvm_vtime_dirty
= true;
675 void kvm_arm_put_virtual_time(CPUState
*cs
)
677 ARMCPU
*cpu
= ARM_CPU(cs
);
678 struct kvm_one_reg reg
= {
679 .id
= KVM_REG_ARM_TIMER_CNT
,
680 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
684 if (!cpu
->kvm_vtime_dirty
) {
688 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
690 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
694 cpu
->kvm_vtime_dirty
= false;
697 int kvm_put_vcpu_events(ARMCPU
*cpu
)
699 CPUARMState
*env
= &cpu
->env
;
700 struct kvm_vcpu_events events
;
703 if (!kvm_has_vcpu_events()) {
707 memset(&events
, 0, sizeof(events
));
708 events
.exception
.serror_pending
= env
->serror
.pending
;
710 /* Inject SError to guest with specified syndrome if host kernel
711 * supports it, otherwise inject SError without syndrome.
713 if (cap_has_inject_serror_esr
) {
714 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
715 events
.exception
.serror_esr
= env
->serror
.esr
;
718 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
720 error_report("failed to put vcpu events");
726 int kvm_get_vcpu_events(ARMCPU
*cpu
)
728 CPUARMState
*env
= &cpu
->env
;
729 struct kvm_vcpu_events events
;
732 if (!kvm_has_vcpu_events()) {
736 memset(&events
, 0, sizeof(events
));
737 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
739 error_report("failed to get vcpu events");
743 env
->serror
.pending
= events
.exception
.serror_pending
;
744 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
745 env
->serror
.esr
= events
.exception
.serror_esr
;
750 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
752 ARMCPU
*cpu
= ARM_CPU(cs
);
753 CPUARMState
*env
= &cpu
->env
;
755 if (unlikely(env
->ext_dabt_raised
)) {
757 * Verifying that the ext DABT has been properly injected,
758 * otherwise risking indefinitely re-running the faulting instruction
759 * Covering a very narrow case for kernels 5.5..5.5.4
760 * when injected abort was misconfigured to be
761 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
763 if (!arm_feature(env
, ARM_FEATURE_AARCH64
) &&
764 unlikely(!kvm_arm_verify_ext_dabt_pending(cs
))) {
766 error_report("Data abort exception with no valid ISS generated by "
767 "guest memory access. KVM unable to emulate faulting "
768 "instruction. Failed to inject an external data abort "
772 /* Clear the status */
773 env
->ext_dabt_raised
= 0;
777 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
780 uint32_t switched_level
;
782 if (kvm_irqchip_in_kernel()) {
784 * We only need to sync timer states with user-space interrupt
785 * controllers, so return early and save cycles if we don't.
787 return MEMTXATTRS_UNSPECIFIED
;
792 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
793 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
794 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
796 qemu_mutex_lock_iothread();
798 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
799 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
800 !!(run
->s
.regs
.device_irq_level
&
801 KVM_ARM_DEV_EL1_VTIMER
));
802 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
805 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
806 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
807 !!(run
->s
.regs
.device_irq_level
&
808 KVM_ARM_DEV_EL1_PTIMER
));
809 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
812 if (switched_level
& KVM_ARM_DEV_PMU
) {
813 qemu_set_irq(cpu
->pmu_interrupt
,
814 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
815 switched_level
&= ~KVM_ARM_DEV_PMU
;
818 if (switched_level
) {
819 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
820 __func__
, switched_level
);
823 /* We also mark unknown levels as processed to not waste cycles */
824 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
825 qemu_mutex_unlock_iothread();
828 return MEMTXATTRS_UNSPECIFIED
;
831 void kvm_arm_vm_state_change(void *opaque
, int running
, RunState state
)
833 CPUState
*cs
= opaque
;
834 ARMCPU
*cpu
= ARM_CPU(cs
);
837 if (cpu
->kvm_adjvtime
) {
838 kvm_arm_put_virtual_time(cs
);
841 if (cpu
->kvm_adjvtime
) {
842 kvm_arm_get_virtual_time(cs
);
848 * kvm_arm_handle_dabt_nisv:
850 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
851 * ISV bit set to '0b0' -> no valid instruction syndrome
852 * @fault_ipa: faulting address for the synchronous data abort
854 * Returns: 0 if the exception has been handled, < 0 otherwise
856 static int kvm_arm_handle_dabt_nisv(CPUState
*cs
, uint64_t esr_iss
,
859 ARMCPU
*cpu
= ARM_CPU(cs
);
860 CPUARMState
*env
= &cpu
->env
;
862 * Request KVM to inject the external data abort into the guest
864 if (cap_has_inject_ext_dabt
) {
865 struct kvm_vcpu_events events
= { };
867 * The external data abort event will be handled immediately by KVM
868 * using the address fault that triggered the exit on given VCPU.
869 * Requesting injection of the external data abort does not rely
870 * on any other VCPU state. Therefore, in this particular case, the VCPU
871 * synchronization can be exceptionally skipped.
873 events
.exception
.ext_dabt_pending
= 1;
874 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
875 if (!kvm_vcpu_ioctl(cs
, KVM_SET_VCPU_EVENTS
, &events
)) {
876 env
->ext_dabt_raised
= 1;
880 error_report("Data abort exception triggered by guest memory access "
881 "at physical address: 0x" TARGET_FMT_lx
,
882 (target_ulong
)fault_ipa
);
883 error_printf("KVM unable to emulate faulting instruction.\n");
888 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
892 switch (run
->exit_reason
) {
894 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
896 } /* otherwise return to guest */
898 case KVM_EXIT_ARM_NISV
:
899 /* External DABT with no valid iss to decode */
900 ret
= kvm_arm_handle_dabt_nisv(cs
, run
->arm_nisv
.esr_iss
,
901 run
->arm_nisv
.fault_ipa
);
904 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
905 __func__
, run
->exit_reason
);
911 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
916 int kvm_arch_process_async_events(CPUState
*cs
)
921 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
923 if (kvm_sw_breakpoints_active(cs
)) {
924 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
926 if (kvm_arm_hw_debug_active(cs
)) {
927 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
928 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
932 void kvm_arch_init_irq_routing(KVMState
*s
)
936 int kvm_arch_irqchip_create(KVMState
*s
)
938 if (kvm_kernel_irqchip_split()) {
939 perror("-machine kernel_irqchip=split is not supported on ARM.");
943 /* If we can create the VGIC using the newer device control API, we
944 * let the device do this when it initializes itself, otherwise we
945 * fall back to the old API */
946 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
949 int kvm_arm_vgic_probe(void)
953 if (kvm_create_device(kvm_state
,
954 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
955 val
|= KVM_ARM_VGIC_V3
;
957 if (kvm_create_device(kvm_state
,
958 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
959 val
|= KVM_ARM_VGIC_V2
;
964 int kvm_arm_set_irq(int cpu
, int irqtype
, int irq
, int level
)
966 int kvm_irq
= (irqtype
<< KVM_ARM_IRQ_TYPE_SHIFT
) | irq
;
967 int cpu_idx1
= cpu
% 256;
968 int cpu_idx2
= cpu
/ 256;
970 kvm_irq
|= (cpu_idx1
<< KVM_ARM_IRQ_VCPU_SHIFT
) |
971 (cpu_idx2
<< KVM_ARM_IRQ_VCPU2_SHIFT
);
973 return kvm_set_irq(kvm_state
, kvm_irq
, !!level
);
976 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
977 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
979 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
980 hwaddr xlat
, len
, doorbell_gpa
;
981 MemoryRegionSection mrs
;
985 if (as
== &address_space_memory
) {
989 /* MSI doorbell address is translated by an IOMMU */
992 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
993 MEMTXATTRS_UNSPECIFIED
);
997 mrs
= memory_region_find(mr
, xlat
, 1);
1002 doorbell_gpa
= mrs
.offset_within_address_space
;
1003 memory_region_unref(mrs
.mr
);
1005 route
->u
.msi
.address_lo
= doorbell_gpa
;
1006 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
1008 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
1017 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
1018 int vector
, PCIDevice
*dev
)
1023 int kvm_arch_release_virq_post(int virq
)
1028 int kvm_arch_msi_data_to_gsi(uint32_t data
)
1030 return (data
- 32) & 0xffff;