hw/riscv: microchip_pfsoc: Connect the IOSCB module
[qemu/ar7.git] / include / hw / dma / xlnx_dpdma.h
blob40537a848b433517a64dea6bc1e23f82025e338a
1 /*
2 * xlnx_dpdma.h
4 * Copyright (C) 2015 : GreenSocs Ltd
5 * http://www.greensocs.com/ , email: info@greensocs.com
7 * Developed by :
8 * Frederic Konrad <fred.konrad@greensocs.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation, either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, see <http://www.gnu.org/licenses/>.
25 #ifndef XLNX_DPDMA_H
26 #define XLNX_DPDMA_H
28 #include "hw/sysbus.h"
29 #include "ui/console.h"
30 #include "sysemu/dma.h"
31 #include "qom/object.h"
33 #define XLNX_DPDMA_REG_ARRAY_SIZE (0x1000 >> 2)
35 struct XlnxDPDMAState {
36 /*< private >*/
37 SysBusDevice parent_obj;
38 /*< public >*/
39 MemoryRegion iomem;
40 uint32_t registers[XLNX_DPDMA_REG_ARRAY_SIZE];
41 uint8_t *data[6];
42 bool operation_finished[6];
43 qemu_irq irq;
47 #define TYPE_XLNX_DPDMA "xlnx.dpdma"
48 OBJECT_DECLARE_SIMPLE_TYPE(XlnxDPDMAState, XLNX_DPDMA)
51 * xlnx_dpdma_start_operation: Start the operation on the specified channel. The
52 * DPDMA gets the current descriptor and retrieves
53 * data to the buffer specified by
54 * dpdma_set_host_data_location().
56 * Returns The number of bytes transferred by the DPDMA
57 * or 0 if an error occurred.
59 * @s The DPDMA state.
60 * @channel The channel to start.
62 size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
63 bool one_desc);
66 * xlnx_dpdma_set_host_data_location: Set the location in the host memory where
67 * to store the data out from the dma
68 * channel.
70 * @s The DPDMA state.
71 * @channel The channel associated to the pointer.
72 * @p The buffer where to store the data.
74 /* XXX: add a maximum size arg and send an interrupt in case of overflow. */
75 void xlnx_dpdma_set_host_data_location(XlnxDPDMAState *s, uint8_t channel,
76 void *p);
79 * xlnx_dpdma_trigger_vsync_irq: Trigger a VSYNC IRQ when the display is
80 * updated.
82 * @s The DPDMA state.
84 void xlnx_dpdma_trigger_vsync_irq(XlnxDPDMAState *s);
86 #endif /* XLNX_DPDMA_H */