target-ppc: Drop cpu_ppc_close()
[qemu/ar7.git] / target-cris / op_helper.c
blobb92c106e10cfc5d80a1ff3b7ad0bb29c70d97ca4
1 /*
2 * CRIS helper routines
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "cpu.h"
22 #include "dyngen-exec.h"
23 #include "mmu.h"
24 #include "helper.h"
25 #include "host-utils.h"
27 //#define CRIS_OP_HELPER_DEBUG
30 #ifdef CRIS_OP_HELPER_DEBUG
31 #define D(x) x
32 #define D_LOG(...) qemu_log(__VA__ARGS__)
33 #else
34 #define D(x)
35 #define D_LOG(...) do { } while (0)
36 #endif
38 #if !defined(CONFIG_USER_ONLY)
39 #include "softmmu_exec.h"
41 #define MMUSUFFIX _mmu
43 #define SHIFT 0
44 #include "softmmu_template.h"
46 #define SHIFT 1
47 #include "softmmu_template.h"
49 #define SHIFT 2
50 #include "softmmu_template.h"
52 #define SHIFT 3
53 #include "softmmu_template.h"
55 /* Try to fill the TLB and return an exception if error. If retaddr is
56 NULL, it means that the function was called in C code (i.e. not
57 from generated code or from helper.c) */
58 /* XXX: fix it to restore all registers */
59 void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx,
60 uintptr_t retaddr)
62 TranslationBlock *tb;
63 CPUCRISState *saved_env;
64 int ret;
66 saved_env = env;
67 env = env1;
69 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
70 env->pc, env->debug1, (void *)retaddr);
71 ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx);
72 if (unlikely(ret)) {
73 if (retaddr) {
74 /* now we have a real cpu fault */
75 tb = tb_find_pc(retaddr);
76 if (tb) {
77 /* the PC is inside the translated code. It means that we have
78 a virtual CPU fault */
79 cpu_restore_state(tb, env, retaddr);
81 /* Evaluate flags after retranslation. */
82 helper_top_evaluate_flags();
85 cpu_loop_exit(env);
87 env = saved_env;
90 #endif
92 void helper_raise_exception(uint32_t index)
94 env->exception_index = index;
95 cpu_loop_exit(env);
98 void helper_tlb_flush_pid(uint32_t pid)
100 #if !defined(CONFIG_USER_ONLY)
101 pid &= 0xff;
102 if (pid != (env->pregs[PR_PID] & 0xff))
103 cris_mmu_flush_pid(env, env->pregs[PR_PID]);
104 #endif
107 void helper_spc_write(uint32_t new_spc)
109 #if !defined(CONFIG_USER_ONLY)
110 tlb_flush_page(env, env->pregs[PR_SPC]);
111 tlb_flush_page(env, new_spc);
112 #endif
115 void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
117 qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
120 /* Used by the tlb decoder. */
121 #define EXTRACT_FIELD(src, start, end) \
122 (((src) >> start) & ((1 << (end - start + 1)) - 1))
124 void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
126 uint32_t srs;
127 srs = env->pregs[PR_SRS];
128 srs &= 3;
129 env->sregs[srs][sreg] = env->regs[reg];
131 #if !defined(CONFIG_USER_ONLY)
132 if (srs == 1 || srs == 2) {
133 if (sreg == 6) {
134 /* Writes to tlb-hi write to mm_cause as a side
135 effect. */
136 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
137 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
139 else if (sreg == 5) {
140 uint32_t set;
141 uint32_t idx;
142 uint32_t lo, hi;
143 uint32_t vaddr;
144 int tlb_v;
146 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
147 set >>= 4;
148 set &= 3;
150 idx &= 15;
151 /* We've just made a write to tlb_lo. */
152 lo = env->sregs[SFR_RW_MM_TLB_LO];
153 /* Writes are done via r_mm_cause. */
154 hi = env->sregs[SFR_R_MM_CAUSE];
156 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
157 13, 31);
158 vaddr <<= TARGET_PAGE_BITS;
159 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
160 3, 3);
161 env->tlbsets[srs - 1][set][idx].lo = lo;
162 env->tlbsets[srs - 1][set][idx].hi = hi;
164 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
165 vaddr, tlb_v, env->pc);
166 if (tlb_v) {
167 tlb_flush_page(env, vaddr);
171 #endif
174 void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
176 uint32_t srs;
177 env->pregs[PR_SRS] &= 3;
178 srs = env->pregs[PR_SRS];
180 #if !defined(CONFIG_USER_ONLY)
181 if (srs == 1 || srs == 2)
183 uint32_t set;
184 uint32_t idx;
185 uint32_t lo, hi;
187 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
188 set >>= 4;
189 set &= 3;
190 idx &= 15;
192 /* Update the mirror regs. */
193 hi = env->tlbsets[srs - 1][set][idx].hi;
194 lo = env->tlbsets[srs - 1][set][idx].lo;
195 env->sregs[SFR_RW_MM_TLB_HI] = hi;
196 env->sregs[SFR_RW_MM_TLB_LO] = lo;
198 #endif
199 env->regs[reg] = env->sregs[srs][sreg];
202 static void cris_ccs_rshift(CPUCRISState *env)
204 uint32_t ccs;
206 /* Apply the ccs shift. */
207 ccs = env->pregs[PR_CCS];
208 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
209 if (ccs & U_FLAG)
211 /* Enter user mode. */
212 env->ksp = env->regs[R_SP];
213 env->regs[R_SP] = env->pregs[PR_USP];
216 env->pregs[PR_CCS] = ccs;
219 void helper_rfe(void)
221 int rflag = env->pregs[PR_CCS] & R_FLAG;
223 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
224 env->pregs[PR_ERP], env->pregs[PR_PID],
225 env->pregs[PR_CCS],
226 env->btarget);
228 cris_ccs_rshift(env);
230 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
231 if (!rflag)
232 env->pregs[PR_CCS] |= P_FLAG;
235 void helper_rfn(void)
237 int rflag = env->pregs[PR_CCS] & R_FLAG;
239 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
240 env->pregs[PR_ERP], env->pregs[PR_PID],
241 env->pregs[PR_CCS],
242 env->btarget);
244 cris_ccs_rshift(env);
246 /* Set the P_FLAG only if the R_FLAG is not set. */
247 if (!rflag)
248 env->pregs[PR_CCS] |= P_FLAG;
250 /* Always set the M flag. */
251 env->pregs[PR_CCS] |= M_FLAG;
254 uint32_t helper_lz(uint32_t t0)
256 return clz32(t0);
259 uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs)
261 /* FIXME: clean this up. */
263 /* des ref:
264 The N flag is set according to the selected bit in the dest reg.
265 The Z flag is set if the selected bit and all bits to the right are
266 zero.
267 The X flag is cleared.
268 Other flags are left untouched.
269 The destination reg is not affected.*/
270 unsigned int fz, sbit, bset, mask, masked_t0;
272 sbit = t1 & 31;
273 bset = !!(t0 & (1 << sbit));
274 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
275 masked_t0 = t0 & mask;
276 fz = !(masked_t0 | bset);
278 /* Clear the X, N and Z flags. */
279 ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
280 if (env->pregs[PR_VR] < 32)
281 ccs &= ~(V_FLAG | C_FLAG);
282 /* Set the N and Z flags accordingly. */
283 ccs |= (bset << 3) | (fz << 2);
284 return ccs;
287 static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs)
289 unsigned int x, z, mask;
291 /* Extended arithmetics, leave the z flag alone. */
292 x = env->cc_x;
293 mask = env->cc_mask | X_FLAG;
294 if (x) {
295 z = flags & Z_FLAG;
296 mask = mask & ~z;
298 flags &= mask;
300 /* all insn clear the x-flag except setf or clrf. */
301 ccs &= ~mask;
302 ccs |= flags;
303 return ccs;
306 uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof)
308 uint32_t flags = 0;
309 int64_t tmp;
310 int dneg;
312 dneg = ((int32_t)res) < 0;
314 tmp = mof;
315 tmp <<= 32;
316 tmp |= res;
317 if (tmp == 0)
318 flags |= Z_FLAG;
319 else if (tmp < 0)
320 flags |= N_FLAG;
321 if ((dneg && mof != -1)
322 || (!dneg && mof != 0))
323 flags |= V_FLAG;
324 return evaluate_flags_writeback(flags, ccs);
327 uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof)
329 uint32_t flags = 0;
330 uint64_t tmp;
332 tmp = mof;
333 tmp <<= 32;
334 tmp |= res;
335 if (tmp == 0)
336 flags |= Z_FLAG;
337 else if (tmp >> 63)
338 flags |= N_FLAG;
339 if (mof)
340 flags |= V_FLAG;
342 return evaluate_flags_writeback(flags, ccs);
345 uint32_t helper_evaluate_flags_mcp(uint32_t ccs,
346 uint32_t src, uint32_t dst, uint32_t res)
348 uint32_t flags = 0;
350 src = src & 0x80000000;
351 dst = dst & 0x80000000;
353 if ((res & 0x80000000L) != 0L)
355 flags |= N_FLAG;
356 if (!src && !dst)
357 flags |= V_FLAG;
358 else if (src & dst)
359 flags |= R_FLAG;
361 else
363 if (res == 0L)
364 flags |= Z_FLAG;
365 if (src & dst)
366 flags |= V_FLAG;
367 if (dst | src)
368 flags |= R_FLAG;
371 return evaluate_flags_writeback(flags, ccs);
374 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs,
375 uint32_t src, uint32_t dst, uint32_t res)
377 uint32_t flags = 0;
379 src = src & 0x80000000;
380 dst = dst & 0x80000000;
382 if ((res & 0x80000000L) != 0L)
384 flags |= N_FLAG;
385 if (!src && !dst)
386 flags |= V_FLAG;
387 else if (src & dst)
388 flags |= C_FLAG;
390 else
392 if (res == 0L)
393 flags |= Z_FLAG;
394 if (src & dst)
395 flags |= V_FLAG;
396 if (dst | src)
397 flags |= C_FLAG;
400 return evaluate_flags_writeback(flags, ccs);
403 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs,
404 uint32_t src, uint32_t dst, uint32_t res)
406 uint32_t flags = 0;
408 src = (~src) & 0x80000000;
409 dst = dst & 0x80000000;
411 if ((res & 0x80000000L) != 0L)
413 flags |= N_FLAG;
414 if (!src && !dst)
415 flags |= V_FLAG;
416 else if (src & dst)
417 flags |= C_FLAG;
419 else
421 if (res == 0L)
422 flags |= Z_FLAG;
423 if (src & dst)
424 flags |= V_FLAG;
425 if (dst | src)
426 flags |= C_FLAG;
429 flags ^= C_FLAG;
430 return evaluate_flags_writeback(flags, ccs);
433 uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res)
435 uint32_t flags = 0;
437 if ((int32_t)res < 0)
438 flags |= N_FLAG;
439 else if (res == 0L)
440 flags |= Z_FLAG;
442 return evaluate_flags_writeback(flags, ccs);
444 uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res)
446 uint32_t flags = 0;
448 if ((int16_t)res < 0L)
449 flags |= N_FLAG;
450 else if (res == 0)
451 flags |= Z_FLAG;
453 return evaluate_flags_writeback(flags, ccs);
456 /* TODO: This is expensive. We could split things up and only evaluate part of
457 CCR on a need to know basis. For now, we simply re-evaluate everything. */
458 void helper_evaluate_flags(void)
460 uint32_t src, dst, res;
461 uint32_t flags = 0;
463 src = env->cc_src;
464 dst = env->cc_dest;
465 res = env->cc_result;
467 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
468 src = ~src;
470 /* Now, evaluate the flags. This stuff is based on
471 Per Zander's CRISv10 simulator. */
472 switch (env->cc_size)
474 case 1:
475 if ((res & 0x80L) != 0L)
477 flags |= N_FLAG;
478 if (((src & 0x80L) == 0L)
479 && ((dst & 0x80L) == 0L))
481 flags |= V_FLAG;
483 else if (((src & 0x80L) != 0L)
484 && ((dst & 0x80L) != 0L))
486 flags |= C_FLAG;
489 else
491 if ((res & 0xFFL) == 0L)
493 flags |= Z_FLAG;
495 if (((src & 0x80L) != 0L)
496 && ((dst & 0x80L) != 0L))
498 flags |= V_FLAG;
500 if ((dst & 0x80L) != 0L
501 || (src & 0x80L) != 0L)
503 flags |= C_FLAG;
506 break;
507 case 2:
508 if ((res & 0x8000L) != 0L)
510 flags |= N_FLAG;
511 if (((src & 0x8000L) == 0L)
512 && ((dst & 0x8000L) == 0L))
514 flags |= V_FLAG;
516 else if (((src & 0x8000L) != 0L)
517 && ((dst & 0x8000L) != 0L))
519 flags |= C_FLAG;
522 else
524 if ((res & 0xFFFFL) == 0L)
526 flags |= Z_FLAG;
528 if (((src & 0x8000L) != 0L)
529 && ((dst & 0x8000L) != 0L))
531 flags |= V_FLAG;
533 if ((dst & 0x8000L) != 0L
534 || (src & 0x8000L) != 0L)
536 flags |= C_FLAG;
539 break;
540 case 4:
541 if ((res & 0x80000000L) != 0L)
543 flags |= N_FLAG;
544 if (((src & 0x80000000L) == 0L)
545 && ((dst & 0x80000000L) == 0L))
547 flags |= V_FLAG;
549 else if (((src & 0x80000000L) != 0L) &&
550 ((dst & 0x80000000L) != 0L))
552 flags |= C_FLAG;
555 else
557 if (res == 0L)
558 flags |= Z_FLAG;
559 if (((src & 0x80000000L) != 0L)
560 && ((dst & 0x80000000L) != 0L))
561 flags |= V_FLAG;
562 if ((dst & 0x80000000L) != 0L
563 || (src & 0x80000000L) != 0L)
564 flags |= C_FLAG;
566 break;
567 default:
568 break;
571 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
572 flags ^= C_FLAG;
574 env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]);
577 void helper_top_evaluate_flags(void)
579 switch (env->cc_op)
581 case CC_OP_MCP:
582 env->pregs[PR_CCS] = helper_evaluate_flags_mcp(
583 env->pregs[PR_CCS], env->cc_src,
584 env->cc_dest, env->cc_result);
585 break;
586 case CC_OP_MULS:
587 env->pregs[PR_CCS] = helper_evaluate_flags_muls(
588 env->pregs[PR_CCS], env->cc_result,
589 env->pregs[PR_MOF]);
590 break;
591 case CC_OP_MULU:
592 env->pregs[PR_CCS] = helper_evaluate_flags_mulu(
593 env->pregs[PR_CCS], env->cc_result,
594 env->pregs[PR_MOF]);
595 break;
596 case CC_OP_MOVE:
597 case CC_OP_AND:
598 case CC_OP_OR:
599 case CC_OP_XOR:
600 case CC_OP_ASR:
601 case CC_OP_LSR:
602 case CC_OP_LSL:
603 switch (env->cc_size)
605 case 4:
606 env->pregs[PR_CCS] =
607 helper_evaluate_flags_move_4(
608 env->pregs[PR_CCS],
609 env->cc_result);
610 break;
611 case 2:
612 env->pregs[PR_CCS] =
613 helper_evaluate_flags_move_2(
614 env->pregs[PR_CCS],
615 env->cc_result);
616 break;
617 default:
618 helper_evaluate_flags();
619 break;
621 break;
622 case CC_OP_FLAGS:
623 /* live. */
624 break;
625 case CC_OP_SUB:
626 case CC_OP_CMP:
627 if (env->cc_size == 4)
628 env->pregs[PR_CCS] =
629 helper_evaluate_flags_sub_4(
630 env->pregs[PR_CCS],
631 env->cc_src, env->cc_dest,
632 env->cc_result);
633 else
634 helper_evaluate_flags();
635 break;
636 default:
638 switch (env->cc_size)
640 case 4:
641 env->pregs[PR_CCS] =
642 helper_evaluate_flags_alu_4(
643 env->pregs[PR_CCS],
644 env->cc_src, env->cc_dest,
645 env->cc_result);
646 break;
647 default:
648 helper_evaluate_flags();
649 break;
652 break;