4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "dyngen-exec.h"
25 #include "host-utils.h"
27 //#define CRIS_OP_HELPER_DEBUG
30 #ifdef CRIS_OP_HELPER_DEBUG
32 #define D_LOG(...) qemu_log(__VA__ARGS__)
35 #define D_LOG(...) do { } while (0)
38 #if !defined(CONFIG_USER_ONLY)
39 #include "softmmu_exec.h"
41 #define MMUSUFFIX _mmu
44 #include "softmmu_template.h"
47 #include "softmmu_template.h"
50 #include "softmmu_template.h"
53 #include "softmmu_template.h"
55 /* Try to fill the TLB and return an exception if error. If retaddr is
56 NULL, it means that the function was called in C code (i.e. not
57 from generated code or from helper.c) */
58 /* XXX: fix it to restore all registers */
59 void tlb_fill(CPUCRISState
*env1
, target_ulong addr
, int is_write
, int mmu_idx
,
63 CPUCRISState
*saved_env
;
69 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__
,
70 env
->pc
, env
->debug1
, (void *)retaddr
);
71 ret
= cpu_cris_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
);
74 /* now we have a real cpu fault */
75 tb
= tb_find_pc(retaddr
);
77 /* the PC is inside the translated code. It means that we have
78 a virtual CPU fault */
79 cpu_restore_state(tb
, env
, retaddr
);
81 /* Evaluate flags after retranslation. */
82 helper_top_evaluate_flags();
92 void helper_raise_exception(uint32_t index
)
94 env
->exception_index
= index
;
98 void helper_tlb_flush_pid(uint32_t pid
)
100 #if !defined(CONFIG_USER_ONLY)
102 if (pid
!= (env
->pregs
[PR_PID
] & 0xff))
103 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
107 void helper_spc_write(uint32_t new_spc
)
109 #if !defined(CONFIG_USER_ONLY)
110 tlb_flush_page(env
, env
->pregs
[PR_SPC
]);
111 tlb_flush_page(env
, new_spc
);
115 void helper_dump(uint32_t a0
, uint32_t a1
, uint32_t a2
)
117 qemu_log("%s: a0=%x a1=%x\n", __func__
, a0
, a1
);
120 /* Used by the tlb decoder. */
121 #define EXTRACT_FIELD(src, start, end) \
122 (((src) >> start) & ((1 << (end - start + 1)) - 1))
124 void helper_movl_sreg_reg (uint32_t sreg
, uint32_t reg
)
127 srs
= env
->pregs
[PR_SRS
];
129 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
131 #if !defined(CONFIG_USER_ONLY)
132 if (srs
== 1 || srs
== 2) {
134 /* Writes to tlb-hi write to mm_cause as a side
136 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
137 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
139 else if (sreg
== 5) {
146 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
151 /* We've just made a write to tlb_lo. */
152 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
153 /* Writes are done via r_mm_cause. */
154 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
156 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].hi
,
158 vaddr
<<= TARGET_PAGE_BITS
;
159 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].lo
,
161 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
162 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
164 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
165 vaddr
, tlb_v
, env
->pc
);
167 tlb_flush_page(env
, vaddr
);
174 void helper_movl_reg_sreg (uint32_t reg
, uint32_t sreg
)
177 env
->pregs
[PR_SRS
] &= 3;
178 srs
= env
->pregs
[PR_SRS
];
180 #if !defined(CONFIG_USER_ONLY)
181 if (srs
== 1 || srs
== 2)
187 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
192 /* Update the mirror regs. */
193 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
194 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
195 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
196 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
199 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
202 static void cris_ccs_rshift(CPUCRISState
*env
)
206 /* Apply the ccs shift. */
207 ccs
= env
->pregs
[PR_CCS
];
208 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
211 /* Enter user mode. */
212 env
->ksp
= env
->regs
[R_SP
];
213 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
216 env
->pregs
[PR_CCS
] = ccs
;
219 void helper_rfe(void)
221 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
223 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
224 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
228 cris_ccs_rshift(env
);
230 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
232 env
->pregs
[PR_CCS
] |= P_FLAG
;
235 void helper_rfn(void)
237 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
239 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
240 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
244 cris_ccs_rshift(env
);
246 /* Set the P_FLAG only if the R_FLAG is not set. */
248 env
->pregs
[PR_CCS
] |= P_FLAG
;
250 /* Always set the M flag. */
251 env
->pregs
[PR_CCS
] |= M_FLAG
;
254 uint32_t helper_lz(uint32_t t0
)
259 uint32_t helper_btst(uint32_t t0
, uint32_t t1
, uint32_t ccs
)
261 /* FIXME: clean this up. */
264 The N flag is set according to the selected bit in the dest reg.
265 The Z flag is set if the selected bit and all bits to the right are
267 The X flag is cleared.
268 Other flags are left untouched.
269 The destination reg is not affected.*/
270 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
273 bset
= !!(t0
& (1 << sbit
));
274 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
275 masked_t0
= t0
& mask
;
276 fz
= !(masked_t0
| bset
);
278 /* Clear the X, N and Z flags. */
279 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
280 if (env
->pregs
[PR_VR
] < 32)
281 ccs
&= ~(V_FLAG
| C_FLAG
);
282 /* Set the N and Z flags accordingly. */
283 ccs
|= (bset
<< 3) | (fz
<< 2);
287 static inline uint32_t evaluate_flags_writeback(uint32_t flags
, uint32_t ccs
)
289 unsigned int x
, z
, mask
;
291 /* Extended arithmetics, leave the z flag alone. */
293 mask
= env
->cc_mask
| X_FLAG
;
300 /* all insn clear the x-flag except setf or clrf. */
306 uint32_t helper_evaluate_flags_muls(uint32_t ccs
, uint32_t res
, uint32_t mof
)
312 dneg
= ((int32_t)res
) < 0;
321 if ((dneg
&& mof
!= -1)
322 || (!dneg
&& mof
!= 0))
324 return evaluate_flags_writeback(flags
, ccs
);
327 uint32_t helper_evaluate_flags_mulu(uint32_t ccs
, uint32_t res
, uint32_t mof
)
342 return evaluate_flags_writeback(flags
, ccs
);
345 uint32_t helper_evaluate_flags_mcp(uint32_t ccs
,
346 uint32_t src
, uint32_t dst
, uint32_t res
)
350 src
= src
& 0x80000000;
351 dst
= dst
& 0x80000000;
353 if ((res
& 0x80000000L
) != 0L)
371 return evaluate_flags_writeback(flags
, ccs
);
374 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs
,
375 uint32_t src
, uint32_t dst
, uint32_t res
)
379 src
= src
& 0x80000000;
380 dst
= dst
& 0x80000000;
382 if ((res
& 0x80000000L
) != 0L)
400 return evaluate_flags_writeback(flags
, ccs
);
403 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs
,
404 uint32_t src
, uint32_t dst
, uint32_t res
)
408 src
= (~src
) & 0x80000000;
409 dst
= dst
& 0x80000000;
411 if ((res
& 0x80000000L
) != 0L)
430 return evaluate_flags_writeback(flags
, ccs
);
433 uint32_t helper_evaluate_flags_move_4(uint32_t ccs
, uint32_t res
)
437 if ((int32_t)res
< 0)
442 return evaluate_flags_writeback(flags
, ccs
);
444 uint32_t helper_evaluate_flags_move_2(uint32_t ccs
, uint32_t res
)
448 if ((int16_t)res
< 0L)
453 return evaluate_flags_writeback(flags
, ccs
);
456 /* TODO: This is expensive. We could split things up and only evaluate part of
457 CCR on a need to know basis. For now, we simply re-evaluate everything. */
458 void helper_evaluate_flags(void)
460 uint32_t src
, dst
, res
;
465 res
= env
->cc_result
;
467 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
470 /* Now, evaluate the flags. This stuff is based on
471 Per Zander's CRISv10 simulator. */
472 switch (env
->cc_size
)
475 if ((res
& 0x80L
) != 0L)
478 if (((src
& 0x80L
) == 0L)
479 && ((dst
& 0x80L
) == 0L))
483 else if (((src
& 0x80L
) != 0L)
484 && ((dst
& 0x80L
) != 0L))
491 if ((res
& 0xFFL
) == 0L)
495 if (((src
& 0x80L
) != 0L)
496 && ((dst
& 0x80L
) != 0L))
500 if ((dst
& 0x80L
) != 0L
501 || (src
& 0x80L
) != 0L)
508 if ((res
& 0x8000L
) != 0L)
511 if (((src
& 0x8000L
) == 0L)
512 && ((dst
& 0x8000L
) == 0L))
516 else if (((src
& 0x8000L
) != 0L)
517 && ((dst
& 0x8000L
) != 0L))
524 if ((res
& 0xFFFFL
) == 0L)
528 if (((src
& 0x8000L
) != 0L)
529 && ((dst
& 0x8000L
) != 0L))
533 if ((dst
& 0x8000L
) != 0L
534 || (src
& 0x8000L
) != 0L)
541 if ((res
& 0x80000000L
) != 0L)
544 if (((src
& 0x80000000L
) == 0L)
545 && ((dst
& 0x80000000L
) == 0L))
549 else if (((src
& 0x80000000L
) != 0L) &&
550 ((dst
& 0x80000000L
) != 0L))
559 if (((src
& 0x80000000L
) != 0L)
560 && ((dst
& 0x80000000L
) != 0L))
562 if ((dst
& 0x80000000L
) != 0L
563 || (src
& 0x80000000L
) != 0L)
571 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
574 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(flags
, env
->pregs
[PR_CCS
]);
577 void helper_top_evaluate_flags(void)
582 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mcp(
583 env
->pregs
[PR_CCS
], env
->cc_src
,
584 env
->cc_dest
, env
->cc_result
);
587 env
->pregs
[PR_CCS
] = helper_evaluate_flags_muls(
588 env
->pregs
[PR_CCS
], env
->cc_result
,
592 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mulu(
593 env
->pregs
[PR_CCS
], env
->cc_result
,
603 switch (env
->cc_size
)
607 helper_evaluate_flags_move_4(
613 helper_evaluate_flags_move_2(
618 helper_evaluate_flags();
627 if (env
->cc_size
== 4)
629 helper_evaluate_flags_sub_4(
631 env
->cc_src
, env
->cc_dest
,
634 helper_evaluate_flags();
638 switch (env
->cc_size
)
642 helper_evaluate_flags_alu_4(
644 env
->cc_src
, env
->cc_dest
,
648 helper_evaluate_flags();