backends/baum.c: Fix compilation when SDL is not available.
[qemu/ar7.git] / hw / ide / microdrive.c
blob21d6495817f1d410f8d0d15c44e84d1ca6ad2c4e
1 /*
2 * QEMU IDE Emulation: microdrive (CF / PCMCIA)
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include <hw/hw.h>
26 #include <hw/i386/pc.h>
27 #include <hw/pcmcia.h>
28 #include "block/block.h"
29 #include "sysemu/dma.h"
31 #include <hw/ide/internal.h>
33 #define TYPE_MICRODRIVE "microdrive"
34 #define MICRODRIVE(obj) OBJECT_CHECK(MicroDriveState, (obj), TYPE_MICRODRIVE)
36 /***********************************************************/
37 /* CF-ATA Microdrive */
39 #define METADATA_SIZE 0x20
41 /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface. */
43 typedef struct MicroDriveState {
44 /*< private >*/
45 PCMCIACardState parent_obj;
46 /*< public >*/
48 IDEBus bus;
49 uint32_t attr_base;
50 uint32_t io_base;
52 /* Card state */
53 uint8_t opt;
54 uint8_t stat;
55 uint8_t pins;
57 uint8_t ctrl;
58 uint16_t io;
59 uint8_t cycle;
60 } MicroDriveState;
62 /* Register bitfields */
63 enum md_opt {
64 OPT_MODE_MMAP = 0,
65 OPT_MODE_IOMAP16 = 1,
66 OPT_MODE_IOMAP1 = 2,
67 OPT_MODE_IOMAP2 = 3,
68 OPT_MODE = 0x3f,
69 OPT_LEVIREQ = 0x40,
70 OPT_SRESET = 0x80,
72 enum md_cstat {
73 STAT_INT = 0x02,
74 STAT_PWRDWN = 0x04,
75 STAT_XE = 0x10,
76 STAT_IOIS8 = 0x20,
77 STAT_SIGCHG = 0x40,
78 STAT_CHANGED = 0x80,
80 enum md_pins {
81 PINS_MRDY = 0x02,
82 PINS_CRDY = 0x20,
84 enum md_ctrl {
85 CTRL_IEN = 0x02,
86 CTRL_SRST = 0x04,
89 static inline void md_interrupt_update(MicroDriveState *s)
91 PCMCIACardState *card = PCMCIA_CARD(s);
93 if (card->slot == NULL) {
94 return;
97 qemu_set_irq(card->slot->irq,
98 !(s->stat & STAT_INT) && /* Inverted */
99 !(s->ctrl & (CTRL_IEN | CTRL_SRST)) &&
100 !(s->opt & OPT_SRESET));
103 static void md_set_irq(void *opaque, int irq, int level)
105 MicroDriveState *s = opaque;
107 if (level) {
108 s->stat |= STAT_INT;
109 } else {
110 s->stat &= ~STAT_INT;
113 md_interrupt_update(s);
116 static void md_reset(DeviceState *dev)
118 MicroDriveState *s = MICRODRIVE(dev);
120 s->opt = OPT_MODE_MMAP;
121 s->stat = 0;
122 s->pins = 0;
123 s->cycle = 0;
124 s->ctrl = 0;
125 ide_bus_reset(&s->bus);
128 static uint8_t md_attr_read(PCMCIACardState *card, uint32_t at)
130 MicroDriveState *s = MICRODRIVE(card);
131 PCMCIACardClass *pcc = PCMCIA_CARD_GET_CLASS(card);
133 if (at < s->attr_base) {
134 if (at < pcc->cis_len) {
135 return pcc->cis[at];
136 } else {
137 return 0x00;
141 at -= s->attr_base;
143 switch (at) {
144 case 0x00: /* Configuration Option Register */
145 return s->opt;
146 case 0x02: /* Card Configuration Status Register */
147 if (s->ctrl & CTRL_IEN) {
148 return s->stat & ~STAT_INT;
149 } else {
150 return s->stat;
152 case 0x04: /* Pin Replacement Register */
153 return (s->pins & PINS_CRDY) | 0x0c;
154 case 0x06: /* Socket and Copy Register */
155 return 0x00;
156 #ifdef VERBOSE
157 default:
158 printf("%s: Bad attribute space register %02x\n", __FUNCTION__, at);
159 #endif
162 return 0;
165 static void md_attr_write(PCMCIACardState *card, uint32_t at, uint8_t value)
167 MicroDriveState *s = MICRODRIVE(card);
169 at -= s->attr_base;
171 switch (at) {
172 case 0x00: /* Configuration Option Register */
173 s->opt = value & 0xcf;
174 if (value & OPT_SRESET) {
175 device_reset(DEVICE(s));
177 md_interrupt_update(s);
178 break;
179 case 0x02: /* Card Configuration Status Register */
180 if ((s->stat ^ value) & STAT_PWRDWN) {
181 s->pins |= PINS_CRDY;
183 s->stat &= 0x82;
184 s->stat |= value & 0x74;
185 md_interrupt_update(s);
186 /* Word 170 in Identify Device must be equal to STAT_XE */
187 break;
188 case 0x04: /* Pin Replacement Register */
189 s->pins &= PINS_CRDY;
190 s->pins |= value & PINS_MRDY;
191 break;
192 case 0x06: /* Socket and Copy Register */
193 break;
194 default:
195 printf("%s: Bad attribute space register %02x\n", __FUNCTION__, at);
199 static uint16_t md_common_read(PCMCIACardState *card, uint32_t at)
201 MicroDriveState *s = MICRODRIVE(card);
202 IDEState *ifs;
203 uint16_t ret;
204 at -= s->io_base;
206 switch (s->opt & OPT_MODE) {
207 case OPT_MODE_MMAP:
208 if ((at & ~0x3ff) == 0x400) {
209 at = 0;
211 break;
212 case OPT_MODE_IOMAP16:
213 at &= 0xf;
214 break;
215 case OPT_MODE_IOMAP1:
216 if ((at & ~0xf) == 0x3f0) {
217 at -= 0x3e8;
218 } else if ((at & ~0xf) == 0x1f0) {
219 at -= 0x1f0;
221 break;
222 case OPT_MODE_IOMAP2:
223 if ((at & ~0xf) == 0x370) {
224 at -= 0x368;
225 } else if ((at & ~0xf) == 0x170) {
226 at -= 0x170;
230 switch (at) {
231 case 0x0: /* Even RD Data */
232 case 0x8:
233 return ide_data_readw(&s->bus, 0);
235 /* TODO: 8-bit accesses */
236 if (s->cycle) {
237 ret = s->io >> 8;
238 } else {
239 s->io = ide_data_readw(&s->bus, 0);
240 ret = s->io & 0xff;
242 s->cycle = !s->cycle;
243 return ret;
244 case 0x9: /* Odd RD Data */
245 return s->io >> 8;
246 case 0xd: /* Error */
247 return ide_ioport_read(&s->bus, 0x1);
248 case 0xe: /* Alternate Status */
249 ifs = idebus_active_if(&s->bus);
250 if (ifs->bs) {
251 return ifs->status;
252 } else {
253 return 0;
255 case 0xf: /* Device Address */
256 ifs = idebus_active_if(&s->bus);
257 return 0xc2 | ((~ifs->select << 2) & 0x3c);
258 default:
259 return ide_ioport_read(&s->bus, at);
262 return 0;
265 static void md_common_write(PCMCIACardState *card, uint32_t at, uint16_t value)
267 MicroDriveState *s = MICRODRIVE(card);
268 at -= s->io_base;
270 switch (s->opt & OPT_MODE) {
271 case OPT_MODE_MMAP:
272 if ((at & ~0x3ff) == 0x400) {
273 at = 0;
275 break;
276 case OPT_MODE_IOMAP16:
277 at &= 0xf;
278 break;
279 case OPT_MODE_IOMAP1:
280 if ((at & ~0xf) == 0x3f0) {
281 at -= 0x3e8;
282 } else if ((at & ~0xf) == 0x1f0) {
283 at -= 0x1f0;
285 break;
286 case OPT_MODE_IOMAP2:
287 if ((at & ~0xf) == 0x370) {
288 at -= 0x368;
289 } else if ((at & ~0xf) == 0x170) {
290 at -= 0x170;
294 switch (at) {
295 case 0x0: /* Even WR Data */
296 case 0x8:
297 ide_data_writew(&s->bus, 0, value);
298 break;
300 /* TODO: 8-bit accesses */
301 if (s->cycle) {
302 ide_data_writew(&s->bus, 0, s->io | (value << 8));
303 } else {
304 s->io = value & 0xff;
306 s->cycle = !s->cycle;
307 break;
308 case 0x9:
309 s->io = value & 0xff;
310 s->cycle = !s->cycle;
311 break;
312 case 0xd: /* Features */
313 ide_ioport_write(&s->bus, 0x1, value);
314 break;
315 case 0xe: /* Device Control */
316 s->ctrl = value;
317 if (value & CTRL_SRST) {
318 device_reset(DEVICE(s));
320 md_interrupt_update(s);
321 break;
322 default:
323 if (s->stat & STAT_PWRDWN) {
324 s->pins |= PINS_CRDY;
325 s->stat &= ~STAT_PWRDWN;
327 ide_ioport_write(&s->bus, at, value);
331 static const VMStateDescription vmstate_microdrive = {
332 .name = "microdrive",
333 .version_id = 3,
334 .minimum_version_id = 0,
335 .minimum_version_id_old = 0,
336 .fields = (VMStateField []) {
337 VMSTATE_UINT8(opt, MicroDriveState),
338 VMSTATE_UINT8(stat, MicroDriveState),
339 VMSTATE_UINT8(pins, MicroDriveState),
340 VMSTATE_UINT8(ctrl, MicroDriveState),
341 VMSTATE_UINT16(io, MicroDriveState),
342 VMSTATE_UINT8(cycle, MicroDriveState),
343 VMSTATE_IDE_BUS(bus, MicroDriveState),
344 VMSTATE_IDE_DRIVES(bus.ifs, MicroDriveState),
345 VMSTATE_END_OF_LIST()
349 static const uint8_t dscm1xxxx_cis[0x14a] = {
350 [0x000] = CISTPL_DEVICE, /* 5V Device Information */
351 [0x002] = 0x03, /* Tuple length = 4 bytes */
352 [0x004] = 0xdb, /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
353 [0x006] = 0x01, /* Size = 2K bytes */
354 [0x008] = CISTPL_ENDMARK,
356 [0x00a] = CISTPL_DEVICE_OC, /* Additional Device Information */
357 [0x00c] = 0x04, /* Tuple length = 4 byest */
358 [0x00e] = 0x03, /* Conditions: Ext = 0, Vcc 3.3V, MWAIT = 1 */
359 [0x010] = 0xdb, /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
360 [0x012] = 0x01, /* Size = 2K bytes */
361 [0x014] = CISTPL_ENDMARK,
363 [0x016] = CISTPL_JEDEC_C, /* JEDEC ID */
364 [0x018] = 0x02, /* Tuple length = 2 bytes */
365 [0x01a] = 0xdf, /* PC Card ATA with no Vpp required */
366 [0x01c] = 0x01,
368 [0x01e] = CISTPL_MANFID, /* Manufacture ID */
369 [0x020] = 0x04, /* Tuple length = 4 bytes */
370 [0x022] = 0xa4, /* TPLMID_MANF = 00a4 (IBM) */
371 [0x024] = 0x00,
372 [0x026] = 0x00, /* PLMID_CARD = 0000 */
373 [0x028] = 0x00,
375 [0x02a] = CISTPL_VERS_1, /* Level 1 Version */
376 [0x02c] = 0x12, /* Tuple length = 23 bytes */
377 [0x02e] = 0x04, /* Major Version = JEIDA 4.2 / PCMCIA 2.1 */
378 [0x030] = 0x01, /* Minor Version = 1 */
379 [0x032] = 'I',
380 [0x034] = 'B',
381 [0x036] = 'M',
382 [0x038] = 0x00,
383 [0x03a] = 'm',
384 [0x03c] = 'i',
385 [0x03e] = 'c',
386 [0x040] = 'r',
387 [0x042] = 'o',
388 [0x044] = 'd',
389 [0x046] = 'r',
390 [0x048] = 'i',
391 [0x04a] = 'v',
392 [0x04c] = 'e',
393 [0x04e] = 0x00,
394 [0x050] = CISTPL_ENDMARK,
396 [0x052] = CISTPL_FUNCID, /* Function ID */
397 [0x054] = 0x02, /* Tuple length = 2 bytes */
398 [0x056] = 0x04, /* TPLFID_FUNCTION = Fixed Disk */
399 [0x058] = 0x01, /* TPLFID_SYSINIT: POST = 1, ROM = 0 */
401 [0x05a] = CISTPL_FUNCE, /* Function Extension */
402 [0x05c] = 0x02, /* Tuple length = 2 bytes */
403 [0x05e] = 0x01, /* TPLFE_TYPE = Disk Device Interface */
404 [0x060] = 0x01, /* TPLFE_DATA = PC Card ATA Interface */
406 [0x062] = CISTPL_FUNCE, /* Function Extension */
407 [0x064] = 0x03, /* Tuple length = 3 bytes */
408 [0x066] = 0x02, /* TPLFE_TYPE = Basic PC Card ATA Interface */
409 [0x068] = 0x08, /* TPLFE_DATA: Rotating, Unique, Single */
410 [0x06a] = 0x0f, /* TPLFE_DATA: Sleep, Standby, Idle, Auto */
412 [0x06c] = CISTPL_CONFIG, /* Configuration */
413 [0x06e] = 0x05, /* Tuple length = 5 bytes */
414 [0x070] = 0x01, /* TPCC_RASZ = 2 bytes, TPCC_RMSZ = 1 byte */
415 [0x072] = 0x07, /* TPCC_LAST = 7 */
416 [0x074] = 0x00, /* TPCC_RADR = 0200 */
417 [0x076] = 0x02,
418 [0x078] = 0x0f, /* TPCC_RMSK = 200, 202, 204, 206 */
420 [0x07a] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
421 [0x07c] = 0x0b, /* Tuple length = 11 bytes */
422 [0x07e] = 0xc0, /* TPCE_INDX = Memory Mode, Default, Iface */
423 [0x080] = 0xc0, /* TPCE_IF = Memory, no BVDs, no WP, READY */
424 [0x082] = 0xa1, /* TPCE_FS = Vcc only, no I/O, Memory, Misc */
425 [0x084] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
426 [0x086] = 0x55, /* NomV: 5.0 V */
427 [0x088] = 0x4d, /* MinV: 4.5 V */
428 [0x08a] = 0x5d, /* MaxV: 5.5 V */
429 [0x08c] = 0x4e, /* Peakl: 450 mA */
430 [0x08e] = 0x08, /* TPCE_MS = 1 window, 1 byte, Host address */
431 [0x090] = 0x00, /* Window descriptor: Window length = 0 */
432 [0x092] = 0x20, /* TPCE_MI: support power down mode, RW */
434 [0x094] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
435 [0x096] = 0x06, /* Tuple length = 6 bytes */
436 [0x098] = 0x00, /* TPCE_INDX = Memory Mode, no Default */
437 [0x09a] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
438 [0x09c] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
439 [0x09e] = 0xb5, /* NomV: 3.3 V */
440 [0x0a0] = 0x1e,
441 [0x0a2] = 0x3e, /* Peakl: 350 mA */
443 [0x0a4] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
444 [0x0a6] = 0x0d, /* Tuple length = 13 bytes */
445 [0x0a8] = 0xc1, /* TPCE_INDX = I/O and Memory Mode, Default */
446 [0x0aa] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
447 [0x0ac] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
448 [0x0ae] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
449 [0x0b0] = 0x55, /* NomV: 5.0 V */
450 [0x0b2] = 0x4d, /* MinV: 4.5 V */
451 [0x0b4] = 0x5d, /* MaxV: 5.5 V */
452 [0x0b6] = 0x4e, /* Peakl: 450 mA */
453 [0x0b8] = 0x64, /* TPCE_IO = 16-byte boundary, 16/8 accesses */
454 [0x0ba] = 0xf0, /* TPCE_IR = MASK, Level, Pulse, Share */
455 [0x0bc] = 0xff, /* IRQ0..IRQ7 supported */
456 [0x0be] = 0xff, /* IRQ8..IRQ15 supported */
457 [0x0c0] = 0x20, /* TPCE_MI = support power down mode */
459 [0x0c2] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
460 [0x0c4] = 0x06, /* Tuple length = 6 bytes */
461 [0x0c6] = 0x01, /* TPCE_INDX = I/O and Memory Mode */
462 [0x0c8] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
463 [0x0ca] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
464 [0x0cc] = 0xb5, /* NomV: 3.3 V */
465 [0x0ce] = 0x1e,
466 [0x0d0] = 0x3e, /* Peakl: 350 mA */
468 [0x0d2] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
469 [0x0d4] = 0x12, /* Tuple length = 18 bytes */
470 [0x0d6] = 0xc2, /* TPCE_INDX = I/O Primary Mode */
471 [0x0d8] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
472 [0x0da] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
473 [0x0dc] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
474 [0x0de] = 0x55, /* NomV: 5.0 V */
475 [0x0e0] = 0x4d, /* MinV: 4.5 V */
476 [0x0e2] = 0x5d, /* MaxV: 5.5 V */
477 [0x0e4] = 0x4e, /* Peakl: 450 mA */
478 [0x0e6] = 0xea, /* TPCE_IO = 1K boundary, 16/8 access, Range */
479 [0x0e8] = 0x61, /* Range: 2 fields, 2 bytes addr, 1 byte len */
480 [0x0ea] = 0xf0, /* Field 1 address = 0x01f0 */
481 [0x0ec] = 0x01,
482 [0x0ee] = 0x07, /* Address block length = 8 */
483 [0x0f0] = 0xf6, /* Field 2 address = 0x03f6 */
484 [0x0f2] = 0x03,
485 [0x0f4] = 0x01, /* Address block length = 2 */
486 [0x0f6] = 0xee, /* TPCE_IR = IRQ E, Level, Pulse, Share */
487 [0x0f8] = 0x20, /* TPCE_MI = support power down mode */
489 [0x0fa] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
490 [0x0fc] = 0x06, /* Tuple length = 6 bytes */
491 [0x0fe] = 0x02, /* TPCE_INDX = I/O Primary Mode, no Default */
492 [0x100] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
493 [0x102] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
494 [0x104] = 0xb5, /* NomV: 3.3 V */
495 [0x106] = 0x1e,
496 [0x108] = 0x3e, /* Peakl: 350 mA */
498 [0x10a] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
499 [0x10c] = 0x12, /* Tuple length = 18 bytes */
500 [0x10e] = 0xc3, /* TPCE_INDX = I/O Secondary Mode, Default */
501 [0x110] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
502 [0x112] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
503 [0x114] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
504 [0x116] = 0x55, /* NomV: 5.0 V */
505 [0x118] = 0x4d, /* MinV: 4.5 V */
506 [0x11a] = 0x5d, /* MaxV: 5.5 V */
507 [0x11c] = 0x4e, /* Peakl: 450 mA */
508 [0x11e] = 0xea, /* TPCE_IO = 1K boundary, 16/8 access, Range */
509 [0x120] = 0x61, /* Range: 2 fields, 2 byte addr, 1 byte len */
510 [0x122] = 0x70, /* Field 1 address = 0x0170 */
511 [0x124] = 0x01,
512 [0x126] = 0x07, /* Address block length = 8 */
513 [0x128] = 0x76, /* Field 2 address = 0x0376 */
514 [0x12a] = 0x03,
515 [0x12c] = 0x01, /* Address block length = 2 */
516 [0x12e] = 0xee, /* TPCE_IR = IRQ E, Level, Pulse, Share */
517 [0x130] = 0x20, /* TPCE_MI = support power down mode */
519 [0x132] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
520 [0x134] = 0x06, /* Tuple length = 6 bytes */
521 [0x136] = 0x03, /* TPCE_INDX = I/O Secondary Mode */
522 [0x138] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
523 [0x13a] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
524 [0x13c] = 0xb5, /* NomV: 3.3 V */
525 [0x13e] = 0x1e,
526 [0x140] = 0x3e, /* Peakl: 350 mA */
528 [0x142] = CISTPL_NO_LINK, /* No Link */
529 [0x144] = 0x00, /* Tuple length = 0 bytes */
531 [0x146] = CISTPL_END, /* Tuple End */
534 #define TYPE_DSCM1XXXX "dscm1xxxx"
536 static int dscm1xxxx_attach(PCMCIACardState *card)
538 MicroDriveState *md = MICRODRIVE(card);
539 PCMCIACardClass *pcc = PCMCIA_CARD_GET_CLASS(card);
541 md->attr_base = pcc->cis[0x74] | (pcc->cis[0x76] << 8);
542 md->io_base = 0x0;
544 device_reset(DEVICE(md));
545 md_interrupt_update(md);
547 card->slot->card_string = "DSCM-1xxxx Hitachi Microdrive";
548 return 0;
551 static int dscm1xxxx_detach(PCMCIACardState *card)
553 MicroDriveState *md = MICRODRIVE(card);
555 device_reset(DEVICE(md));
556 return 0;
559 PCMCIACardState *dscm1xxxx_init(DriveInfo *dinfo)
561 MicroDriveState *md;
563 md = MICRODRIVE(object_new(TYPE_DSCM1XXXX));
564 qdev_init_nofail(DEVICE(md));
566 if (dinfo != NULL) {
567 ide_create_drive(&md->bus, 0, dinfo);
569 md->bus.ifs[0].drive_kind = IDE_CFATA;
570 md->bus.ifs[0].mdata_size = METADATA_SIZE;
571 md->bus.ifs[0].mdata_storage = (uint8_t *) g_malloc0(METADATA_SIZE);
573 return PCMCIA_CARD(md);
576 static void dscm1xxxx_class_init(ObjectClass *oc, void *data)
578 PCMCIACardClass *pcc = PCMCIA_CARD_CLASS(oc);
580 pcc->cis = dscm1xxxx_cis;
581 pcc->cis_len = sizeof(dscm1xxxx_cis);
583 pcc->attach = dscm1xxxx_attach;
584 pcc->detach = dscm1xxxx_detach;
587 static const TypeInfo dscm1xxxx_type_info = {
588 .name = TYPE_DSCM1XXXX,
589 .parent = TYPE_MICRODRIVE,
590 .class_init = dscm1xxxx_class_init,
593 static void microdrive_realize(DeviceState *dev, Error **errp)
595 MicroDriveState *md = MICRODRIVE(dev);
597 ide_init2(&md->bus, qemu_allocate_irqs(md_set_irq, md, 1)[0]);
600 static void microdrive_init(Object *obj)
602 MicroDriveState *md = MICRODRIVE(obj);
604 ide_bus_new(&md->bus, sizeof(md->bus), DEVICE(obj), 0, 1);
607 static void microdrive_class_init(ObjectClass *oc, void *data)
609 DeviceClass *dc = DEVICE_CLASS(oc);
610 PCMCIACardClass *pcc = PCMCIA_CARD_CLASS(oc);
612 pcc->attr_read = md_attr_read;
613 pcc->attr_write = md_attr_write;
614 pcc->common_read = md_common_read;
615 pcc->common_write = md_common_write;
616 pcc->io_read = md_common_read;
617 pcc->io_write = md_common_write;
619 dc->realize = microdrive_realize;
620 dc->reset = md_reset;
621 dc->vmsd = &vmstate_microdrive;
624 static const TypeInfo microdrive_type_info = {
625 .name = TYPE_MICRODRIVE,
626 .parent = TYPE_PCMCIA_CARD,
627 .instance_size = sizeof(MicroDriveState),
628 .instance_init = microdrive_init,
629 .abstract = true,
630 .class_init = microdrive_class_init,
633 static void microdrive_register_types(void)
635 type_register_static(&microdrive_type_info);
636 type_register_static(&dscm1xxxx_type_info);
639 type_init(microdrive_register_types)