2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu/timer.h"
17 #include "qemu/error-report.h"
18 #include "qemu/main-loop.h"
19 #include "qom/object.h"
20 #include "qapi/error.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/kvm.h"
23 #include "sysemu/kvm_int.h"
27 #include "internals.h"
28 #include "hw/pci/pci.h"
29 #include "exec/memattrs.h"
30 #include "exec/address-spaces.h"
31 #include "hw/boards.h"
35 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
39 static bool cap_has_mp_state
;
40 static bool cap_has_inject_serror_esr
;
41 static bool cap_has_inject_ext_dabt
;
43 static ARMHostCPUFeatures arm_host_cpu_features
;
45 int kvm_arm_vcpu_init(CPUState
*cs
)
47 ARMCPU
*cpu
= ARM_CPU(cs
);
48 struct kvm_vcpu_init init
;
50 init
.target
= cpu
->kvm_target
;
51 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
53 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
56 int kvm_arm_vcpu_finalize(CPUState
*cs
, int feature
)
58 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_FINALIZE
, &feature
);
61 void kvm_arm_init_serror_injection(CPUState
*cs
)
63 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
64 KVM_CAP_ARM_INJECT_SERROR_ESR
);
67 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
69 struct kvm_vcpu_init
*init
)
71 int ret
= 0, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
74 kvmfd
= qemu_open_old("/dev/kvm", O_RDWR
);
78 max_vm_pa_size
= ioctl(kvmfd
, KVM_CHECK_EXTENSION
, KVM_CAP_ARM_VM_IPA_SIZE
);
79 if (max_vm_pa_size
< 0) {
83 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, max_vm_pa_size
);
84 } while (vmfd
== -1 && errno
== EINTR
);
88 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
94 /* Caller doesn't want the VCPU to be initialized, so skip it */
98 if (init
->target
== -1) {
99 struct kvm_vcpu_init preferred
;
101 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, &preferred
);
103 init
->target
= preferred
.target
;
107 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
111 } else if (cpus_to_try
) {
112 /* Old kernel which doesn't know about the
113 * PREFERRED_TARGET ioctl: we know it will only support
114 * creating one kind of guest CPU which is its preferred
117 struct kvm_vcpu_init
try;
119 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
120 try.target
= *cpus_to_try
++;
121 memcpy(try.features
, init
->features
, sizeof(init
->features
));
122 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, &try);
130 init
->target
= try.target
;
132 /* Treat a NULL cpus_to_try argument the same as an empty
133 * list, which means we will fail the call since this must
134 * be an old kernel which doesn't support PREFERRED_TARGET.
160 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
164 for (i
= 2; i
>= 0; i
--) {
169 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
171 CPUARMState
*env
= &cpu
->env
;
173 if (!arm_host_cpu_features
.dtb_compatible
) {
174 if (!kvm_enabled() ||
175 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
176 /* We can't report this error yet, so flag that we need to
177 * in arm_cpu_realizefn().
179 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
180 cpu
->host_cpu_probe_failed
= true;
185 cpu
->kvm_target
= arm_host_cpu_features
.target
;
186 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
187 cpu
->isar
= arm_host_cpu_features
.isar
;
188 env
->features
= arm_host_cpu_features
.features
;
191 static bool kvm_no_adjvtime_get(Object
*obj
, Error
**errp
)
193 return !ARM_CPU(obj
)->kvm_adjvtime
;
196 static void kvm_no_adjvtime_set(Object
*obj
, bool value
, Error
**errp
)
198 ARM_CPU(obj
)->kvm_adjvtime
= !value
;
201 static bool kvm_steal_time_get(Object
*obj
, Error
**errp
)
203 return ARM_CPU(obj
)->kvm_steal_time
!= ON_OFF_AUTO_OFF
;
206 static void kvm_steal_time_set(Object
*obj
, bool value
, Error
**errp
)
208 ARM_CPU(obj
)->kvm_steal_time
= value
? ON_OFF_AUTO_ON
: ON_OFF_AUTO_OFF
;
211 /* KVM VCPU properties should be prefixed with "kvm-". */
212 void kvm_arm_add_vcpu_properties(Object
*obj
)
214 ARMCPU
*cpu
= ARM_CPU(obj
);
215 CPUARMState
*env
= &cpu
->env
;
217 if (arm_feature(env
, ARM_FEATURE_GENERIC_TIMER
)) {
218 cpu
->kvm_adjvtime
= true;
219 object_property_add_bool(obj
, "kvm-no-adjvtime", kvm_no_adjvtime_get
,
220 kvm_no_adjvtime_set
);
221 object_property_set_description(obj
, "kvm-no-adjvtime",
222 "Set on to disable the adjustment of "
223 "the virtual counter. VM stopped time "
227 cpu
->kvm_steal_time
= ON_OFF_AUTO_AUTO
;
228 object_property_add_bool(obj
, "kvm-steal-time", kvm_steal_time_get
,
230 object_property_set_description(obj
, "kvm-steal-time",
231 "Set off to disable KVM steal time.");
234 bool kvm_arm_pmu_supported(void)
236 return kvm_check_extension(kvm_state
, KVM_CAP_ARM_PMU_V3
);
239 int kvm_arm_get_max_vm_ipa_size(MachineState
*ms
, bool *fixed_ipa
)
241 KVMState
*s
= KVM_STATE(ms
->accelerator
);
244 ret
= kvm_check_extension(s
, KVM_CAP_ARM_VM_IPA_SIZE
);
245 *fixed_ipa
= ret
<= 0;
247 return ret
> 0 ? ret
: 40;
250 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
253 /* For ARM interrupt delivery is always asynchronous,
254 * whether we are using an in-kernel VGIC or not.
256 kvm_async_interrupts_allowed
= true;
259 * PSCI wakes up secondary cores, so we always need to
260 * have vCPUs waiting in kernel space
262 kvm_halt_in_kernel_allowed
= true;
264 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
266 if (ms
->smp
.cpus
> 256 &&
267 !kvm_check_extension(s
, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2
)) {
268 error_report("Using more than 256 vcpus requires a host kernel "
269 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
273 if (kvm_check_extension(s
, KVM_CAP_ARM_NISV_TO_USER
)) {
274 if (kvm_vm_enable_cap(s
, KVM_CAP_ARM_NISV_TO_USER
, 0)) {
275 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
277 /* Set status for supporting the external dabt injection */
278 cap_has_inject_ext_dabt
= kvm_check_extension(s
,
279 KVM_CAP_ARM_INJECT_EXT_DABT
);
283 kvm_arm_init_debug(s
);
288 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
290 return cpu
->cpu_index
;
293 /* We track all the KVM devices which need their memory addresses
294 * passing to the kernel in a list of these structures.
295 * When board init is complete we run through the list and
296 * tell the kernel the base addresses of the memory regions.
297 * We use a MemoryListener to track mapping and unmapping of
298 * the regions during board creation, so the board models don't
299 * need to do anything special for the KVM case.
301 * Sometimes the address must be OR'ed with some other fields
302 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
303 * @kda_addr_ormask aims at storing the value of those fields.
305 typedef struct KVMDevice
{
306 struct kvm_arm_device_addr kda
;
307 struct kvm_device_attr kdattr
;
308 uint64_t kda_addr_ormask
;
310 QSLIST_ENTRY(KVMDevice
) entries
;
314 static QSLIST_HEAD(, KVMDevice
) kvm_devices_head
;
316 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
317 MemoryRegionSection
*section
)
321 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
322 if (section
->mr
== kd
->mr
) {
323 kd
->kda
.addr
= section
->offset_within_address_space
;
328 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
329 MemoryRegionSection
*section
)
333 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
334 if (section
->mr
== kd
->mr
) {
340 static MemoryListener devlistener
= {
342 .region_add
= kvm_arm_devlistener_add
,
343 .region_del
= kvm_arm_devlistener_del
,
344 .priority
= MEMORY_LISTENER_PRIORITY_MIN
,
347 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
349 struct kvm_device_attr
*attr
= &kd
->kdattr
;
352 /* If the device control API is available and we have a device fd on the
353 * KVMDevice struct, let's use the newer API
355 if (kd
->dev_fd
>= 0) {
356 uint64_t addr
= kd
->kda
.addr
;
358 addr
|= kd
->kda_addr_ormask
;
359 attr
->addr
= (uintptr_t)&addr
;
360 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
362 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
366 fprintf(stderr
, "Failed to set device address: %s\n",
372 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
376 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
377 if (kd
->kda
.addr
!= -1) {
378 kvm_arm_set_device_addr(kd
);
380 memory_region_unref(kd
->mr
);
381 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
384 memory_listener_unregister(&devlistener
);
387 static Notifier notify
= {
388 .notify
= kvm_arm_machine_init_done
,
391 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
392 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
396 if (!kvm_irqchip_in_kernel()) {
400 if (QSLIST_EMPTY(&kvm_devices_head
)) {
401 memory_listener_register(&devlistener
, &address_space_memory
);
402 qemu_add_machine_init_done_notifier(¬ify
);
404 kd
= g_new0(KVMDevice
, 1);
408 kd
->kdattr
.flags
= 0;
409 kd
->kdattr
.group
= group
;
410 kd
->kdattr
.attr
= attr
;
412 kd
->kda_addr_ormask
= addr_ormask
;
413 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
414 memory_region_ref(kd
->mr
);
417 static int compare_u64(const void *a
, const void *b
)
419 if (*(uint64_t *)a
> *(uint64_t *)b
) {
422 if (*(uint64_t *)a
< *(uint64_t *)b
) {
429 * cpreg_values are sorted in ascending order by KVM register ID
430 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
431 * the storage for a KVM register by ID with a binary search.
433 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU
*cpu
, uint64_t regidx
)
437 res
= bsearch(®idx
, cpu
->cpreg_indexes
, cpu
->cpreg_array_len
,
438 sizeof(uint64_t), compare_u64
);
441 return &cpu
->cpreg_values
[res
- cpu
->cpreg_indexes
];
444 /* Initialize the ARMCPU cpreg list according to the kernel's
445 * definition of what CPU registers it knows about (and throw away
446 * the previous TCG-created cpreg list).
448 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
450 struct kvm_reg_list rl
;
451 struct kvm_reg_list
*rlp
;
452 int i
, ret
, arraylen
;
453 CPUState
*cs
= CPU(cpu
);
456 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
460 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
462 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
466 /* Sort the list we get back from the kernel, since cpreg_tuples
467 * must be in strictly ascending order.
469 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
471 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
472 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
475 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
476 case KVM_REG_SIZE_U32
:
477 case KVM_REG_SIZE_U64
:
480 fprintf(stderr
, "Can't handle size of register in kernel list\n");
488 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
489 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
490 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
492 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
494 cpu
->cpreg_array_len
= arraylen
;
495 cpu
->cpreg_vmstate_array_len
= arraylen
;
497 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
498 uint64_t regidx
= rlp
->reg
[i
];
499 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
502 cpu
->cpreg_indexes
[arraylen
] = regidx
;
505 assert(cpu
->cpreg_array_len
== arraylen
);
507 if (!write_kvmstate_to_list(cpu
)) {
508 /* Shouldn't happen unless kernel is inconsistent about
509 * what registers exist.
511 fprintf(stderr
, "Initial read of kernel register state failed\n");
521 bool write_kvmstate_to_list(ARMCPU
*cpu
)
523 CPUState
*cs
= CPU(cpu
);
527 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
528 struct kvm_one_reg r
;
529 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
535 switch (regidx
& KVM_REG_SIZE_MASK
) {
536 case KVM_REG_SIZE_U32
:
537 r
.addr
= (uintptr_t)&v32
;
538 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
540 cpu
->cpreg_values
[i
] = v32
;
543 case KVM_REG_SIZE_U64
:
544 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
545 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
548 g_assert_not_reached();
557 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
559 CPUState
*cs
= CPU(cpu
);
563 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
564 struct kvm_one_reg r
;
565 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
569 if (kvm_arm_cpreg_level(regidx
) > level
) {
574 switch (regidx
& KVM_REG_SIZE_MASK
) {
575 case KVM_REG_SIZE_U32
:
576 v32
= cpu
->cpreg_values
[i
];
577 r
.addr
= (uintptr_t)&v32
;
579 case KVM_REG_SIZE_U64
:
580 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
583 g_assert_not_reached();
585 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
587 /* We might fail for "unknown register" and also for
588 * "you tried to set a register which is constant with
589 * a different value from what it actually contains".
597 void kvm_arm_cpu_pre_save(ARMCPU
*cpu
)
599 /* KVM virtual time adjustment */
600 if (cpu
->kvm_vtime_dirty
) {
601 *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
) = cpu
->kvm_vtime
;
605 void kvm_arm_cpu_post_load(ARMCPU
*cpu
)
607 /* KVM virtual time adjustment */
608 if (cpu
->kvm_adjvtime
) {
609 cpu
->kvm_vtime
= *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
);
610 cpu
->kvm_vtime_dirty
= true;
614 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
618 /* Re-init VCPU so that all registers are set to
619 * their respective reset values.
621 ret
= kvm_arm_vcpu_init(CPU(cpu
));
623 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
626 if (!write_kvmstate_to_list(cpu
)) {
627 fprintf(stderr
, "write_kvmstate_to_list failed\n");
631 * Sync the reset values also into the CPUState. This is necessary
632 * because the next thing we do will be a kvm_arch_put_registers()
633 * which will update the list values from the CPUState before copying
634 * the list values back to KVM. It's OK to ignore failure returns here
635 * for the same reason we do so in kvm_arch_get_registers().
637 write_list_to_cpustate(cpu
);
641 * Update KVM's MP_STATE based on what QEMU thinks it is
643 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
645 if (cap_has_mp_state
) {
646 struct kvm_mp_state mp_state
= {
647 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
648 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
650 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
652 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
653 __func__
, ret
, strerror(-ret
));
662 * Sync the KVM MP_STATE into QEMU
664 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
666 if (cap_has_mp_state
) {
667 struct kvm_mp_state mp_state
;
668 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
670 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
671 __func__
, ret
, strerror(-ret
));
674 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
681 void kvm_arm_get_virtual_time(CPUState
*cs
)
683 ARMCPU
*cpu
= ARM_CPU(cs
);
684 struct kvm_one_reg reg
= {
685 .id
= KVM_REG_ARM_TIMER_CNT
,
686 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
690 if (cpu
->kvm_vtime_dirty
) {
694 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
696 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
700 cpu
->kvm_vtime_dirty
= true;
703 void kvm_arm_put_virtual_time(CPUState
*cs
)
705 ARMCPU
*cpu
= ARM_CPU(cs
);
706 struct kvm_one_reg reg
= {
707 .id
= KVM_REG_ARM_TIMER_CNT
,
708 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
712 if (!cpu
->kvm_vtime_dirty
) {
716 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
718 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
722 cpu
->kvm_vtime_dirty
= false;
725 int kvm_put_vcpu_events(ARMCPU
*cpu
)
727 CPUARMState
*env
= &cpu
->env
;
728 struct kvm_vcpu_events events
;
731 if (!kvm_has_vcpu_events()) {
735 memset(&events
, 0, sizeof(events
));
736 events
.exception
.serror_pending
= env
->serror
.pending
;
738 /* Inject SError to guest with specified syndrome if host kernel
739 * supports it, otherwise inject SError without syndrome.
741 if (cap_has_inject_serror_esr
) {
742 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
743 events
.exception
.serror_esr
= env
->serror
.esr
;
746 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
748 error_report("failed to put vcpu events");
754 int kvm_get_vcpu_events(ARMCPU
*cpu
)
756 CPUARMState
*env
= &cpu
->env
;
757 struct kvm_vcpu_events events
;
760 if (!kvm_has_vcpu_events()) {
764 memset(&events
, 0, sizeof(events
));
765 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
767 error_report("failed to get vcpu events");
771 env
->serror
.pending
= events
.exception
.serror_pending
;
772 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
773 env
->serror
.esr
= events
.exception
.serror_esr
;
778 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
780 ARMCPU
*cpu
= ARM_CPU(cs
);
781 CPUARMState
*env
= &cpu
->env
;
783 if (unlikely(env
->ext_dabt_raised
)) {
785 * Verifying that the ext DABT has been properly injected,
786 * otherwise risking indefinitely re-running the faulting instruction
787 * Covering a very narrow case for kernels 5.5..5.5.4
788 * when injected abort was misconfigured to be
789 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
791 if (!arm_feature(env
, ARM_FEATURE_AARCH64
) &&
792 unlikely(!kvm_arm_verify_ext_dabt_pending(cs
))) {
794 error_report("Data abort exception with no valid ISS generated by "
795 "guest memory access. KVM unable to emulate faulting "
796 "instruction. Failed to inject an external data abort "
800 /* Clear the status */
801 env
->ext_dabt_raised
= 0;
805 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
808 uint32_t switched_level
;
810 if (kvm_irqchip_in_kernel()) {
812 * We only need to sync timer states with user-space interrupt
813 * controllers, so return early and save cycles if we don't.
815 return MEMTXATTRS_UNSPECIFIED
;
820 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
821 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
822 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
824 qemu_mutex_lock_iothread();
826 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
827 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
828 !!(run
->s
.regs
.device_irq_level
&
829 KVM_ARM_DEV_EL1_VTIMER
));
830 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
833 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
834 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
835 !!(run
->s
.regs
.device_irq_level
&
836 KVM_ARM_DEV_EL1_PTIMER
));
837 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
840 if (switched_level
& KVM_ARM_DEV_PMU
) {
841 qemu_set_irq(cpu
->pmu_interrupt
,
842 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
843 switched_level
&= ~KVM_ARM_DEV_PMU
;
846 if (switched_level
) {
847 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
848 __func__
, switched_level
);
851 /* We also mark unknown levels as processed to not waste cycles */
852 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
853 qemu_mutex_unlock_iothread();
856 return MEMTXATTRS_UNSPECIFIED
;
859 void kvm_arm_vm_state_change(void *opaque
, bool running
, RunState state
)
861 CPUState
*cs
= opaque
;
862 ARMCPU
*cpu
= ARM_CPU(cs
);
865 if (cpu
->kvm_adjvtime
) {
866 kvm_arm_put_virtual_time(cs
);
869 if (cpu
->kvm_adjvtime
) {
870 kvm_arm_get_virtual_time(cs
);
876 * kvm_arm_handle_dabt_nisv:
878 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
879 * ISV bit set to '0b0' -> no valid instruction syndrome
880 * @fault_ipa: faulting address for the synchronous data abort
882 * Returns: 0 if the exception has been handled, < 0 otherwise
884 static int kvm_arm_handle_dabt_nisv(CPUState
*cs
, uint64_t esr_iss
,
887 ARMCPU
*cpu
= ARM_CPU(cs
);
888 CPUARMState
*env
= &cpu
->env
;
890 * Request KVM to inject the external data abort into the guest
892 if (cap_has_inject_ext_dabt
) {
893 struct kvm_vcpu_events events
= { };
895 * The external data abort event will be handled immediately by KVM
896 * using the address fault that triggered the exit on given VCPU.
897 * Requesting injection of the external data abort does not rely
898 * on any other VCPU state. Therefore, in this particular case, the VCPU
899 * synchronization can be exceptionally skipped.
901 events
.exception
.ext_dabt_pending
= 1;
902 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
903 if (!kvm_vcpu_ioctl(cs
, KVM_SET_VCPU_EVENTS
, &events
)) {
904 env
->ext_dabt_raised
= 1;
908 error_report("Data abort exception triggered by guest memory access "
909 "at physical address: 0x" TARGET_FMT_lx
,
910 (target_ulong
)fault_ipa
);
911 error_printf("KVM unable to emulate faulting instruction.\n");
916 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
920 switch (run
->exit_reason
) {
922 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
924 } /* otherwise return to guest */
926 case KVM_EXIT_ARM_NISV
:
927 /* External DABT with no valid iss to decode */
928 ret
= kvm_arm_handle_dabt_nisv(cs
, run
->arm_nisv
.esr_iss
,
929 run
->arm_nisv
.fault_ipa
);
932 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
933 __func__
, run
->exit_reason
);
939 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
944 int kvm_arch_process_async_events(CPUState
*cs
)
949 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
951 if (kvm_sw_breakpoints_active(cs
)) {
952 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
954 if (kvm_arm_hw_debug_active(cs
)) {
955 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
956 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
960 void kvm_arch_init_irq_routing(KVMState
*s
)
964 int kvm_arch_irqchip_create(KVMState
*s
)
966 if (kvm_kernel_irqchip_split()) {
967 error_report("-machine kernel_irqchip=split is not supported on ARM.");
971 /* If we can create the VGIC using the newer device control API, we
972 * let the device do this when it initializes itself, otherwise we
973 * fall back to the old API */
974 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
977 int kvm_arm_vgic_probe(void)
981 if (kvm_create_device(kvm_state
,
982 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
983 val
|= KVM_ARM_VGIC_V3
;
985 if (kvm_create_device(kvm_state
,
986 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
987 val
|= KVM_ARM_VGIC_V2
;
992 int kvm_arm_set_irq(int cpu
, int irqtype
, int irq
, int level
)
994 int kvm_irq
= (irqtype
<< KVM_ARM_IRQ_TYPE_SHIFT
) | irq
;
995 int cpu_idx1
= cpu
% 256;
996 int cpu_idx2
= cpu
/ 256;
998 kvm_irq
|= (cpu_idx1
<< KVM_ARM_IRQ_VCPU_SHIFT
) |
999 (cpu_idx2
<< KVM_ARM_IRQ_VCPU2_SHIFT
);
1001 return kvm_set_irq(kvm_state
, kvm_irq
, !!level
);
1004 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
1005 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
1007 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
1008 hwaddr xlat
, len
, doorbell_gpa
;
1009 MemoryRegionSection mrs
;
1012 if (as
== &address_space_memory
) {
1016 /* MSI doorbell address is translated by an IOMMU */
1018 RCU_READ_LOCK_GUARD();
1020 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
1021 MEMTXATTRS_UNSPECIFIED
);
1027 mrs
= memory_region_find(mr
, xlat
, 1);
1033 doorbell_gpa
= mrs
.offset_within_address_space
;
1034 memory_region_unref(mrs
.mr
);
1036 route
->u
.msi
.address_lo
= doorbell_gpa
;
1037 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
1039 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
1044 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
1045 int vector
, PCIDevice
*dev
)
1050 int kvm_arch_release_virq_post(int virq
)
1055 int kvm_arch_msi_data_to_gsi(uint32_t data
)
1057 return (data
- 32) & 0xffff;
1060 bool kvm_arch_cpu_check_are_resettable(void)
1065 void kvm_arch_accel_class_init(ObjectClass
*oc
)