2 * QEMU PowerPC 405 evaluation boards emulation
4 * Copyright (c) 2007 Jocelyn Mayer
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qapi/error.h"
28 #include "qemu-common.h"
30 #include "hw/ppc/ppc.h"
31 #include "hw/qdev-properties.h"
32 #include "hw/sysbus.h"
34 #include "hw/rtc/m48t59.h"
35 #include "hw/block/flash.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/qtest.h"
38 #include "sysemu/reset.h"
39 #include "sysemu/block-backend.h"
40 #include "hw/boards.h"
42 #include "qemu/error-report.h"
43 #include "hw/loader.h"
44 #include "exec/address-spaces.h"
45 #include "qemu/cutils.h"
47 #define BIOS_FILENAME "ppc405_rom.bin"
48 #define BIOS_SIZE (2 * MiB)
50 #define KERNEL_LOAD_ADDR 0x00000000
51 #define INITRD_LOAD_ADDR 0x01800000
53 #define USE_FLASH_BIOS
55 /*****************************************************************************/
56 /* PPC405EP reference board (IBM) */
57 /* Standalone board with:
59 * - SDRAM (0x00000000)
60 * - Flash (0xFFF80000)
62 * - NVRAM (0xF0000000)
65 typedef struct ref405ep_fpga_t ref405ep_fpga_t
;
66 struct ref405ep_fpga_t
{
71 static uint64_t ref405ep_fpga_readb(void *opaque
, hwaddr addr
, unsigned size
)
73 ref405ep_fpga_t
*fpga
;
92 static void ref405ep_fpga_writeb(void *opaque
, hwaddr addr
, uint64_t value
,
95 ref405ep_fpga_t
*fpga
;
110 static const MemoryRegionOps ref405ep_fpga_ops
= {
111 .read
= ref405ep_fpga_readb
,
112 .write
= ref405ep_fpga_writeb
,
113 .impl
.min_access_size
= 1,
114 .impl
.max_access_size
= 1,
115 .valid
.min_access_size
= 1,
116 .valid
.max_access_size
= 4,
117 .endianness
= DEVICE_BIG_ENDIAN
,
120 static void ref405ep_fpga_reset (void *opaque
)
122 ref405ep_fpga_t
*fpga
;
129 static void ref405ep_fpga_init(MemoryRegion
*sysmem
, uint32_t base
)
131 ref405ep_fpga_t
*fpga
;
132 MemoryRegion
*fpga_memory
= g_new(MemoryRegion
, 1);
134 fpga
= g_malloc0(sizeof(ref405ep_fpga_t
));
135 memory_region_init_io(fpga_memory
, NULL
, &ref405ep_fpga_ops
, fpga
,
137 memory_region_add_subregion(sysmem
, base
, fpga_memory
);
138 qemu_register_reset(&ref405ep_fpga_reset
, fpga
);
141 static void ref405ep_init(MachineState
*machine
)
143 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
144 const char *kernel_filename
= machine
->kernel_filename
;
145 const char *kernel_cmdline
= machine
->kernel_cmdline
;
146 const char *initrd_filename
= machine
->initrd_filename
;
154 MemoryRegion
*sram
= g_new(MemoryRegion
, 1);
156 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
157 hwaddr ram_bases
[2], ram_sizes
[2];
158 target_ulong sram_size
;
161 //static int phy_addr = 1;
162 target_ulong kernel_base
, initrd_base
;
163 long kernel_size
, initrd_size
;
167 MemoryRegion
*sysmem
= get_system_memory();
169 if (machine
->ram_size
!= mc
->default_ram_size
) {
170 char *sz
= size_to_str(mc
->default_ram_size
);
171 error_report("Invalid RAM size, should be %s", sz
);
177 memory_region_init_alias(&ram_memories
[0], NULL
, "ef405ep.ram.alias",
178 machine
->ram
, 0, machine
->ram_size
);
180 ram_sizes
[0] = machine
->ram_size
;
181 memory_region_init(&ram_memories
[1], NULL
, "ef405ep.ram1", 0);
182 ram_bases
[1] = 0x00000000;
183 ram_sizes
[1] = 0x00000000;
184 env
= ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
185 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
187 sram_size
= 512 * KiB
;
188 memory_region_init_ram(sram
, NULL
, "ef405ep.sram", sram_size
,
190 memory_region_add_subregion(sysmem
, 0xFFF00000, sram
);
191 /* allocate and load BIOS */
192 #ifdef USE_FLASH_BIOS
193 dinfo
= drive_get(IF_PFLASH
, 0, 0);
196 pflash_cfi02_register((uint32_t)(-bios_size
),
197 "ef405ep.bios", bios_size
,
198 blk_by_legacy_dinfo(dinfo
),
200 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
205 bios
= g_new(MemoryRegion
, 1);
206 memory_region_init_rom(bios
, NULL
, "ef405ep.bios", BIOS_SIZE
,
209 if (bios_name
== NULL
)
210 bios_name
= BIOS_FILENAME
;
211 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
213 bios_size
= load_image_size(filename
,
214 memory_region_get_ram_ptr(bios
),
218 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
221 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
222 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
223 } else if (!qtest_enabled() || kernel_filename
!= NULL
) {
224 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
227 /* Avoid an uninitialized variable warning */
232 ref405ep_fpga_init(sysmem
, 0xF0300000);
234 dev
= qdev_new("sysbus-m48t08");
235 qdev_prop_set_int32(dev
, "base-year", 1968);
236 s
= SYS_BUS_DEVICE(dev
);
237 sysbus_realize_and_unref(s
, &error_fatal
);
238 sysbus_mmio_map(s
, 0, 0xF0000000);
240 linux_boot
= (kernel_filename
!= NULL
);
242 memset(&bd
, 0, sizeof(bd
));
243 bd
.bi_memstart
= 0x00000000;
244 bd
.bi_memsize
= machine
->ram_size
;
245 bd
.bi_flashstart
= -bios_size
;
246 bd
.bi_flashsize
= -bios_size
;
247 bd
.bi_flashoffset
= 0;
248 bd
.bi_sramstart
= 0xFFF00000;
249 bd
.bi_sramsize
= sram_size
;
251 bd
.bi_intfreq
= 133333333;
252 bd
.bi_busfreq
= 33333333;
253 bd
.bi_baudrate
= 115200;
254 bd
.bi_s_version
[0] = 'Q';
255 bd
.bi_s_version
[1] = 'M';
256 bd
.bi_s_version
[2] = 'U';
257 bd
.bi_s_version
[3] = '\0';
258 bd
.bi_r_version
[0] = 'Q';
259 bd
.bi_r_version
[1] = 'E';
260 bd
.bi_r_version
[2] = 'M';
261 bd
.bi_r_version
[3] = 'U';
262 bd
.bi_r_version
[4] = '\0';
263 bd
.bi_procfreq
= 133333333;
264 bd
.bi_plb_busfreq
= 33333333;
265 bd
.bi_pci_busfreq
= 33333333;
266 bd
.bi_opbfreq
= 33333333;
267 bdloc
= ppc405_set_bootinfo(env
, &bd
, 0x00000001);
269 kernel_base
= KERNEL_LOAD_ADDR
;
270 /* now we can load the kernel */
271 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
272 machine
->ram_size
- kernel_base
);
273 if (kernel_size
< 0) {
274 error_report("could not load kernel '%s'", kernel_filename
);
277 printf("Load kernel size %ld at " TARGET_FMT_lx
,
278 kernel_size
, kernel_base
);
280 if (initrd_filename
) {
281 initrd_base
= INITRD_LOAD_ADDR
;
282 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
283 machine
->ram_size
- initrd_base
);
284 if (initrd_size
< 0) {
285 error_report("could not load initial ram disk '%s'",
293 env
->gpr
[4] = initrd_base
;
294 env
->gpr
[5] = initrd_size
;
295 if (kernel_cmdline
!= NULL
) {
296 len
= strlen(kernel_cmdline
);
297 bdloc
-= ((len
+ 255) & ~255);
298 cpu_physical_memory_write(bdloc
, kernel_cmdline
, len
+ 1);
300 env
->gpr
[7] = bdloc
+ len
;
305 env
->nip
= KERNEL_LOAD_ADDR
;
315 static void ref405ep_class_init(ObjectClass
*oc
, void *data
)
317 MachineClass
*mc
= MACHINE_CLASS(oc
);
319 mc
->desc
= "ref405ep";
320 mc
->init
= ref405ep_init
;
321 mc
->default_ram_size
= 0x08000000;
322 mc
->default_ram_id
= "ef405ep.ram";
325 static const TypeInfo ref405ep_type
= {
326 .name
= MACHINE_TYPE_NAME("ref405ep"),
327 .parent
= TYPE_MACHINE
,
328 .class_init
= ref405ep_class_init
,
331 /*****************************************************************************/
332 /* AMCC Taihu evaluation board */
333 /* - PowerPC 405EP processor
334 * - SDRAM 128 MB at 0x00000000
335 * - Boot flash 2 MB at 0xFFE00000
336 * - Application flash 32 MB at 0xFC000000
339 * - 1 USB 1.1 device 0x50000000
340 * - 1 LCD display 0x50100000
341 * - 1 CPLD 0x50100000
343 * - 1 I2C thermal sensor
345 * - bit-bang SPI port using GPIOs
346 * - 1 EBC interface connector 0 0x50200000
347 * - 1 cardbus controller + expansion slot.
348 * - 1 PCI expansion slot.
350 typedef struct taihu_cpld_t taihu_cpld_t
;
351 struct taihu_cpld_t
{
356 static uint64_t taihu_cpld_read(void *opaque
, hwaddr addr
, unsigned size
)
377 static void taihu_cpld_write(void *opaque
, hwaddr addr
,
378 uint64_t value
, unsigned size
)
395 static const MemoryRegionOps taihu_cpld_ops
= {
396 .read
= taihu_cpld_read
,
397 .write
= taihu_cpld_write
,
399 .min_access_size
= 1,
400 .max_access_size
= 1,
402 .endianness
= DEVICE_NATIVE_ENDIAN
,
405 static void taihu_cpld_reset (void *opaque
)
414 static void taihu_cpld_init(MemoryRegion
*sysmem
, uint32_t base
)
417 MemoryRegion
*cpld_memory
= g_new(MemoryRegion
, 1);
419 cpld
= g_malloc0(sizeof(taihu_cpld_t
));
420 memory_region_init_io(cpld_memory
, NULL
, &taihu_cpld_ops
, cpld
, "cpld", 0x100);
421 memory_region_add_subregion(sysmem
, base
, cpld_memory
);
422 qemu_register_reset(&taihu_cpld_reset
, cpld
);
425 static void taihu_405ep_init(MachineState
*machine
)
427 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
428 const char *kernel_filename
= machine
->kernel_filename
;
429 const char *initrd_filename
= machine
->initrd_filename
;
432 MemoryRegion
*sysmem
= get_system_memory();
434 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
435 hwaddr ram_bases
[2], ram_sizes
[2];
437 target_ulong kernel_base
, initrd_base
;
438 long kernel_size
, initrd_size
;
443 if (machine
->ram_size
!= mc
->default_ram_size
) {
444 char *sz
= size_to_str(mc
->default_ram_size
);
445 error_report("Invalid RAM size, should be %s", sz
);
451 ram_sizes
[0] = 0x04000000;
452 memory_region_init_alias(&ram_memories
[0], NULL
,
453 "taihu_405ep.ram-0", machine
->ram
, ram_bases
[0],
455 ram_bases
[1] = 0x04000000;
456 ram_sizes
[1] = 0x04000000;
457 memory_region_init_alias(&ram_memories
[1], NULL
,
458 "taihu_405ep.ram-1", machine
->ram
, ram_bases
[1],
460 ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
461 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
462 /* allocate and load BIOS */
464 #if defined(USE_FLASH_BIOS)
465 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
468 pflash_cfi02_register(0xFFE00000,
469 "taihu_405ep.bios", bios_size
,
470 blk_by_legacy_dinfo(dinfo
),
472 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
478 if (bios_name
== NULL
)
479 bios_name
= BIOS_FILENAME
;
480 bios
= g_new(MemoryRegion
, 1);
481 memory_region_init_rom(bios
, NULL
, "taihu_405ep.bios", BIOS_SIZE
,
483 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
485 bios_size
= load_image_size(filename
,
486 memory_region_get_ram_ptr(bios
),
490 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
493 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
494 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
495 } else if (!qtest_enabled()) {
496 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
500 /* Register Linux flash */
501 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
503 bios_size
= 32 * MiB
;
504 pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size
,
505 blk_by_legacy_dinfo(dinfo
),
507 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
511 /* Register CLPD & LCD display */
512 taihu_cpld_init(sysmem
, 0x50100000);
514 linux_boot
= (kernel_filename
!= NULL
);
516 kernel_base
= KERNEL_LOAD_ADDR
;
517 /* now we can load the kernel */
518 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
519 machine
->ram_size
- kernel_base
);
520 if (kernel_size
< 0) {
521 error_report("could not load kernel '%s'", kernel_filename
);
525 if (initrd_filename
) {
526 initrd_base
= INITRD_LOAD_ADDR
;
527 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
528 machine
->ram_size
- initrd_base
);
529 if (initrd_size
< 0) {
530 error_report("could not load initial ram disk '%s'",
546 static void taihu_class_init(ObjectClass
*oc
, void *data
)
548 MachineClass
*mc
= MACHINE_CLASS(oc
);
551 mc
->init
= taihu_405ep_init
;
552 mc
->default_ram_size
= 0x08000000;
553 mc
->default_ram_id
= "taihu_405ep.ram";
556 static const TypeInfo taihu_type
= {
557 .name
= MACHINE_TYPE_NAME("taihu"),
558 .parent
= TYPE_MACHINE
,
559 .class_init
= taihu_class_init
,
562 static void ppc405_machine_init(void)
564 type_register_static(&ref405ep_type
);
565 type_register_static(&taihu_type
);
568 type_init(ppc405_machine_init
)