include/hw/arm/virt.h

   1 /*
   2  *
   3  * Copyright (c) 2015 Linaro Limited
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2 or later, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  *
  17  * Emulate a virtual board which works by passing Linux all the information
  18  * it needs about what devices are present via the device tree.
  19  * There are some restrictions about what we can do here:
  20  *  + we can only present devices whose Linux drivers will work based
  21  *    purely on the device tree with no platform data at all
  22  *  + we want to present a very stripped-down minimalist platform,
  23  *    both because this reduces the security attack surface from the guest
  24  *    and also because it reduces our exposure to being broken when
  25  *    the kernel updates its device tree bindings and requires further
  26  *    information in a device binding that we aren't providing.
  27  * This is essentially the same approach kvmtool uses.
  28  */
  29
  30 #ifndef QEMU_ARM_VIRT_H
  31 #define QEMU_ARM_VIRT_H
  32
  33 #include "exec/hwaddr.h"
  34 #include "qemu/notify.h"
  35 #include "hw/boards.h"
  36 #include "hw/arm/boot.h"
  37 #include "hw/block/flash.h"
  38 #include "sysemu/kvm.h"
  39 #include "hw/intc/arm_gicv3_common.h"
  40
  41 #define NUM_GICV2M_SPIS       64
  42 #define NUM_VIRTIO_TRANSPORTS 32
  43 #define NUM_SMMU_IRQS          4
  44
  45 #define ARCH_GIC_MAINT_IRQ  9
  46
  47 #define ARCH_TIMER_VIRT_IRQ   11
  48 #define ARCH_TIMER_S_EL1_IRQ  13
  49 #define ARCH_TIMER_NS_EL1_IRQ 14
  50 #define ARCH_TIMER_NS_EL2_IRQ 10
  51
  52 #define VIRTUAL_PMU_IRQ 7
  53
  54 #define PPI(irq) ((irq) + 16)
  55
  56 enum {
  57     VIRT_FLASH,
  58     VIRT_MEM,
  59     VIRT_CPUPERIPHS,
  60     VIRT_GIC_DIST,
  61     VIRT_GIC_CPU,
  62     VIRT_GIC_V2M,
  63     VIRT_GIC_HYP,
  64     VIRT_GIC_VCPU,
  65     VIRT_GIC_ITS,
  66     VIRT_GIC_REDIST,
  67     VIRT_SMMU,
  68     VIRT_UART,
  69     VIRT_MMIO,
  70     VIRT_RTC,
  71     VIRT_FW_CFG,
  72     VIRT_PCIE,
  73     VIRT_PCIE_MMIO,
  74     VIRT_PCIE_PIO,
  75     VIRT_PCIE_ECAM,
  76     VIRT_PLATFORM_BUS,
  77     VIRT_GPIO,
  78     VIRT_SECURE_UART,
  79     VIRT_SECURE_MEM,
  80     VIRT_PCDIMM_ACPI,
  81     VIRT_ACPI_GED,
  82     VIRT_LOWMEMMAP_LAST,
  83 };
  84
  85 /* indices of IO regions located after the RAM */
  86 enum {
  87     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
  88     VIRT_HIGH_PCIE_ECAM,
  89     VIRT_HIGH_PCIE_MMIO,
  90 };
  91
  92 typedef enum VirtIOMMUType {
  93     VIRT_IOMMU_NONE,
  94     VIRT_IOMMU_SMMUV3,
  95     VIRT_IOMMU_VIRTIO,
  96 } VirtIOMMUType;
  97
  98 typedef struct MemMapEntry {
  99     hwaddr base;
 100     hwaddr size;
 101 } MemMapEntry;
 102
 103 typedef struct {
 104     MachineClass parent;
 105     bool disallow_affinity_adjustment;
 106     bool no_its;
 107     bool no_pmu;
 108     bool claim_edge_triggered_timers;
 109     bool smbios_old_sys_ver;
 110     bool no_highmem_ecam;
 111     bool no_ged;   /* Machines < 4.2 has no support for ACPI GED device */
 112     bool kvm_no_adjvtime;
 113 } VirtMachineClass;
 114
 115 typedef struct {
 116     MachineState parent;
 117     Notifier machine_done;
 118     DeviceState *platform_bus_dev;
 119     FWCfgState *fw_cfg;
 120     PFlashCFI01 *flash[2];
 121     bool secure;
 122     bool highmem;
 123     bool highmem_ecam;
 124     bool its;
 125     bool virt;
 126     int32_t gic_version;
 127     VirtIOMMUType iommu;
 128     struct arm_boot_info bootinfo;
 129     MemMapEntry *memmap;
 130     const int *irqmap;
 131     int smp_cpus;
 132     void *fdt;
 133     int fdt_size;
 134     uint32_t clock_phandle;
 135     uint32_t gic_phandle;
 136     uint32_t msi_phandle;
 137     uint32_t iommu_phandle;
 138     int psci_conduit;
 139     hwaddr highest_gpa;
 140     DeviceState *gic;
 141     DeviceState *acpi_dev;
 142     Notifier powerdown_notifier;
 143 } VirtMachineState;
 144
 145 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
 146
 147 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
 148 #define VIRT_MACHINE(obj) \
 149     OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
 150 #define VIRT_MACHINE_GET_CLASS(obj) \
 151     OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
 152 #define VIRT_MACHINE_CLASS(klass) \
 153     OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
 154
 155 void virt_acpi_setup(VirtMachineState *vms);
 156
 157 /* Return the number of used redistributor regions  */
 158 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
 159 {
 160     uint32_t redist0_capacity =
 161                 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
 162
 163     assert(vms->gic_version == 3);
 164
 165     return vms->smp_cpus > redist0_capacity ? 2 : 1;
 166 }
 167
 168 #endif /* QEMU_ARM_VIRT_H */