util/cacheflush.c

   1 /*
   2  * Flush the host cpu caches.
   3  *
   4  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   5  * See the COPYING file in the top-level directory.
   6  */
   7
   8 #include "qemu/osdep.h"
   9 #include "qemu/cacheflush.h"
  10
  11
  12 #if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
  13
  14 /* Caches are coherent and do not require flushing; symbol inline. */
  15
  16 #elif defined(__mips__)
  17
  18 #ifdef __OpenBSD__
  19 #include <machine/sysarch.h>
  20 #else
  21 #include <sys/cachectl.h>
  22 #endif
  23
  24 void flush_icache_range(uintptr_t start, uintptr_t stop)
  25 {
  26     cacheflush((void *)start, stop - start, ICACHE);
  27 }
  28
  29 #elif defined(__powerpc__)
  30
  31 void flush_icache_range(uintptr_t start, uintptr_t stop)
  32 {
  33     uintptr_t p, start1, stop1;
  34     size_t dsize = qemu_dcache_linesize;
  35     size_t isize = qemu_icache_linesize;
  36
  37     start1 = start & ~(dsize - 1);
  38     stop1 = (stop + dsize - 1) & ~(dsize - 1);
  39     for (p = start1; p < stop1; p += dsize) {
  40         asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
  41     }
  42     asm volatile ("sync" : : : "memory");
  43
  44     start &= start & ~(isize - 1);
  45     stop1 = (stop + isize - 1) & ~(isize - 1);
  46     for (p = start1; p < stop1; p += isize) {
  47         asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
  48     }
  49     asm volatile ("sync" : : : "memory");
  50     asm volatile ("isync" : : : "memory");
  51 }
  52
  53 #elif defined(__sparc__)
  54
  55 void flush_icache_range(uintptr_t start, uintptr_t stop)
  56 {
  57     uintptr_t p;
  58
  59     for (p = start & -8; p < ((stop + 7) & -8); p += 8) {
  60         __asm__ __volatile__("flush\t%0" : : "r" (p));
  61     }
  62 }
  63
  64 #else
  65
  66 void flush_icache_range(uintptr_t start, uintptr_t stop)
  67 {
  68     __builtin___clear_cache((char *)start, (char *)stop);
  69 }
  70
  71 #endif