2 * s390 PCI instructions
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
17 #include "s390-pci-inst.h"
18 #include "s390-pci-bus.h"
19 #include "exec/memory-internal.h"
20 #include "qemu/error-report.h"
21 #include "sysemu/hw_accel.h"
23 #ifndef DEBUG_S390PCI_INST
24 #define DEBUG_S390PCI_INST 0
27 #define DPRINTF(fmt, ...) \
29 if (DEBUG_S390PCI_INST) { \
30 fprintf(stderr, "s390pci-inst: " fmt, ## __VA_ARGS__); \
34 static void s390_set_status_code(CPUS390XState
*env
,
35 uint8_t r
, uint64_t status_code
)
37 env
->regs
[r
] &= ~0xff000000ULL
;
38 env
->regs
[r
] |= (status_code
& 0xff) << 24;
41 static int list_pci(ClpReqRspListPci
*rrb
, uint8_t *cc
)
43 S390PCIBusDevice
*pbdev
= NULL
;
44 S390pciState
*s
= s390_get_phb();
45 uint32_t res_code
, initial_l2
, g_l2
;
47 uint64_t resume_token
;
50 if (lduw_p(&rrb
->request
.hdr
.len
) != 32) {
51 res_code
= CLP_RC_LEN
;
56 if ((ldl_p(&rrb
->request
.fmt
) & CLP_MASK_FMT
) != 0) {
57 res_code
= CLP_RC_FMT
;
62 if ((ldl_p(&rrb
->request
.fmt
) & ~CLP_MASK_FMT
) != 0 ||
63 ldq_p(&rrb
->request
.reserved1
) != 0) {
64 res_code
= CLP_RC_RESNOT0
;
69 resume_token
= ldq_p(&rrb
->request
.resume_token
);
72 pbdev
= s390_pci_find_dev_by_idx(s
, resume_token
);
74 res_code
= CLP_RC_LISTPCI_BADRT
;
79 pbdev
= s390_pci_find_next_avail_dev(s
, NULL
);
82 if (lduw_p(&rrb
->response
.hdr
.len
) < 48) {
88 initial_l2
= lduw_p(&rrb
->response
.hdr
.len
);
89 if ((initial_l2
- LIST_PCI_HDR_LEN
) % sizeof(ClpFhListEntry
)
91 res_code
= CLP_RC_LEN
;
97 stl_p(&rrb
->response
.fmt
, 0);
98 stq_p(&rrb
->response
.reserved1
, 0);
99 stl_p(&rrb
->response
.mdd
, FH_MASK_SHM
);
100 stw_p(&rrb
->response
.max_fn
, PCI_MAX_FUNCTIONS
);
101 rrb
->response
.flags
= UID_CHECKING_ENABLED
;
102 rrb
->response
.entry_size
= sizeof(ClpFhListEntry
);
105 g_l2
= LIST_PCI_HDR_LEN
;
106 while (g_l2
< initial_l2
&& pbdev
) {
107 stw_p(&rrb
->response
.fh_list
[i
].device_id
,
108 pci_get_word(pbdev
->pdev
->config
+ PCI_DEVICE_ID
));
109 stw_p(&rrb
->response
.fh_list
[i
].vendor_id
,
110 pci_get_word(pbdev
->pdev
->config
+ PCI_VENDOR_ID
));
111 /* Ignore RESERVED devices. */
112 stl_p(&rrb
->response
.fh_list
[i
].config
,
113 pbdev
->state
== ZPCI_FS_STANDBY
? 0 : 1 << 31);
114 stl_p(&rrb
->response
.fh_list
[i
].fid
, pbdev
->fid
);
115 stl_p(&rrb
->response
.fh_list
[i
].fh
, pbdev
->fh
);
117 g_l2
+= sizeof(ClpFhListEntry
);
118 /* Add endian check for DPRINTF? */
119 DPRINTF("g_l2 %d vendor id 0x%x device id 0x%x fid 0x%x fh 0x%x\n",
121 lduw_p(&rrb
->response
.fh_list
[i
].vendor_id
),
122 lduw_p(&rrb
->response
.fh_list
[i
].device_id
),
123 ldl_p(&rrb
->response
.fh_list
[i
].fid
),
124 ldl_p(&rrb
->response
.fh_list
[i
].fh
));
125 pbdev
= s390_pci_find_next_avail_dev(s
, pbdev
);
132 resume_token
= pbdev
->fh
& FH_MASK_INDEX
;
134 stq_p(&rrb
->response
.resume_token
, resume_token
);
135 stw_p(&rrb
->response
.hdr
.len
, g_l2
);
136 stw_p(&rrb
->response
.hdr
.rsp
, CLP_RC_OK
);
139 DPRINTF("list pci failed rc 0x%x\n", rc
);
140 stw_p(&rrb
->response
.hdr
.rsp
, res_code
);
145 int clp_service_call(S390CPU
*cpu
, uint8_t r2
)
149 S390PCIBusDevice
*pbdev
;
152 uint8_t buffer
[4096 * 2];
154 CPUS390XState
*env
= &cpu
->env
;
155 S390pciState
*s
= s390_get_phb();
158 cpu_synchronize_state(CPU(cpu
));
160 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
161 program_interrupt(env
, PGM_PRIVILEGED
, 4);
165 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
, sizeof(*reqh
))) {
168 reqh
= (ClpReqHdr
*)buffer
;
169 req_len
= lduw_p(&reqh
->len
);
170 if (req_len
< 16 || req_len
> 8184 || (req_len
% 8 != 0)) {
171 program_interrupt(env
, PGM_OPERAND
, 4);
175 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
,
176 req_len
+ sizeof(*resh
))) {
179 resh
= (ClpRspHdr
*)(buffer
+ req_len
);
180 res_len
= lduw_p(&resh
->len
);
181 if (res_len
< 8 || res_len
> 8176 || (res_len
% 8 != 0)) {
182 program_interrupt(env
, PGM_OPERAND
, 4);
185 if ((req_len
+ res_len
) > 8192) {
186 program_interrupt(env
, PGM_OPERAND
, 4);
190 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
,
191 req_len
+ res_len
)) {
196 stw_p(&resh
->rsp
, CLP_RC_LEN
);
200 switch (lduw_p(&reqh
->cmd
)) {
202 ClpReqRspListPci
*rrb
= (ClpReqRspListPci
*)buffer
;
206 case CLP_SET_PCI_FN
: {
207 ClpReqSetPci
*reqsetpci
= (ClpReqSetPci
*)reqh
;
208 ClpRspSetPci
*ressetpci
= (ClpRspSetPci
*)resh
;
210 pbdev
= s390_pci_find_dev_by_fh(s
, ldl_p(&reqsetpci
->fh
));
212 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FH
);
216 switch (reqsetpci
->oc
) {
217 case CLP_SET_ENABLE_PCI_FN
:
218 switch (reqsetpci
->ndas
) {
220 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_DMAAS
);
225 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_RES
);
229 if (pbdev
->fh
& FH_MASK_ENABLE
) {
230 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
234 pbdev
->fh
|= FH_MASK_ENABLE
;
235 pbdev
->state
= ZPCI_FS_ENABLED
;
236 stl_p(&ressetpci
->fh
, pbdev
->fh
);
237 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_OK
);
239 case CLP_SET_DISABLE_PCI_FN
:
240 if (!(pbdev
->fh
& FH_MASK_ENABLE
)) {
241 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
244 device_reset(DEVICE(pbdev
));
245 pbdev
->fh
&= ~FH_MASK_ENABLE
;
246 pbdev
->state
= ZPCI_FS_DISABLED
;
247 stl_p(&ressetpci
->fh
, pbdev
->fh
);
248 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_OK
);
251 DPRINTF("unknown set pci command\n");
252 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
257 case CLP_QUERY_PCI_FN
: {
258 ClpReqQueryPci
*reqquery
= (ClpReqQueryPci
*)reqh
;
259 ClpRspQueryPci
*resquery
= (ClpRspQueryPci
*)resh
;
261 pbdev
= s390_pci_find_dev_by_fh(s
, ldl_p(&reqquery
->fh
));
263 DPRINTF("query pci no pci dev\n");
264 stw_p(&resquery
->hdr
.rsp
, CLP_RC_SETPCIFN_FH
);
268 for (i
= 0; i
< PCI_BAR_COUNT
; i
++) {
269 uint32_t data
= pci_get_long(pbdev
->pdev
->config
+
270 PCI_BASE_ADDRESS_0
+ (i
* 4));
272 stl_p(&resquery
->bar
[i
], data
);
273 resquery
->bar_size
[i
] = pbdev
->pdev
->io_regions
[i
].size
?
274 ctz64(pbdev
->pdev
->io_regions
[i
].size
) : 0;
275 DPRINTF("bar %d addr 0x%x size 0x%" PRIx64
"barsize 0x%x\n", i
,
276 ldl_p(&resquery
->bar
[i
]),
277 pbdev
->pdev
->io_regions
[i
].size
,
278 resquery
->bar_size
[i
]);
281 stq_p(&resquery
->sdma
, ZPCI_SDMA_ADDR
);
282 stq_p(&resquery
->edma
, ZPCI_EDMA_ADDR
);
283 stl_p(&resquery
->fid
, pbdev
->fid
);
284 stw_p(&resquery
->pchid
, 0);
285 stw_p(&resquery
->ug
, 1);
286 stl_p(&resquery
->uid
, pbdev
->uid
);
287 stw_p(&resquery
->hdr
.rsp
, CLP_RC_OK
);
290 case CLP_QUERY_PCI_FNGRP
: {
291 ClpRspQueryPciGrp
*resgrp
= (ClpRspQueryPciGrp
*)resh
;
293 stq_p(&resgrp
->dasm
, 0);
294 stq_p(&resgrp
->msia
, ZPCI_MSI_ADDR
);
295 stw_p(&resgrp
->mui
, 0);
296 stw_p(&resgrp
->i
, 128);
299 stw_p(&resgrp
->hdr
.rsp
, CLP_RC_OK
);
303 DPRINTF("unknown clp command\n");
304 stw_p(&resh
->rsp
, CLP_RC_CMD
);
309 if (s390_cpu_virt_mem_write(cpu
, env
->regs
[r2
], r2
, buffer
,
310 req_len
+ res_len
)) {
317 int pcilg_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
)
319 CPUS390XState
*env
= &cpu
->env
;
320 S390PCIBusDevice
*pbdev
;
329 cpu_synchronize_state(CPU(cpu
));
331 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
332 program_interrupt(env
, PGM_PRIVILEGED
, 4);
337 program_interrupt(env
, PGM_SPECIFICATION
, 4);
341 fh
= env
->regs
[r2
] >> 32;
342 pcias
= (env
->regs
[r2
] >> 16) & 0xf;
343 len
= env
->regs
[r2
] & 0xf;
344 offset
= env
->regs
[r2
+ 1];
346 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
348 DPRINTF("pcilg no pci dev\n");
349 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
353 switch (pbdev
->state
) {
354 case ZPCI_FS_RESERVED
:
355 case ZPCI_FS_STANDBY
:
356 case ZPCI_FS_DISABLED
:
357 case ZPCI_FS_PERMANENT_ERROR
:
358 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
361 setcc(cpu
, ZPCI_PCI_LS_ERR
);
362 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_BLOCKED
);
369 if ((8 - (offset
& 0x7)) < len
) {
370 program_interrupt(env
, PGM_OPERAND
, 4);
373 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
374 result
= memory_region_dispatch_read(mr
, offset
, &data
, len
,
375 MEMTXATTRS_UNSPECIFIED
);
376 if (result
!= MEMTX_OK
) {
377 program_interrupt(env
, PGM_OPERAND
, 4);
380 } else if (pcias
== 15) {
381 if ((4 - (offset
& 0x3)) < len
) {
382 program_interrupt(env
, PGM_OPERAND
, 4);
385 data
= pci_host_config_read_common(
386 pbdev
->pdev
, offset
, pci_config_size(pbdev
->pdev
), len
);
392 data
= bswap16(data
);
395 data
= bswap32(data
);
398 data
= bswap64(data
);
401 program_interrupt(env
, PGM_OPERAND
, 4);
405 DPRINTF("invalid space\n");
406 setcc(cpu
, ZPCI_PCI_LS_ERR
);
407 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_INVAL_AS
);
411 env
->regs
[r1
] = data
;
412 setcc(cpu
, ZPCI_PCI_LS_OK
);
416 static void update_msix_table_msg_data(S390PCIBusDevice
*pbdev
, uint64_t offset
,
417 uint64_t *data
, uint8_t len
)
422 if (offset
% PCI_MSIX_ENTRY_SIZE
!= 8) {
427 DPRINTF("access msix table msg data but len is %d\n", len
);
431 msg_data
= (uint8_t *)data
- offset
% PCI_MSIX_ENTRY_SIZE
+
432 PCI_MSIX_ENTRY_VECTOR_CTRL
;
433 val
= pci_get_long(msg_data
) |
434 ((pbdev
->fh
& FH_MASK_INDEX
) << ZPCI_MSI_VEC_BITS
);
435 pci_set_long(msg_data
, val
);
436 DPRINTF("update msix msg_data to 0x%" PRIx64
"\n", *data
);
439 static int trap_msix(S390PCIBusDevice
*pbdev
, uint64_t offset
, uint8_t pcias
)
441 if (pbdev
->msix
.available
&& pbdev
->msix
.table_bar
== pcias
&&
442 offset
>= pbdev
->msix
.table_offset
&&
443 offset
<= pbdev
->msix
.table_offset
+
444 (pbdev
->msix
.entries
- 1) * PCI_MSIX_ENTRY_SIZE
) {
451 int pcistg_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
)
453 CPUS390XState
*env
= &cpu
->env
;
454 uint64_t offset
, data
;
455 S390PCIBusDevice
*pbdev
;
462 cpu_synchronize_state(CPU(cpu
));
464 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
465 program_interrupt(env
, PGM_PRIVILEGED
, 4);
470 program_interrupt(env
, PGM_SPECIFICATION
, 4);
474 fh
= env
->regs
[r2
] >> 32;
475 pcias
= (env
->regs
[r2
] >> 16) & 0xf;
476 len
= env
->regs
[r2
] & 0xf;
477 offset
= env
->regs
[r2
+ 1];
479 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
481 DPRINTF("pcistg no pci dev\n");
482 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
486 switch (pbdev
->state
) {
487 case ZPCI_FS_RESERVED
:
488 case ZPCI_FS_STANDBY
:
489 case ZPCI_FS_DISABLED
:
490 case ZPCI_FS_PERMANENT_ERROR
:
491 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
494 setcc(cpu
, ZPCI_PCI_LS_ERR
);
495 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_BLOCKED
);
501 data
= env
->regs
[r1
];
503 if ((8 - (offset
& 0x7)) < len
) {
504 program_interrupt(env
, PGM_OPERAND
, 4);
508 if (trap_msix(pbdev
, offset
, pcias
)) {
509 offset
= offset
- pbdev
->msix
.table_offset
;
510 mr
= &pbdev
->pdev
->msix_table_mmio
;
511 update_msix_table_msg_data(pbdev
, offset
, &data
, len
);
513 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
516 result
= memory_region_dispatch_write(mr
, offset
, data
, len
,
517 MEMTXATTRS_UNSPECIFIED
);
518 if (result
!= MEMTX_OK
) {
519 program_interrupt(env
, PGM_OPERAND
, 4);
522 } else if (pcias
== 15) {
523 if ((4 - (offset
& 0x3)) < len
) {
524 program_interrupt(env
, PGM_OPERAND
, 4);
531 data
= bswap16(data
);
534 data
= bswap32(data
);
537 data
= bswap64(data
);
540 program_interrupt(env
, PGM_OPERAND
, 4);
544 pci_host_config_write_common(pbdev
->pdev
, offset
,
545 pci_config_size(pbdev
->pdev
),
548 DPRINTF("pcistg invalid space\n");
549 setcc(cpu
, ZPCI_PCI_LS_ERR
);
550 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_INVAL_AS
);
554 setcc(cpu
, ZPCI_PCI_LS_OK
);
558 int rpcit_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
)
560 CPUS390XState
*env
= &cpu
->env
;
562 S390PCIBusDevice
*pbdev
;
568 cpu_synchronize_state(CPU(cpu
));
570 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
571 program_interrupt(env
, PGM_PRIVILEGED
, 4);
576 program_interrupt(env
, PGM_SPECIFICATION
, 4);
580 fh
= env
->regs
[r1
] >> 32;
581 start
= env
->regs
[r2
];
582 end
= start
+ env
->regs
[r2
+ 1];
584 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
586 DPRINTF("rpcit no pci dev\n");
587 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
591 switch (pbdev
->state
) {
592 case ZPCI_FS_RESERVED
:
593 case ZPCI_FS_STANDBY
:
594 case ZPCI_FS_DISABLED
:
595 case ZPCI_FS_PERMANENT_ERROR
:
596 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
599 setcc(cpu
, ZPCI_PCI_LS_ERR
);
600 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_ERROR_RECOVER
);
606 iommu
= pbdev
->iommu
;
607 if (!iommu
->g_iota
) {
608 pbdev
->state
= ZPCI_FS_ERROR
;
609 setcc(cpu
, ZPCI_PCI_LS_ERR
);
610 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
611 s390_pci_generate_error_event(ERR_EVENT_INVALAS
, pbdev
->fh
, pbdev
->fid
,
616 if (end
< iommu
->pba
|| start
> iommu
->pal
) {
617 pbdev
->state
= ZPCI_FS_ERROR
;
618 setcc(cpu
, ZPCI_PCI_LS_ERR
);
619 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
620 s390_pci_generate_error_event(ERR_EVENT_OORANGE
, pbdev
->fh
, pbdev
->fid
,
625 mr
= &iommu
->iommu_mr
;
626 while (start
< end
) {
627 entry
= mr
->iommu_ops
->translate(mr
, start
, 0);
629 if (!entry
.translated_addr
) {
630 pbdev
->state
= ZPCI_FS_ERROR
;
631 setcc(cpu
, ZPCI_PCI_LS_ERR
);
632 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
633 s390_pci_generate_error_event(ERR_EVENT_SERR
, pbdev
->fh
, pbdev
->fid
,
634 start
, ERR_EVENT_Q_BIT
);
638 memory_region_notify_iommu(mr
, entry
);
639 start
+= entry
.addr_mask
+ 1;
642 setcc(cpu
, ZPCI_PCI_LS_OK
);
647 int pcistb_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r3
, uint64_t gaddr
,
650 CPUS390XState
*env
= &cpu
->env
;
651 S390PCIBusDevice
*pbdev
;
660 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
661 program_interrupt(env
, PGM_PRIVILEGED
, 6);
665 fh
= env
->regs
[r1
] >> 32;
666 pcias
= (env
->regs
[r1
] >> 16) & 0xf;
667 len
= env
->regs
[r1
] & 0xff;
670 DPRINTF("pcistb invalid space\n");
671 setcc(cpu
, ZPCI_PCI_LS_ERR
);
672 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INVAL_AS
);
683 program_interrupt(env
, PGM_SPECIFICATION
, 6);
687 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
689 DPRINTF("pcistb no pci dev fh 0x%x\n", fh
);
690 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
694 switch (pbdev
->state
) {
695 case ZPCI_FS_RESERVED
:
696 case ZPCI_FS_STANDBY
:
697 case ZPCI_FS_DISABLED
:
698 case ZPCI_FS_PERMANENT_ERROR
:
699 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
702 setcc(cpu
, ZPCI_PCI_LS_ERR
);
703 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_BLOCKED
);
709 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
710 if (!memory_region_access_valid(mr
, env
->regs
[r3
], len
, true)) {
711 program_interrupt(env
, PGM_OPERAND
, 6);
715 if (s390_cpu_virt_mem_read(cpu
, gaddr
, ar
, buffer
, len
)) {
719 for (i
= 0; i
< len
/ 8; i
++) {
720 result
= memory_region_dispatch_write(mr
, env
->regs
[r3
] + i
* 8,
721 ldq_p(buffer
+ i
* 8), 8,
722 MEMTXATTRS_UNSPECIFIED
);
723 if (result
!= MEMTX_OK
) {
724 program_interrupt(env
, PGM_OPERAND
, 6);
729 setcc(cpu
, ZPCI_PCI_LS_OK
);
733 static int reg_irqs(CPUS390XState
*env
, S390PCIBusDevice
*pbdev
, ZpciFib fib
)
736 uint8_t isc
= FIB_DATA_ISC(ldl_p(&fib
.data
));
738 pbdev
->routes
.adapter
.adapter_id
= css_get_adapter_id(
739 CSS_IO_ADAPTER_PCI
, isc
);
740 pbdev
->summary_ind
= get_indicator(ldq_p(&fib
.aisb
), sizeof(uint64_t));
741 len
= BITS_TO_LONGS(FIB_DATA_NOI(ldl_p(&fib
.data
))) * sizeof(unsigned long);
742 pbdev
->indicator
= get_indicator(ldq_p(&fib
.aibv
), len
);
744 ret
= map_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
749 ret
= map_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
754 pbdev
->routes
.adapter
.summary_addr
= ldq_p(&fib
.aisb
);
755 pbdev
->routes
.adapter
.summary_offset
= FIB_DATA_AISBO(ldl_p(&fib
.data
));
756 pbdev
->routes
.adapter
.ind_addr
= ldq_p(&fib
.aibv
);
757 pbdev
->routes
.adapter
.ind_offset
= FIB_DATA_AIBVO(ldl_p(&fib
.data
));
759 pbdev
->noi
= FIB_DATA_NOI(ldl_p(&fib
.data
));
760 pbdev
->sum
= FIB_DATA_SUM(ldl_p(&fib
.data
));
762 DPRINTF("reg_irqs adapter id %d\n", pbdev
->routes
.adapter
.adapter_id
);
765 release_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
766 release_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
767 pbdev
->summary_ind
= NULL
;
768 pbdev
->indicator
= NULL
;
772 int pci_dereg_irqs(S390PCIBusDevice
*pbdev
)
774 release_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
775 release_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
777 pbdev
->summary_ind
= NULL
;
778 pbdev
->indicator
= NULL
;
779 pbdev
->routes
.adapter
.summary_addr
= 0;
780 pbdev
->routes
.adapter
.summary_offset
= 0;
781 pbdev
->routes
.adapter
.ind_addr
= 0;
782 pbdev
->routes
.adapter
.ind_offset
= 0;
787 DPRINTF("dereg_irqs adapter id %d\n", pbdev
->routes
.adapter
.adapter_id
);
791 static int reg_ioat(CPUS390XState
*env
, S390PCIIOMMU
*iommu
, ZpciFib fib
)
793 uint64_t pba
= ldq_p(&fib
.pba
);
794 uint64_t pal
= ldq_p(&fib
.pal
);
795 uint64_t g_iota
= ldq_p(&fib
.iota
);
796 uint8_t dt
= (g_iota
>> 2) & 0x7;
797 uint8_t t
= (g_iota
>> 11) & 0x1;
799 if (pba
> pal
|| pba
< ZPCI_SDMA_ADDR
|| pal
> ZPCI_EDMA_ADDR
) {
800 program_interrupt(env
, PGM_OPERAND
, 6);
804 /* currently we only support designation type 1 with translation */
805 if (!(dt
== ZPCI_IOTA_RTTO
&& t
)) {
806 error_report("unsupported ioat dt %d t %d", dt
, t
);
807 program_interrupt(env
, PGM_OPERAND
, 6);
813 iommu
->g_iota
= g_iota
;
815 s390_pci_iommu_enable(iommu
);
820 void pci_dereg_ioat(S390PCIIOMMU
*iommu
)
822 s390_pci_iommu_disable(iommu
);
828 int mpcifc_service_call(S390CPU
*cpu
, uint8_t r1
, uint64_t fiba
, uint8_t ar
)
830 CPUS390XState
*env
= &cpu
->env
;
834 S390PCIBusDevice
*pbdev
;
835 uint64_t cc
= ZPCI_PCI_LS_OK
;
837 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
838 program_interrupt(env
, PGM_PRIVILEGED
, 6);
842 oc
= env
->regs
[r1
] & 0xff;
843 dmaas
= (env
->regs
[r1
] >> 16) & 0xff;
844 fh
= env
->regs
[r1
] >> 32;
847 program_interrupt(env
, PGM_SPECIFICATION
, 6);
851 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
853 DPRINTF("mpcifc no pci dev fh 0x%x\n", fh
);
854 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
858 switch (pbdev
->state
) {
859 case ZPCI_FS_RESERVED
:
860 case ZPCI_FS_STANDBY
:
861 case ZPCI_FS_DISABLED
:
862 case ZPCI_FS_PERMANENT_ERROR
:
863 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
869 if (s390_cpu_virt_mem_read(cpu
, fiba
, ar
, (uint8_t *)&fib
, sizeof(fib
))) {
874 program_interrupt(env
, PGM_OPERAND
, 6);
879 case ZPCI_MOD_FC_REG_INT
:
880 if (pbdev
->summary_ind
) {
881 cc
= ZPCI_PCI_LS_ERR
;
882 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
883 } else if (reg_irqs(env
, pbdev
, fib
)) {
884 cc
= ZPCI_PCI_LS_ERR
;
885 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_RES_NOT_AVAIL
);
888 case ZPCI_MOD_FC_DEREG_INT
:
889 if (!pbdev
->summary_ind
) {
890 cc
= ZPCI_PCI_LS_ERR
;
891 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
893 pci_dereg_irqs(pbdev
);
896 case ZPCI_MOD_FC_REG_IOAT
:
898 cc
= ZPCI_PCI_LS_ERR
;
899 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
900 } else if (pbdev
->iommu
->enabled
) {
901 cc
= ZPCI_PCI_LS_ERR
;
902 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
903 } else if (reg_ioat(env
, pbdev
->iommu
, fib
)) {
904 cc
= ZPCI_PCI_LS_ERR
;
905 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_INSUF_RES
);
908 case ZPCI_MOD_FC_DEREG_IOAT
:
910 cc
= ZPCI_PCI_LS_ERR
;
911 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
912 } else if (!pbdev
->iommu
->enabled
) {
913 cc
= ZPCI_PCI_LS_ERR
;
914 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
916 pci_dereg_ioat(pbdev
->iommu
);
919 case ZPCI_MOD_FC_REREG_IOAT
:
921 cc
= ZPCI_PCI_LS_ERR
;
922 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
923 } else if (!pbdev
->iommu
->enabled
) {
924 cc
= ZPCI_PCI_LS_ERR
;
925 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
927 pci_dereg_ioat(pbdev
->iommu
);
928 if (reg_ioat(env
, pbdev
->iommu
, fib
)) {
929 cc
= ZPCI_PCI_LS_ERR
;
930 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_INSUF_RES
);
934 case ZPCI_MOD_FC_RESET_ERROR
:
935 switch (pbdev
->state
) {
936 case ZPCI_FS_BLOCKED
:
938 pbdev
->state
= ZPCI_FS_ENABLED
;
941 cc
= ZPCI_PCI_LS_ERR
;
942 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
945 case ZPCI_MOD_FC_RESET_BLOCK
:
946 switch (pbdev
->state
) {
948 pbdev
->state
= ZPCI_FS_BLOCKED
;
951 cc
= ZPCI_PCI_LS_ERR
;
952 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
955 case ZPCI_MOD_FC_SET_MEASURE
:
956 pbdev
->fmb_addr
= ldq_p(&fib
.fmb_addr
);
959 program_interrupt(&cpu
->env
, PGM_OPERAND
, 6);
960 cc
= ZPCI_PCI_LS_ERR
;
967 int stpcifc_service_call(S390CPU
*cpu
, uint8_t r1
, uint64_t fiba
, uint8_t ar
)
969 CPUS390XState
*env
= &cpu
->env
;
973 S390PCIBusDevice
*pbdev
;
975 uint64_t cc
= ZPCI_PCI_LS_OK
;
977 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
978 program_interrupt(env
, PGM_PRIVILEGED
, 6);
982 fh
= env
->regs
[r1
] >> 32;
983 dmaas
= (env
->regs
[r1
] >> 16) & 0xff;
986 setcc(cpu
, ZPCI_PCI_LS_ERR
);
987 s390_set_status_code(env
, r1
, ZPCI_STPCIFC_ST_INVAL_DMAAS
);
992 program_interrupt(env
, PGM_SPECIFICATION
, 6);
996 pbdev
= s390_pci_find_dev_by_idx(s390_get_phb(), fh
& FH_MASK_INDEX
);
998 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
1002 memset(&fib
, 0, sizeof(fib
));
1004 switch (pbdev
->state
) {
1005 case ZPCI_FS_RESERVED
:
1006 case ZPCI_FS_STANDBY
:
1007 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
1009 case ZPCI_FS_DISABLED
:
1010 if (fh
& FH_MASK_ENABLE
) {
1011 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
1015 /* BLOCKED bit is set to one coincident with the setting of ERROR bit.
1016 * FH Enabled bit is set to one in states of ENABLED, BLOCKED or ERROR. */
1019 case ZPCI_FS_BLOCKED
:
1021 case ZPCI_FS_ENABLED
:
1023 if (pbdev
->iommu
->enabled
) {
1026 if (!(fh
& FH_MASK_ENABLE
)) {
1027 env
->regs
[r1
] |= 1ULL << 63;
1030 case ZPCI_FS_PERMANENT_ERROR
:
1031 setcc(cpu
, ZPCI_PCI_LS_ERR
);
1032 s390_set_status_code(env
, r1
, ZPCI_STPCIFC_ST_PERM_ERROR
);
1036 stq_p(&fib
.pba
, pbdev
->iommu
->pba
);
1037 stq_p(&fib
.pal
, pbdev
->iommu
->pal
);
1038 stq_p(&fib
.iota
, pbdev
->iommu
->g_iota
);
1039 stq_p(&fib
.aibv
, pbdev
->routes
.adapter
.ind_addr
);
1040 stq_p(&fib
.aisb
, pbdev
->routes
.adapter
.summary_addr
);
1041 stq_p(&fib
.fmb_addr
, pbdev
->fmb_addr
);
1043 data
= ((uint32_t)pbdev
->isc
<< 28) | ((uint32_t)pbdev
->noi
<< 16) |
1044 ((uint32_t)pbdev
->routes
.adapter
.ind_offset
<< 8) |
1045 ((uint32_t)pbdev
->sum
<< 7) | pbdev
->routes
.adapter
.summary_offset
;
1046 stl_p(&fib
.data
, data
);
1049 if (s390_cpu_virt_mem_write(cpu
, fiba
, ar
, (uint8_t *)&fib
, sizeof(fib
))) {