2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/dma.h"
29 #include "hw/boards.h"
30 #include "hw/nvram/fw_cfg.h"
31 #include "hw/sysbus.h"
33 #include "qemu/error-report.h"
34 #include "qemu/option.h"
35 #include "qemu/config-file.h"
36 #include "qemu/cutils.h"
37 #include "qapi/error.h"
39 #define FW_CFG_FILE_SLOTS_DFLT 0x20
41 /* FW_CFG_VERSION bits */
42 #define FW_CFG_VERSION 0x01
43 #define FW_CFG_VERSION_DMA 0x02
45 /* FW_CFG_DMA_CONTROL bits */
46 #define FW_CFG_DMA_CTL_ERROR 0x01
47 #define FW_CFG_DMA_CTL_READ 0x02
48 #define FW_CFG_DMA_CTL_SKIP 0x04
49 #define FW_CFG_DMA_CTL_SELECT 0x08
50 #define FW_CFG_DMA_CTL_WRITE 0x10
52 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
58 void *callback_opaque
;
59 FWCfgCallback select_cb
;
60 FWCfgWriteCallback write_cb
;
66 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
72 unsigned int filehead
;
75 if (!g_file_get_contents(filename
, &content
, file_sizep
, &err
)) {
76 error_report("failed to read splash file '%s': %s",
77 filename
, err
->message
);
83 if (*file_sizep
< 30) {
88 filehead
= ((content
[0] & 0xff) + (content
[1] << 8)) & 0xffff;
89 if (filehead
== 0xd8ff) {
91 } else if (filehead
== 0x4d42) {
98 if (file_type
== BMP_FILE
) {
99 bmp_bpp
= (content
[28] + (content
[29] << 8)) & 0xffff;
106 *file_typep
= file_type
;
111 error_report("splash file '%s' format not recognized; must be JPEG "
112 "or 24 bit BMP", filename
);
117 static void fw_cfg_bootsplash(FWCfgState
*s
)
119 const char *boot_splash_filename
= NULL
;
120 const char *boot_splash_time
= NULL
;
121 uint8_t qemu_extra_params_fw
[2];
122 char *filename
, *file_data
;
126 /* get user configuration */
127 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
128 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
129 boot_splash_filename
= qemu_opt_get(opts
, "splash");
130 boot_splash_time
= qemu_opt_get(opts
, "splash-time");
132 /* insert splash time if user configurated */
133 if (boot_splash_time
) {
134 int64_t bst_val
= qemu_opt_get_number(opts
, "splash-time", -1);
135 /* validate the input */
136 if (bst_val
< 0 || bst_val
> 0xffff) {
137 error_report("splash-time is invalid,"
138 "it should be a value between 0 and 65535");
141 /* use little endian format */
142 qemu_extra_params_fw
[0] = (uint8_t)(bst_val
& 0xff);
143 qemu_extra_params_fw
[1] = (uint8_t)((bst_val
>> 8) & 0xff);
144 fw_cfg_add_file(s
, "etc/boot-menu-wait", qemu_extra_params_fw
, 2);
147 /* insert splash file if user configurated */
148 if (boot_splash_filename
) {
149 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
150 if (filename
== NULL
) {
151 error_report("failed to find file '%s'", boot_splash_filename
);
155 /* loading file data */
156 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
157 if (file_data
== NULL
) {
161 g_free(boot_splash_filedata
);
162 boot_splash_filedata
= (uint8_t *)file_data
;
163 boot_splash_filedata_size
= file_size
;
166 if (file_type
== JPG_FILE
) {
167 fw_cfg_add_file(s
, "bootsplash.jpg",
168 boot_splash_filedata
, boot_splash_filedata_size
);
170 fw_cfg_add_file(s
, "bootsplash.bmp",
171 boot_splash_filedata
, boot_splash_filedata_size
);
177 static void fw_cfg_reboot(FWCfgState
*s
)
179 const char *reboot_timeout
= NULL
;
182 /* get user configuration */
183 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
184 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
185 reboot_timeout
= qemu_opt_get(opts
, "reboot-timeout");
187 if (reboot_timeout
) {
188 rt_val
= qemu_opt_get_number(opts
, "reboot-timeout", -1);
189 /* validate the input */
190 if (rt_val
< 0 || rt_val
> 0xffff) {
191 error_report("reboot timeout is invalid,"
192 "it should be a value between 0 and 65535");
197 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&rt_val
, 4), 4);
200 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
202 /* nothing, write support removed in QEMU v2.4+ */
205 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
207 return s
->file_slots
;
210 /* Note: this function returns an exclusive limit. */
211 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
213 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
216 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
222 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
223 s
->cur_entry
= FW_CFG_INVALID
;
228 /* entry successfully selected, now run callback if present */
229 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
230 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
232 e
->select_cb(e
->callback_opaque
);
236 trace_fw_cfg_select(s
, key
, ret
);
240 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
242 FWCfgState
*s
= opaque
;
243 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
244 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
245 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
248 assert(size
> 0 && size
<= sizeof(value
));
249 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
250 /* The least significant 'size' bytes of the return value are
251 * expected to contain a string preserving portion of the item
252 * data, padded with zeros on the right in case we run out early.
253 * In technical terms, we're composing the host-endian representation
254 * of the big endian interpretation of the fw_cfg string.
257 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
258 } while (--size
&& s
->cur_offset
< e
->len
);
259 /* If size is still not zero, we *did* run out early, so continue
260 * left-shifting, to add the appropriate number of padding zeros
266 trace_fw_cfg_read(s
, value
);
270 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
271 uint64_t value
, unsigned size
)
273 FWCfgState
*s
= opaque
;
277 fw_cfg_write(s
, value
>> (8 * --i
));
281 static void fw_cfg_dma_transfer(FWCfgState
*s
)
287 int read
= 0, write
= 0;
290 /* Reset the address before the next access */
291 dma_addr
= s
->dma_addr
;
294 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
295 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
296 FW_CFG_DMA_CTL_ERROR
);
300 dma
.address
= be64_to_cpu(dma
.address
);
301 dma
.length
= be32_to_cpu(dma
.length
);
302 dma
.control
= be32_to_cpu(dma
.control
);
304 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
305 fw_cfg_select(s
, dma
.control
>> 16);
308 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
309 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
310 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
312 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
315 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
318 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
327 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
328 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
329 s
->cur_offset
>= e
->len
) {
332 /* If the access is not a read access, it will be a skip access,
336 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
337 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
341 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
344 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
347 len
= (e
->len
- s
->cur_offset
);
350 /* If the access is not a read access, it will be a skip access,
354 if (dma_memory_write(s
->dma_as
, dma
.address
,
355 &e
->data
[s
->cur_offset
], len
)) {
356 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
360 if (!e
->allow_write
||
362 dma_memory_read(s
->dma_as
, dma
.address
,
363 &e
->data
[s
->cur_offset
], len
)) {
364 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
365 } else if (e
->write_cb
) {
366 e
->write_cb(e
->callback_opaque
, s
->cur_offset
, len
);
370 s
->cur_offset
+= len
;
378 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
381 trace_fw_cfg_read(s
, 0);
384 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
387 /* Return a signature value (and handle various read sizes) */
388 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
391 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
392 uint64_t value
, unsigned size
)
394 FWCfgState
*s
= opaque
;
398 /* FWCfgDmaAccess high address */
399 s
->dma_addr
= value
<< 32;
400 } else if (addr
== 4) {
401 /* FWCfgDmaAccess low address */
402 s
->dma_addr
|= value
;
403 fw_cfg_dma_transfer(s
);
405 } else if (size
== 8 && addr
== 0) {
407 fw_cfg_dma_transfer(s
);
411 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
412 unsigned size
, bool is_write
,
415 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
416 (size
== 8 && addr
== 0));
419 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
420 unsigned size
, bool is_write
,
426 static uint64_t fw_cfg_ctl_mem_read(void *opaque
, hwaddr addr
, unsigned size
)
431 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
432 uint64_t value
, unsigned size
)
434 fw_cfg_select(opaque
, (uint16_t)value
);
437 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
438 unsigned size
, bool is_write
,
441 return is_write
&& size
== 2;
444 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
445 uint64_t value
, unsigned size
)
449 fw_cfg_write(opaque
, (uint8_t)value
);
452 fw_cfg_select(opaque
, (uint16_t)value
);
457 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
458 unsigned size
, bool is_write
,
461 return (size
== 1) || (is_write
&& size
== 2);
464 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
465 .read
= fw_cfg_ctl_mem_read
,
466 .write
= fw_cfg_ctl_mem_write
,
467 .endianness
= DEVICE_BIG_ENDIAN
,
468 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
471 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
472 .read
= fw_cfg_data_read
,
473 .write
= fw_cfg_data_mem_write
,
474 .endianness
= DEVICE_BIG_ENDIAN
,
476 .min_access_size
= 1,
477 .max_access_size
= 1,
478 .accepts
= fw_cfg_data_mem_valid
,
482 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
483 .read
= fw_cfg_data_read
,
484 .write
= fw_cfg_comb_write
,
485 .endianness
= DEVICE_LITTLE_ENDIAN
,
486 .valid
.accepts
= fw_cfg_comb_valid
,
489 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
490 .read
= fw_cfg_dma_mem_read
,
491 .write
= fw_cfg_dma_mem_write
,
492 .endianness
= DEVICE_BIG_ENDIAN
,
493 .valid
.accepts
= fw_cfg_dma_mem_valid
,
494 .valid
.max_access_size
= 8,
495 .impl
.max_access_size
= 8,
498 static void fw_cfg_reset(DeviceState
*d
)
500 FWCfgState
*s
= FW_CFG(d
);
502 /* we never register a read callback for FW_CFG_SIGNATURE */
503 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
506 /* Save restore 32 bit int as uint16_t
507 This is a Big hack, but it is how the old state did it.
508 Or we broke compatibility in the state, or we can't use struct tm
511 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
512 const VMStateField
*field
)
515 *v
= qemu_get_be16(f
);
519 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
,
520 const VMStateField
*field
, QJSON
*vmdesc
)
522 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
523 fprintf(stderr
, "This functions shouldn't be called.\n");
528 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
529 .name
= "int32_as_uint16",
530 .get
= get_uint32_as_uint16
,
534 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
535 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
538 static bool is_version_1(void *opaque
, int version_id
)
540 return version_id
== 1;
543 bool fw_cfg_dma_enabled(void *opaque
)
545 FWCfgState
*s
= opaque
;
547 return s
->dma_enabled
;
550 static const VMStateDescription vmstate_fw_cfg_dma
= {
551 .name
= "fw_cfg/dma",
552 .needed
= fw_cfg_dma_enabled
,
553 .fields
= (VMStateField
[]) {
554 VMSTATE_UINT64(dma_addr
, FWCfgState
),
555 VMSTATE_END_OF_LIST()
559 static const VMStateDescription vmstate_fw_cfg
= {
562 .minimum_version_id
= 1,
563 .fields
= (VMStateField
[]) {
564 VMSTATE_UINT16(cur_entry
, FWCfgState
),
565 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
566 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
567 VMSTATE_END_OF_LIST()
569 .subsections
= (const VMStateDescription
*[]) {
575 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
576 FWCfgCallback select_cb
,
577 FWCfgWriteCallback write_cb
,
578 void *callback_opaque
,
579 void *data
, size_t len
,
582 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
584 key
&= FW_CFG_ENTRY_MASK
;
586 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
587 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
589 s
->entries
[arch
][key
].data
= data
;
590 s
->entries
[arch
][key
].len
= (uint32_t)len
;
591 s
->entries
[arch
][key
].select_cb
= select_cb
;
592 s
->entries
[arch
][key
].write_cb
= write_cb
;
593 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
594 s
->entries
[arch
][key
].allow_write
= !read_only
;
597 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
598 void *data
, size_t len
)
601 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
603 key
&= FW_CFG_ENTRY_MASK
;
605 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
607 /* return the old data to the function caller, avoid memory leak */
608 ptr
= s
->entries
[arch
][key
].data
;
609 s
->entries
[arch
][key
].data
= data
;
610 s
->entries
[arch
][key
].len
= len
;
611 s
->entries
[arch
][key
].callback_opaque
= NULL
;
612 s
->entries
[arch
][key
].allow_write
= false;
617 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
619 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, NULL
, data
, len
, true);
622 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
624 size_t sz
= strlen(value
) + 1;
626 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
629 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
633 copy
= g_malloc(sizeof(value
));
634 *copy
= cpu_to_le16(value
);
635 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
638 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
640 uint16_t *copy
, *old
;
642 copy
= g_malloc(sizeof(value
));
643 *copy
= cpu_to_le16(value
);
644 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
648 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
652 copy
= g_malloc(sizeof(value
));
653 *copy
= cpu_to_le32(value
);
654 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
657 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
661 copy
= g_malloc(sizeof(value
));
662 *copy
= cpu_to_le64(value
);
663 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
666 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
668 assert(s
->fw_cfg_order_override
== 0);
669 s
->fw_cfg_order_override
= order
;
672 void fw_cfg_reset_order_override(FWCfgState
*s
)
674 assert(s
->fw_cfg_order_override
!= 0);
675 s
->fw_cfg_order_override
= 0;
679 * This is the legacy order list. For legacy systems, files are in
680 * the fw_cfg in the order defined below, by the "order" value. Note
681 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
682 * specific area, but there may be more than one and they occur in the
683 * order that the user specifies them on the command line. Those are
684 * handled in a special manner, using the order override above.
686 * For non-legacy, the files are sorted by filename to avoid this kind
687 * of complexity in the future.
689 * This is only for x86, other arches don't implement versioning so
690 * they won't set legacy mode.
696 { "etc/boot-menu-wait", 10 },
697 { "bootsplash.jpg", 11 },
698 { "bootsplash.bmp", 12 },
699 { "etc/boot-fail-wait", 15 },
700 { "etc/smbios/smbios-tables", 20 },
701 { "etc/smbios/smbios-anchor", 30 },
703 { "etc/reserved-memory-end", 50 },
704 { "genroms/kvmvapic.bin", 55 },
705 { "genroms/linuxboot.bin", 60 },
706 { }, /* VGA ROMs from pc_vga_init come here, 70. */
707 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
708 { "etc/system-states", 90 },
709 { }, /* User ROMs come here, 100. */
710 { }, /* Device FW comes here, 110. */
711 { "etc/extra-pci-roots", 120 },
712 { "etc/acpi/tables", 130 },
713 { "etc/table-loader", 140 },
714 { "etc/tpm/log", 150 },
715 { "etc/acpi/rsdp", 160 },
716 { "bootorder", 170 },
718 #define FW_CFG_ORDER_OVERRIDE_LAST 200
721 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
725 if (s
->fw_cfg_order_override
> 0) {
726 return s
->fw_cfg_order_override
;
729 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
730 if (fw_cfg_order
[i
].name
== NULL
) {
734 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
735 return fw_cfg_order
[i
].order
;
739 /* Stick unknown stuff at the end. */
740 warn_report("Unknown firmware file in legacy mode: %s", name
);
741 return FW_CFG_ORDER_OVERRIDE_LAST
;
744 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
745 FWCfgCallback select_cb
,
746 FWCfgWriteCallback write_cb
,
747 void *callback_opaque
,
748 void *data
, size_t len
, bool read_only
)
752 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
756 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
757 s
->files
= g_malloc0(dsize
);
758 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
761 count
= be32_to_cpu(s
->files
->count
);
762 assert(count
< fw_cfg_file_slots(s
));
764 /* Find the insertion point. */
765 if (mc
->legacy_fw_cfg_order
) {
767 * Sort by order. For files with the same order, we keep them
768 * in the sequence in which they were added.
770 order
= get_fw_cfg_order(s
, filename
);
772 index
> 0 && order
< s
->entry_order
[index
- 1];
775 /* Sort by file name. */
777 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
782 * Move all the entries from the index point and after down one
783 * to create a slot for the new entry. Because calculations are
784 * being done with the index, make it so that "i" is the current
785 * index and "i - 1" is the one being copied from, thus the
786 * unusual start and end in the for statement.
788 for (i
= count
; i
> index
; i
--) {
789 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
790 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
791 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
792 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
793 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
796 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
797 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
799 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
800 for (i
= 0; i
<= count
; i
++) {
802 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
803 error_report("duplicate fw_cfg file name: %s",
804 s
->files
->f
[index
].name
);
809 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
811 callback_opaque
, data
, len
,
814 s
->files
->f
[index
].size
= cpu_to_be32(len
);
815 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
816 s
->entry_order
[index
] = order
;
817 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
819 s
->files
->count
= cpu_to_be32(count
+1);
822 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
823 void *data
, size_t len
)
825 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
828 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
829 void *data
, size_t len
)
836 index
= be32_to_cpu(s
->files
->count
);
838 for (i
= 0; i
< index
; i
++) {
839 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
840 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
842 s
->files
->f
[i
].size
= cpu_to_be32(len
);
847 assert(index
< fw_cfg_file_slots(s
));
850 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
854 static void fw_cfg_machine_reset(void *opaque
)
858 FWCfgState
*s
= opaque
;
859 char *bootindex
= get_boot_devices_list(&len
);
861 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)bootindex
, len
);
865 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
867 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
868 qemu_register_reset(fw_cfg_machine_reset
, s
);
873 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
875 FWCfgState
*s
= FW_CFG(dev
);
876 MachineState
*machine
= MACHINE(qdev_get_machine());
877 uint32_t version
= FW_CFG_VERSION
;
879 if (!fw_cfg_find()) {
880 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
884 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
885 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
886 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
887 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
888 fw_cfg_bootsplash(s
);
891 if (s
->dma_enabled
) {
892 version
|= FW_CFG_VERSION_DMA
;
895 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
897 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
898 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
901 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
902 AddressSpace
*dma_as
)
908 bool dma_requested
= dma_iobase
&& dma_as
;
910 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
911 if (!dma_requested
) {
912 qdev_prop_set_bit(dev
, "dma_enabled", false);
915 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
917 qdev_init_nofail(dev
);
919 sbd
= SYS_BUS_DEVICE(dev
);
920 ios
= FW_CFG_IO(dev
);
921 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
925 if (s
->dma_enabled
) {
926 /* 64 bits for the address field */
929 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
935 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
937 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
940 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
941 hwaddr data_addr
, uint32_t data_width
,
942 hwaddr dma_addr
, AddressSpace
*dma_as
)
947 bool dma_requested
= dma_addr
&& dma_as
;
949 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
950 qdev_prop_set_uint32(dev
, "data_width", data_width
);
951 if (!dma_requested
) {
952 qdev_prop_set_bit(dev
, "dma_enabled", false);
955 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
957 qdev_init_nofail(dev
);
959 sbd
= SYS_BUS_DEVICE(dev
);
960 sysbus_mmio_map(sbd
, 0, ctl_addr
);
961 sysbus_mmio_map(sbd
, 1, data_addr
);
965 if (s
->dma_enabled
) {
968 sysbus_mmio_map(sbd
, 2, dma_addr
);
974 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
976 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
977 fw_cfg_data_mem_ops
.valid
.max_access_size
,
982 FWCfgState
*fw_cfg_find(void)
984 /* Returns NULL unless there is exactly one fw_cfg device */
985 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
989 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
991 DeviceClass
*dc
= DEVICE_CLASS(klass
);
993 dc
->reset
= fw_cfg_reset
;
994 dc
->vmsd
= &vmstate_fw_cfg
;
997 static const TypeInfo fw_cfg_info
= {
999 .parent
= TYPE_SYS_BUS_DEVICE
,
1001 .instance_size
= sizeof(FWCfgState
),
1002 .class_init
= fw_cfg_class_init
,
1005 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
1007 uint16_t file_slots_max
;
1009 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1010 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1011 FW_CFG_FILE_SLOTS_MIN
);
1015 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1016 * that we permit. The actual (exclusive) value coming from the
1017 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1018 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1019 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1020 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1025 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1026 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1027 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1030 static Property fw_cfg_io_properties
[] = {
1031 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1033 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1034 FW_CFG_FILE_SLOTS_DFLT
),
1035 DEFINE_PROP_END_OF_LIST(),
1038 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1040 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1041 Error
*local_err
= NULL
;
1043 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1045 error_propagate(errp
, local_err
);
1049 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1050 * with half of the 16-bit control register. Hence, the total size
1051 * of the i/o region used is FW_CFG_CTL_SIZE */
1052 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1053 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1055 if (FW_CFG(s
)->dma_enabled
) {
1056 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1057 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1058 sizeof(dma_addr_t
));
1061 fw_cfg_common_realize(dev
, errp
);
1064 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1066 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1068 dc
->realize
= fw_cfg_io_realize
;
1069 dc
->props
= fw_cfg_io_properties
;
1072 static const TypeInfo fw_cfg_io_info
= {
1073 .name
= TYPE_FW_CFG_IO
,
1074 .parent
= TYPE_FW_CFG
,
1075 .instance_size
= sizeof(FWCfgIoState
),
1076 .class_init
= fw_cfg_io_class_init
,
1080 static Property fw_cfg_mem_properties
[] = {
1081 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1082 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1084 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1085 FW_CFG_FILE_SLOTS_DFLT
),
1086 DEFINE_PROP_END_OF_LIST(),
1089 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1091 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1092 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1093 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1094 Error
*local_err
= NULL
;
1096 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1098 error_propagate(errp
, local_err
);
1102 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1103 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1104 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1106 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1107 s
->wide_data_ops
= *data_ops
;
1109 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1110 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1111 data_ops
= &s
->wide_data_ops
;
1113 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1114 "fwcfg.data", data_ops
->valid
.max_access_size
);
1115 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1117 if (FW_CFG(s
)->dma_enabled
) {
1118 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1119 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1120 sizeof(dma_addr_t
));
1121 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1124 fw_cfg_common_realize(dev
, errp
);
1127 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1129 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1131 dc
->realize
= fw_cfg_mem_realize
;
1132 dc
->props
= fw_cfg_mem_properties
;
1135 static const TypeInfo fw_cfg_mem_info
= {
1136 .name
= TYPE_FW_CFG_MEM
,
1137 .parent
= TYPE_FW_CFG
,
1138 .instance_size
= sizeof(FWCfgMemState
),
1139 .class_init
= fw_cfg_mem_class_init
,
1143 static void fw_cfg_register_types(void)
1145 type_register_static(&fw_cfg_info
);
1146 type_register_static(&fw_cfg_io_info
);
1147 type_register_static(&fw_cfg_mem_info
);
1150 type_init(fw_cfg_register_types
)