block/file-posix: implement bdrv_co_invalidate_cache() on Linux
[qemu/ar7.git] / target / arm / arm_ldst.h
blob01587b3ebb8873e1fb111587b4fb03fadff6417e
1 /*
2 * ARM load/store instructions for code (armeb-user support)
4 * Copyright (c) 2012 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef ARM_LDST_H
21 #define ARM_LDST_H
23 #include "exec/exec-all.h"
24 #include "exec/cpu_ldst.h"
25 #include "qemu/bswap.h"
27 /* Load an instruction and return it in the standard little-endian order */
28 static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
29 bool sctlr_b)
31 uint32_t insn = cpu_ldl_code(env, addr);
32 if (bswap_code(sctlr_b)) {
33 return bswap32(insn);
35 return insn;
38 /* Ditto, for a halfword (Thumb) instruction */
39 static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
40 bool sctlr_b)
42 uint16_t insn;
43 #ifndef CONFIG_USER_ONLY
44 /* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped
45 within each word. Undo that now. */
46 if (sctlr_b) {
47 addr ^= 2;
49 #endif
50 insn = cpu_lduw_code(env, addr);
51 if (bswap_code(sctlr_b)) {
52 return bswap16(insn);
54 return insn;
57 #endif