2 * RISC-V FPU Emulation Helpers for QEMU.
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
21 #include "qemu/host-utils.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "fpu/softfloat.h"
25 #include "internals.h"
27 target_ulong
riscv_cpu_get_fflags(CPURISCVState
*env
)
29 int soft
= get_float_exception_flags(&env
->fp_status
);
30 target_ulong hard
= 0;
32 hard
|= (soft
& float_flag_inexact
) ? FPEXC_NX
: 0;
33 hard
|= (soft
& float_flag_underflow
) ? FPEXC_UF
: 0;
34 hard
|= (soft
& float_flag_overflow
) ? FPEXC_OF
: 0;
35 hard
|= (soft
& float_flag_divbyzero
) ? FPEXC_DZ
: 0;
36 hard
|= (soft
& float_flag_invalid
) ? FPEXC_NV
: 0;
41 void riscv_cpu_set_fflags(CPURISCVState
*env
, target_ulong hard
)
45 soft
|= (hard
& FPEXC_NX
) ? float_flag_inexact
: 0;
46 soft
|= (hard
& FPEXC_UF
) ? float_flag_underflow
: 0;
47 soft
|= (hard
& FPEXC_OF
) ? float_flag_overflow
: 0;
48 soft
|= (hard
& FPEXC_DZ
) ? float_flag_divbyzero
: 0;
49 soft
|= (hard
& FPEXC_NV
) ? float_flag_invalid
: 0;
51 set_float_exception_flags(soft
, &env
->fp_status
);
54 void helper_set_rounding_mode(CPURISCVState
*env
, uint32_t rm
)
63 softrm
= float_round_nearest_even
;
66 softrm
= float_round_to_zero
;
69 softrm
= float_round_down
;
72 softrm
= float_round_up
;
75 softrm
= float_round_ties_away
;
78 riscv_raise_exception(env
, RISCV_EXCP_ILLEGAL_INST
, GETPC());
81 set_float_rounding_mode(softrm
, &env
->fp_status
);
84 uint64_t helper_fmadd_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
87 return float32_muladd(frs1
, frs2
, frs3
, 0, &env
->fp_status
);
90 uint64_t helper_fmadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
93 return float64_muladd(frs1
, frs2
, frs3
, 0, &env
->fp_status
);
96 uint64_t helper_fmsub_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
99 return float32_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
,
103 uint64_t helper_fmsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
106 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
,
110 uint64_t helper_fnmsub_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
113 return float32_muladd(frs1
, frs2
, frs3
, float_muladd_negate_product
,
117 uint64_t helper_fnmsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
120 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_product
,
124 uint64_t helper_fnmadd_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
127 return float32_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
|
128 float_muladd_negate_product
, &env
->fp_status
);
131 uint64_t helper_fnmadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
134 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
|
135 float_muladd_negate_product
, &env
->fp_status
);
138 uint64_t helper_fadd_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
140 return float32_add(frs1
, frs2
, &env
->fp_status
);
143 uint64_t helper_fsub_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
145 return float32_sub(frs1
, frs2
, &env
->fp_status
);
148 uint64_t helper_fmul_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
150 return float32_mul(frs1
, frs2
, &env
->fp_status
);
153 uint64_t helper_fdiv_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
155 return float32_div(frs1
, frs2
, &env
->fp_status
);
158 uint64_t helper_fmin_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
160 return float32_minnum(frs1
, frs2
, &env
->fp_status
);
163 uint64_t helper_fmax_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
165 return float32_maxnum(frs1
, frs2
, &env
->fp_status
);
168 uint64_t helper_fsqrt_s(CPURISCVState
*env
, uint64_t frs1
)
170 return float32_sqrt(frs1
, &env
->fp_status
);
173 target_ulong
helper_fle_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
175 return float32_le(frs1
, frs2
, &env
->fp_status
);
178 target_ulong
helper_flt_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
180 return float32_lt(frs1
, frs2
, &env
->fp_status
);
183 target_ulong
helper_feq_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
185 return float32_eq_quiet(frs1
, frs2
, &env
->fp_status
);
188 target_ulong
helper_fcvt_w_s(CPURISCVState
*env
, uint64_t frs1
)
190 return float32_to_int32(frs1
, &env
->fp_status
);
193 target_ulong
helper_fcvt_wu_s(CPURISCVState
*env
, uint64_t frs1
)
195 return (int32_t)float32_to_uint32(frs1
, &env
->fp_status
);
198 #if defined(TARGET_RISCV64)
199 uint64_t helper_fcvt_l_s(CPURISCVState
*env
, uint64_t frs1
)
201 return float32_to_int64(frs1
, &env
->fp_status
);
204 uint64_t helper_fcvt_lu_s(CPURISCVState
*env
, uint64_t frs1
)
206 return float32_to_uint64(frs1
, &env
->fp_status
);
210 uint64_t helper_fcvt_s_w(CPURISCVState
*env
, target_ulong rs1
)
212 return int32_to_float32((int32_t)rs1
, &env
->fp_status
);
215 uint64_t helper_fcvt_s_wu(CPURISCVState
*env
, target_ulong rs1
)
217 return uint32_to_float32((uint32_t)rs1
, &env
->fp_status
);
220 #if defined(TARGET_RISCV64)
221 uint64_t helper_fcvt_s_l(CPURISCVState
*env
, uint64_t rs1
)
223 return int64_to_float32(rs1
, &env
->fp_status
);
226 uint64_t helper_fcvt_s_lu(CPURISCVState
*env
, uint64_t rs1
)
228 return uint64_to_float32(rs1
, &env
->fp_status
);
232 target_ulong
helper_fclass_s(uint64_t frs1
)
234 return fclass_s(frs1
);
237 uint64_t helper_fadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
239 return float64_add(frs1
, frs2
, &env
->fp_status
);
242 uint64_t helper_fsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
244 return float64_sub(frs1
, frs2
, &env
->fp_status
);
247 uint64_t helper_fmul_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
249 return float64_mul(frs1
, frs2
, &env
->fp_status
);
252 uint64_t helper_fdiv_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
254 return float64_div(frs1
, frs2
, &env
->fp_status
);
257 uint64_t helper_fmin_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
259 return float64_minnum(frs1
, frs2
, &env
->fp_status
);
262 uint64_t helper_fmax_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
264 return float64_maxnum(frs1
, frs2
, &env
->fp_status
);
267 uint64_t helper_fcvt_s_d(CPURISCVState
*env
, uint64_t rs1
)
269 return float64_to_float32(rs1
, &env
->fp_status
);
272 uint64_t helper_fcvt_d_s(CPURISCVState
*env
, uint64_t rs1
)
274 return float32_to_float64(rs1
, &env
->fp_status
);
277 uint64_t helper_fsqrt_d(CPURISCVState
*env
, uint64_t frs1
)
279 return float64_sqrt(frs1
, &env
->fp_status
);
282 target_ulong
helper_fle_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
284 return float64_le(frs1
, frs2
, &env
->fp_status
);
287 target_ulong
helper_flt_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
289 return float64_lt(frs1
, frs2
, &env
->fp_status
);
292 target_ulong
helper_feq_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
294 return float64_eq_quiet(frs1
, frs2
, &env
->fp_status
);
297 target_ulong
helper_fcvt_w_d(CPURISCVState
*env
, uint64_t frs1
)
299 return float64_to_int32(frs1
, &env
->fp_status
);
302 target_ulong
helper_fcvt_wu_d(CPURISCVState
*env
, uint64_t frs1
)
304 return (int32_t)float64_to_uint32(frs1
, &env
->fp_status
);
307 #if defined(TARGET_RISCV64)
308 uint64_t helper_fcvt_l_d(CPURISCVState
*env
, uint64_t frs1
)
310 return float64_to_int64(frs1
, &env
->fp_status
);
313 uint64_t helper_fcvt_lu_d(CPURISCVState
*env
, uint64_t frs1
)
315 return float64_to_uint64(frs1
, &env
->fp_status
);
319 uint64_t helper_fcvt_d_w(CPURISCVState
*env
, target_ulong rs1
)
321 return int32_to_float64((int32_t)rs1
, &env
->fp_status
);
324 uint64_t helper_fcvt_d_wu(CPURISCVState
*env
, target_ulong rs1
)
326 return uint32_to_float64((uint32_t)rs1
, &env
->fp_status
);
329 #if defined(TARGET_RISCV64)
330 uint64_t helper_fcvt_d_l(CPURISCVState
*env
, uint64_t rs1
)
332 return int64_to_float64(rs1
, &env
->fp_status
);
335 uint64_t helper_fcvt_d_lu(CPURISCVState
*env
, uint64_t rs1
)
337 return uint64_to_float64(rs1
, &env
->fp_status
);
341 target_ulong
helper_fclass_d(uint64_t frs1
)
343 return fclass_d(frs1
);