4 * Copyright (c) 2006 Fabrice Bellard
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 * This is based on acpi.c, but heavily rewritten.
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "qemu/osdep.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i2c/pm_smbus.h"
31 #include "hw/pci/pci.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/i2c/i2c.h"
34 #include "hw/i2c/smbus.h"
36 #include "hw/i386/ich9.h"
38 #define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
39 #define ICH9_SMB_DEVICE(obj) \
40 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
42 typedef struct ICH9SMBState
{
48 static const VMStateDescription vmstate_ich9_smbus
= {
51 .minimum_version_id
= 1,
52 .fields
= (VMStateField
[]) {
53 VMSTATE_PCI_DEVICE(dev
, struct ICH9SMBState
),
58 static void ich9_smbus_write_config(PCIDevice
*d
, uint32_t address
,
59 uint32_t val
, int len
)
61 ICH9SMBState
*s
= ICH9_SMB_DEVICE(d
);
63 pci_default_write_config(d
, address
, val
, len
);
64 if (range_covers_byte(address
, len
, ICH9_SMB_HOSTC
)) {
65 uint8_t hostc
= s
->dev
.config
[ICH9_SMB_HOSTC
];
66 if ((hostc
& ICH9_SMB_HOSTC_HST_EN
) &&
67 !(hostc
& ICH9_SMB_HOSTC_I2C_EN
)) {
68 memory_region_set_enabled(&s
->smb
.io
, true);
70 memory_region_set_enabled(&s
->smb
.io
, false);
75 static void ich9_smbus_realize(PCIDevice
*d
, Error
**errp
)
77 ICH9SMBState
*s
= ICH9_SMB_DEVICE(d
);
79 /* TODO? D31IP.SMIP in chipset configuration space */
80 pci_config_set_interrupt_pin(d
->config
, 0x01); /* interrupt pin 1 */
82 pci_set_byte(d
->config
+ ICH9_SMB_HOSTC
, 0);
83 /* TODO bar0, bar1: 64bit BAR support*/
85 pm_smbus_init(&d
->qdev
, &s
->smb
);
86 pci_register_bar(d
, ICH9_SMB_SMB_BASE_BAR
, PCI_BASE_ADDRESS_SPACE_IO
,
90 static void ich9_smb_class_init(ObjectClass
*klass
, void *data
)
92 DeviceClass
*dc
= DEVICE_CLASS(klass
);
93 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
95 k
->vendor_id
= PCI_VENDOR_ID_INTEL
;
96 k
->device_id
= PCI_DEVICE_ID_INTEL_ICH9_6
;
97 k
->revision
= ICH9_A2_SMB_REVISION
;
98 k
->class_id
= PCI_CLASS_SERIAL_SMBUS
;
99 dc
->vmsd
= &vmstate_ich9_smbus
;
100 dc
->desc
= "ICH9 SMBUS Bridge";
101 k
->realize
= ich9_smbus_realize
;
102 k
->config_write
= ich9_smbus_write_config
;
104 * Reason: part of ICH9 southbridge, needs to be wired up by
107 dc
->cannot_instantiate_with_device_add_yet
= true;
110 I2CBus
*ich9_smb_init(PCIBus
*bus
, int devfn
, uint32_t smb_io_base
)
113 pci_create_simple_multifunction(bus
, devfn
, true, TYPE_ICH9_SMB_DEVICE
);
114 ICH9SMBState
*s
= ICH9_SMB_DEVICE(d
);
118 static const TypeInfo ich9_smb_info
= {
119 .name
= TYPE_ICH9_SMB_DEVICE
,
120 .parent
= TYPE_PCI_DEVICE
,
121 .instance_size
= sizeof(ICH9SMBState
),
122 .class_init
= ich9_smb_class_init
,
125 static void ich9_smb_register(void)
127 type_register_static(&ich9_smb_info
);
130 type_init(ich9_smb_register
);