4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu-version.h"
21 #include <sys/syscall.h>
22 #include <sys/resource.h>
24 #include "qapi/error.h"
26 #include "qemu/path.h"
27 #include "qemu/config-file.h"
28 #include "qemu/cutils.h"
29 #include "qemu/help_option.h"
31 #include "exec/exec-all.h"
32 #if defined(CONFIG_USER_ONLY) && defined(TARGET_X86_64)
36 #include "qemu/timer.h"
37 #include "qemu/envlist.h"
40 #include "trace/control.h"
45 static const char *filename
;
46 static const char *argv0
;
47 static int gdbstub_port
;
48 static envlist_t
*envlist
;
49 static const char *cpu_model
;
50 unsigned long mmap_min_addr
;
54 #define EXCP_DUMP(env, fmt, ...) \
56 CPUState *cs = ENV_GET_CPU(env); \
57 fprintf(stderr, fmt , ## __VA_ARGS__); \
58 cpu_dump_state(cs, stderr, fprintf, 0); \
59 if (qemu_log_separate()) { \
60 qemu_log(fmt, ## __VA_ARGS__); \
61 log_cpu_state(cs, 0); \
66 * When running 32-on-64 we should make sure we can fit all of the possible
67 * guest address space into a contiguous chunk of virtual host memory.
69 * This way we will never overlap with our own libraries or binaries or stack
70 * or anything else that QEMU maps.
72 * Many cpus reserve the high bit (or more than one for some 64-bit cpus)
73 * of the address for the kernel. Some cpus rely on this and user space
74 * uses the high bit(s) for pointer tagging and the like. For them, we
75 * must preserve the expected address space.
77 #ifndef MAX_RESERVED_VA
78 # if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
79 # if TARGET_VIRT_ADDR_SPACE_BITS == 32 && \
80 (TARGET_LONG_BITS == 32 || defined(TARGET_ABI32))
81 /* There are a number of places where we assign reserved_va to a variable
82 of type abi_ulong and expect it to fit. Avoid the last page. */
83 # define MAX_RESERVED_VA (0xfffffffful & TARGET_PAGE_MASK)
85 # define MAX_RESERVED_VA (1ul << TARGET_VIRT_ADDR_SPACE_BITS)
88 # define MAX_RESERVED_VA 0
92 /* That said, reserving *too* much vm space via mmap can run into problems
93 with rlimits, oom due to page table creation, etc. We will still try it,
94 if directed by the command-line option, but not by default. */
95 #if HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32
96 unsigned long reserved_va
= MAX_RESERVED_VA
;
98 uintptr_t reserved_va
;
101 static void usage(int exitcode
);
103 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
104 const char *qemu_uname_release
;
106 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
107 we allocate a bigger stack. Need a better solution, for example
108 by remapping the process stack directly at the right place */
109 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
111 void gemu_log(const char *fmt
, ...)
116 vfprintf(stderr
, fmt
, ap
);
120 #if defined(TARGET_I386)
121 int cpu_get_pic_interrupt(CPUX86State
*env
)
127 /***********************************************************/
128 /* Helper routines for implementing atomic operations. */
130 /* Make sure everything is in a consistent state for calling fork(). */
131 void fork_start(void)
134 qemu_mutex_lock(&tb_ctx
.tb_lock
);
138 void fork_end(int child
)
140 mmap_fork_end(child
);
142 CPUState
*cpu
, *next_cpu
;
143 /* Child processes created by fork() only have a single thread.
144 Discard information about the parent threads. */
145 CPU_FOREACH_SAFE(cpu
, next_cpu
) {
146 if (cpu
!= thread_cpu
) {
147 QTAILQ_REMOVE(&cpus
, cpu
, node
);
150 qemu_mutex_init(&tb_ctx
.tb_lock
);
151 qemu_init_cpu_list();
152 gdbserver_fork(thread_cpu
);
154 qemu_mutex_unlock(&tb_ctx
.tb_lock
);
160 /***********************************************************/
161 /* CPUX86 core interface */
163 uint64_t cpu_get_tsc(CPUX86State
*env
)
165 return cpu_get_host_ticks();
168 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
173 e1
= (addr
<< 16) | (limit
& 0xffff);
174 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
181 static uint64_t *idt_table
;
183 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
184 uint64_t addr
, unsigned int sel
)
187 e1
= (addr
& 0xffff) | (sel
<< 16);
188 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
192 p
[2] = tswap32(addr
>> 32);
195 /* only dpl matters as we do only user space emulation */
196 static void set_idt(int n
, unsigned int dpl
)
198 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
201 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
202 uint32_t addr
, unsigned int sel
)
205 e1
= (addr
& 0xffff) | (sel
<< 16);
206 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
212 /* only dpl matters as we do only user space emulation */
213 static void set_idt(int n
, unsigned int dpl
)
215 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
219 void cpu_loop(CPUX86State
*env
)
221 CPUState
*cs
= CPU(x86_env_get_cpu(env
));
225 target_siginfo_t info
;
233 trapnr
= cpu_exec(cs
);
235 process_queued_cpu_work(cs
);
239 /* linux syscall from int $0x80 */
240 ret
= do_syscall(env
,
249 if (ret
== -TARGET_ERESTARTSYS
) {
251 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
252 env
->regs
[R_EAX
] = ret
;
257 /* linux syscall from syscall instruction */
258 ret
= do_syscall(env
,
267 if (ret
== -TARGET_ERESTARTSYS
) {
269 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
270 env
->regs
[R_EAX
] = ret
;
277 case TARGET_VSYSCALL_ADDR(__NR_vgettimeofday
):
278 syscall_num
= __NR_gettimeofday
;
280 case TARGET_VSYSCALL_ADDR(__NR_vtime
):
282 syscall_num
= __NR_time
;
284 /* XXX: not yet implemented (arm eabi host) */
285 cpu_abort(cs
, "Unimplemented vsyscall vtime");
288 case TARGET_VSYSCALL_ADDR(__NR_vgetcpu
):
289 /* XXX: not yet implemented */
290 cpu_abort(cs
, "Unimplemented vsyscall vgetcpu");
294 "Invalid vsyscall to address " TARGET_FMT_lx
"\n",
297 env
->regs
[R_EAX
] = do_syscall(env
,
307 get_user_u64(val
, env
->regs
[R_ESP
]);
309 env
->regs
[R_ESP
] += 8;
314 info
.si_signo
= TARGET_SIGBUS
;
316 info
.si_code
= TARGET_SI_KERNEL
;
317 info
._sifields
._sigfault
._addr
= 0;
318 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
321 /* XXX: potential problem if ABI32 */
322 #ifndef TARGET_X86_64
323 if (env
->eflags
& VM_MASK
) {
324 handle_vm86_fault(env
);
328 info
.si_signo
= TARGET_SIGSEGV
;
330 info
.si_code
= TARGET_SI_KERNEL
;
331 info
._sifields
._sigfault
._addr
= 0;
332 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
336 info
.si_signo
= TARGET_SIGSEGV
;
338 if (!(env
->error_code
& 1))
339 info
.si_code
= TARGET_SEGV_MAPERR
;
341 info
.si_code
= TARGET_SEGV_ACCERR
;
342 info
._sifields
._sigfault
._addr
= env
->cr
[2];
343 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
346 #ifndef TARGET_X86_64
347 if (env
->eflags
& VM_MASK
) {
348 handle_vm86_trap(env
, trapnr
);
352 /* division by zero */
353 info
.si_signo
= TARGET_SIGFPE
;
355 info
.si_code
= TARGET_FPE_INTDIV
;
356 info
._sifields
._sigfault
._addr
= env
->eip
;
357 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
362 #ifndef TARGET_X86_64
363 if (env
->eflags
& VM_MASK
) {
364 handle_vm86_trap(env
, trapnr
);
368 info
.si_signo
= TARGET_SIGTRAP
;
370 if (trapnr
== EXCP01_DB
) {
371 info
.si_code
= TARGET_TRAP_BRKPT
;
372 info
._sifields
._sigfault
._addr
= env
->eip
;
374 info
.si_code
= TARGET_SI_KERNEL
;
375 info
._sifields
._sigfault
._addr
= 0;
377 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
382 #ifndef TARGET_X86_64
383 if (env
->eflags
& VM_MASK
) {
384 handle_vm86_trap(env
, trapnr
);
388 info
.si_signo
= TARGET_SIGSEGV
;
390 info
.si_code
= TARGET_SI_KERNEL
;
391 info
._sifields
._sigfault
._addr
= 0;
392 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
396 info
.si_signo
= TARGET_SIGILL
;
398 info
.si_code
= TARGET_ILL_ILLOPN
;
399 info
._sifields
._sigfault
._addr
= env
->eip
;
400 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
403 /* just indicate that signals should be handled asap */
409 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
414 info
.si_code
= TARGET_TRAP_BRKPT
;
415 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
420 cpu_exec_step_atomic(cs
);
423 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
424 EXCP_DUMP(env
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
428 process_pending_signals(env
);
435 #define get_user_code_u32(x, gaddr, env) \
436 ({ abi_long __r = get_user_u32((x), (gaddr)); \
437 if (!__r && bswap_code(arm_sctlr_b(env))) { \
443 #define get_user_code_u16(x, gaddr, env) \
444 ({ abi_long __r = get_user_u16((x), (gaddr)); \
445 if (!__r && bswap_code(arm_sctlr_b(env))) { \
451 #define get_user_data_u32(x, gaddr, env) \
452 ({ abi_long __r = get_user_u32((x), (gaddr)); \
453 if (!__r && arm_cpu_bswap_data(env)) { \
459 #define get_user_data_u16(x, gaddr, env) \
460 ({ abi_long __r = get_user_u16((x), (gaddr)); \
461 if (!__r && arm_cpu_bswap_data(env)) { \
467 #define put_user_data_u32(x, gaddr, env) \
468 ({ typeof(x) __x = (x); \
469 if (arm_cpu_bswap_data(env)) { \
470 __x = bswap32(__x); \
472 put_user_u32(__x, (gaddr)); \
475 #define put_user_data_u16(x, gaddr, env) \
476 ({ typeof(x) __x = (x); \
477 if (arm_cpu_bswap_data(env)) { \
478 __x = bswap16(__x); \
480 put_user_u16(__x, (gaddr)); \
484 /* Commpage handling -- there is no commpage for AArch64 */
487 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
489 * r0 = pointer to oldval
490 * r1 = pointer to newval
491 * r2 = pointer to target value
494 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
495 * C set if *ptr was changed, clear if no exchange happened
497 * Note segv's in kernel helpers are a bit tricky, we can set the
498 * data address sensibly but the PC address is just the entry point.
500 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
502 uint64_t oldval
, newval
, val
;
504 target_siginfo_t info
;
506 /* Based on the 32 bit code in do_kernel_trap */
508 /* XXX: This only works between threads, not between processes.
509 It's probably possible to implement this with native host
510 operations. However things like ldrex/strex are much harder so
511 there's not much point trying. */
513 cpsr
= cpsr_read(env
);
516 if (get_user_u64(oldval
, env
->regs
[0])) {
517 env
->exception
.vaddress
= env
->regs
[0];
521 if (get_user_u64(newval
, env
->regs
[1])) {
522 env
->exception
.vaddress
= env
->regs
[1];
526 if (get_user_u64(val
, addr
)) {
527 env
->exception
.vaddress
= addr
;
534 if (put_user_u64(val
, addr
)) {
535 env
->exception
.vaddress
= addr
;
545 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
551 /* We get the PC of the entry address - which is as good as anything,
552 on a real kernel what you get depends on which mode it uses. */
553 info
.si_signo
= TARGET_SIGSEGV
;
555 /* XXX: check env->error_code */
556 info
.si_code
= TARGET_SEGV_MAPERR
;
557 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
558 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
561 /* Handle a jump to the kernel code page. */
563 do_kernel_trap(CPUARMState
*env
)
569 switch (env
->regs
[15]) {
570 case 0xffff0fa0: /* __kernel_memory_barrier */
571 /* ??? No-op. Will need to do better for SMP. */
573 case 0xffff0fc0: /* __kernel_cmpxchg */
574 /* XXX: This only works between threads, not between processes.
575 It's probably possible to implement this with native host
576 operations. However things like ldrex/strex are much harder so
577 there's not much point trying. */
579 cpsr
= cpsr_read(env
);
581 /* FIXME: This should SEGV if the access fails. */
582 if (get_user_u32(val
, addr
))
584 if (val
== env
->regs
[0]) {
586 /* FIXME: Check for segfaults. */
587 put_user_u32(val
, addr
);
594 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
597 case 0xffff0fe0: /* __kernel_get_tls */
598 env
->regs
[0] = cpu_get_tls(env
);
600 case 0xffff0f60: /* __kernel_cmpxchg64 */
601 arm_kernel_cmpxchg64_helper(env
);
607 /* Jump back to the caller. */
608 addr
= env
->regs
[14];
613 env
->regs
[15] = addr
;
618 void cpu_loop(CPUARMState
*env
)
620 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
622 unsigned int n
, insn
;
623 target_siginfo_t info
;
629 trapnr
= cpu_exec(cs
);
631 process_queued_cpu_work(cs
);
638 TaskState
*ts
= cs
->opaque
;
642 /* we handle the FPU emulation here, as Linux */
643 /* we get the opcode */
644 /* FIXME - what to do if get_user() fails? */
645 get_user_code_u32(opcode
, env
->regs
[15], env
);
647 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
648 if (rc
== 0) { /* illegal instruction */
649 info
.si_signo
= TARGET_SIGILL
;
651 info
.si_code
= TARGET_ILL_ILLOPN
;
652 info
._sifields
._sigfault
._addr
= env
->regs
[15];
653 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
654 } else if (rc
< 0) { /* FP exception */
657 /* translate softfloat flags to FPSR flags */
658 if (-rc
& float_flag_invalid
)
660 if (-rc
& float_flag_divbyzero
)
662 if (-rc
& float_flag_overflow
)
664 if (-rc
& float_flag_underflow
)
666 if (-rc
& float_flag_inexact
)
669 FPSR fpsr
= ts
->fpa
.fpsr
;
670 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
672 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
673 info
.si_signo
= TARGET_SIGFPE
;
676 /* ordered by priority, least first */
677 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
678 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
679 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
680 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
681 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
683 info
._sifields
._sigfault
._addr
= env
->regs
[15];
684 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
689 /* accumulate unenabled exceptions */
690 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
692 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
694 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
696 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
698 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
701 } else { /* everything OK */
712 if (trapnr
== EXCP_BKPT
) {
714 /* FIXME - what to do if get_user() fails? */
715 get_user_code_u16(insn
, env
->regs
[15], env
);
719 /* FIXME - what to do if get_user() fails? */
720 get_user_code_u32(insn
, env
->regs
[15], env
);
721 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
726 /* FIXME - what to do if get_user() fails? */
727 get_user_code_u16(insn
, env
->regs
[15] - 2, env
);
730 /* FIXME - what to do if get_user() fails? */
731 get_user_code_u32(insn
, env
->regs
[15] - 4, env
);
736 if (n
== ARM_NR_cacheflush
) {
738 } else if (n
== ARM_NR_semihosting
739 || n
== ARM_NR_thumb_semihosting
) {
740 env
->regs
[0] = do_arm_semihosting (env
);
741 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
743 if (env
->thumb
|| n
== 0) {
746 n
-= ARM_SYSCALL_BASE
;
749 if ( n
> ARM_NR_BASE
) {
751 case ARM_NR_cacheflush
:
755 cpu_set_tls(env
, env
->regs
[0]);
758 case ARM_NR_breakpoint
:
759 env
->regs
[15] -= env
->thumb
? 2 : 4;
762 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
764 env
->regs
[0] = -TARGET_ENOSYS
;
768 ret
= do_syscall(env
,
777 if (ret
== -TARGET_ERESTARTSYS
) {
778 env
->regs
[15] -= env
->thumb
? 2 : 4;
779 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
789 env
->regs
[0] = do_arm_semihosting(env
);
792 /* just indicate that signals should be handled asap */
794 case EXCP_PREFETCH_ABORT
:
795 case EXCP_DATA_ABORT
:
796 addr
= env
->exception
.vaddress
;
798 info
.si_signo
= TARGET_SIGSEGV
;
800 /* XXX: check env->error_code */
801 info
.si_code
= TARGET_SEGV_MAPERR
;
802 info
._sifields
._sigfault
._addr
= addr
;
803 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
811 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
816 info
.si_code
= TARGET_TRAP_BRKPT
;
817 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
821 case EXCP_KERNEL_TRAP
:
822 if (do_kernel_trap(env
))
826 /* nothing to do here for user-mode, just resume guest code */
829 cpu_exec_step_atomic(cs
);
833 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
836 process_pending_signals(env
);
842 /* AArch64 main loop */
843 void cpu_loop(CPUARMState
*env
)
845 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
848 target_siginfo_t info
;
852 trapnr
= cpu_exec(cs
);
854 process_queued_cpu_work(cs
);
858 ret
= do_syscall(env
,
867 if (ret
== -TARGET_ERESTARTSYS
) {
869 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
874 /* just indicate that signals should be handled asap */
877 info
.si_signo
= TARGET_SIGILL
;
879 info
.si_code
= TARGET_ILL_ILLOPN
;
880 info
._sifields
._sigfault
._addr
= env
->pc
;
881 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
883 case EXCP_PREFETCH_ABORT
:
884 case EXCP_DATA_ABORT
:
885 info
.si_signo
= TARGET_SIGSEGV
;
887 /* XXX: check env->error_code */
888 info
.si_code
= TARGET_SEGV_MAPERR
;
889 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
890 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
894 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
898 info
.si_code
= TARGET_TRAP_BRKPT
;
899 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
903 env
->xregs
[0] = do_arm_semihosting(env
);
906 /* nothing to do here for user-mode, just resume guest code */
909 cpu_exec_step_atomic(cs
);
912 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
915 process_pending_signals(env
);
916 /* Exception return on AArch64 always clears the exclusive monitor,
917 * so any return to running guest code implies this.
919 env
->exclusive_addr
= -1;
922 #endif /* ndef TARGET_ABI32 */
926 #ifdef TARGET_UNICORE32
928 void cpu_loop(CPUUniCore32State
*env
)
930 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
932 unsigned int n
, insn
;
933 target_siginfo_t info
;
937 trapnr
= cpu_exec(cs
);
939 process_queued_cpu_work(cs
);
945 get_user_u32(insn
, env
->regs
[31] - 4);
948 if (n
>= UC32_SYSCALL_BASE
) {
950 n
-= UC32_SYSCALL_BASE
;
951 if (n
== UC32_SYSCALL_NR_set_tls
) {
952 cpu_set_tls(env
, env
->regs
[0]);
955 abi_long ret
= do_syscall(env
,
964 if (ret
== -TARGET_ERESTARTSYS
) {
966 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
975 case UC32_EXCP_DTRAP
:
976 case UC32_EXCP_ITRAP
:
977 info
.si_signo
= TARGET_SIGSEGV
;
979 /* XXX: check env->error_code */
980 info
.si_code
= TARGET_SEGV_MAPERR
;
981 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
982 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
985 /* just indicate that signals should be handled asap */
991 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
995 info
.si_code
= TARGET_TRAP_BRKPT
;
996 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1001 cpu_exec_step_atomic(cs
);
1006 process_pending_signals(env
);
1010 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
1016 #define SPARC64_STACK_BIAS 2047
1020 /* WARNING: dealing with register windows _is_ complicated. More info
1021 can be found at http://www.sics.se/~psm/sparcstack.html */
1022 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
1024 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
1025 /* wrap handling : if cwp is on the last window, then we use the
1026 registers 'after' the end */
1027 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
1028 index
+= 16 * env
->nwindows
;
1032 /* save the register window 'cwp1' */
1033 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
1038 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1039 #ifdef TARGET_SPARC64
1041 sp_ptr
+= SPARC64_STACK_BIAS
;
1043 #if defined(DEBUG_WIN)
1044 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1047 for(i
= 0; i
< 16; i
++) {
1048 /* FIXME - what to do if put_user() fails? */
1049 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1050 sp_ptr
+= sizeof(abi_ulong
);
1054 static void save_window(CPUSPARCState
*env
)
1056 #ifndef TARGET_SPARC64
1057 unsigned int new_wim
;
1058 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1059 ((1LL << env
->nwindows
) - 1);
1060 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1063 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1069 static void restore_window(CPUSPARCState
*env
)
1071 #ifndef TARGET_SPARC64
1072 unsigned int new_wim
;
1074 unsigned int i
, cwp1
;
1077 #ifndef TARGET_SPARC64
1078 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1079 ((1LL << env
->nwindows
) - 1);
1082 /* restore the invalid window */
1083 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1084 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1085 #ifdef TARGET_SPARC64
1087 sp_ptr
+= SPARC64_STACK_BIAS
;
1089 #if defined(DEBUG_WIN)
1090 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1093 for(i
= 0; i
< 16; i
++) {
1094 /* FIXME - what to do if get_user() fails? */
1095 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1096 sp_ptr
+= sizeof(abi_ulong
);
1098 #ifdef TARGET_SPARC64
1100 if (env
->cleanwin
< env
->nwindows
- 1)
1108 static void flush_windows(CPUSPARCState
*env
)
1114 /* if restore would invoke restore_window(), then we can stop */
1115 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1116 #ifndef TARGET_SPARC64
1117 if (env
->wim
& (1 << cwp1
))
1120 if (env
->canrestore
== 0)
1125 save_window_offset(env
, cwp1
);
1128 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1129 #ifndef TARGET_SPARC64
1130 /* set wim so that restore will reload the registers */
1131 env
->wim
= 1 << cwp1
;
1133 #if defined(DEBUG_WIN)
1134 printf("flush_windows: nb=%d\n", offset
- 1);
1138 void cpu_loop (CPUSPARCState
*env
)
1140 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1143 target_siginfo_t info
;
1147 trapnr
= cpu_exec(cs
);
1149 process_queued_cpu_work(cs
);
1151 /* Compute PSR before exposing state. */
1152 if (env
->cc_op
!= CC_OP_FLAGS
) {
1157 #ifndef TARGET_SPARC64
1164 ret
= do_syscall (env
, env
->gregs
[1],
1165 env
->regwptr
[0], env
->regwptr
[1],
1166 env
->regwptr
[2], env
->regwptr
[3],
1167 env
->regwptr
[4], env
->regwptr
[5],
1169 if (ret
== -TARGET_ERESTARTSYS
|| ret
== -TARGET_QEMU_ESIGRETURN
) {
1172 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1173 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1174 env
->xcc
|= PSR_CARRY
;
1176 env
->psr
|= PSR_CARRY
;
1180 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1181 env
->xcc
&= ~PSR_CARRY
;
1183 env
->psr
&= ~PSR_CARRY
;
1186 env
->regwptr
[0] = ret
;
1187 /* next instruction */
1189 env
->npc
= env
->npc
+ 4;
1191 case 0x83: /* flush windows */
1196 /* next instruction */
1198 env
->npc
= env
->npc
+ 4;
1200 #ifndef TARGET_SPARC64
1201 case TT_WIN_OVF
: /* window overflow */
1204 case TT_WIN_UNF
: /* window underflow */
1205 restore_window(env
);
1210 info
.si_signo
= TARGET_SIGSEGV
;
1212 /* XXX: check env->error_code */
1213 info
.si_code
= TARGET_SEGV_MAPERR
;
1214 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1215 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1219 case TT_SPILL
: /* window overflow */
1222 case TT_FILL
: /* window underflow */
1223 restore_window(env
);
1228 info
.si_signo
= TARGET_SIGSEGV
;
1230 /* XXX: check env->error_code */
1231 info
.si_code
= TARGET_SEGV_MAPERR
;
1232 if (trapnr
== TT_DFAULT
)
1233 info
._sifields
._sigfault
._addr
= env
->dmmu
.mmuregs
[4];
1235 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1236 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1239 #ifndef TARGET_ABI32
1242 sparc64_get_context(env
);
1246 sparc64_set_context(env
);
1250 case EXCP_INTERRUPT
:
1251 /* just indicate that signals should be handled asap */
1255 info
.si_signo
= TARGET_SIGILL
;
1257 info
.si_code
= TARGET_ILL_ILLOPC
;
1258 info
._sifields
._sigfault
._addr
= env
->pc
;
1259 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1266 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1269 info
.si_signo
= sig
;
1271 info
.si_code
= TARGET_TRAP_BRKPT
;
1272 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1277 cpu_exec_step_atomic(cs
);
1280 printf ("Unhandled trap: 0x%x\n", trapnr
);
1281 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1284 process_pending_signals (env
);
1291 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1293 return cpu_get_host_ticks();
1296 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1298 return cpu_ppc_get_tb(env
);
1301 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1303 return cpu_ppc_get_tb(env
) >> 32;
1306 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1308 return cpu_ppc_get_tb(env
);
1311 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1313 return cpu_ppc_get_tb(env
) >> 32;
1316 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1317 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1319 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1321 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1324 /* XXX: to be fixed */
1325 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1330 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1335 static int do_store_exclusive(CPUPPCState
*env
)
1338 target_ulong page_addr
;
1339 target_ulong val
, val2
__attribute__((unused
)) = 0;
1343 addr
= env
->reserve_ea
;
1344 page_addr
= addr
& TARGET_PAGE_MASK
;
1347 flags
= page_get_flags(page_addr
);
1348 if ((flags
& PAGE_READ
) == 0) {
1351 int reg
= env
->reserve_info
& 0x1f;
1352 int size
= env
->reserve_info
>> 5;
1355 if (addr
== env
->reserve_addr
) {
1357 case 1: segv
= get_user_u8(val
, addr
); break;
1358 case 2: segv
= get_user_u16(val
, addr
); break;
1359 case 4: segv
= get_user_u32(val
, addr
); break;
1360 #if defined(TARGET_PPC64)
1361 case 8: segv
= get_user_u64(val
, addr
); break;
1363 segv
= get_user_u64(val
, addr
);
1365 segv
= get_user_u64(val2
, addr
+ 8);
1372 if (!segv
&& val
== env
->reserve_val
) {
1373 val
= env
->gpr
[reg
];
1375 case 1: segv
= put_user_u8(val
, addr
); break;
1376 case 2: segv
= put_user_u16(val
, addr
); break;
1377 case 4: segv
= put_user_u32(val
, addr
); break;
1378 #if defined(TARGET_PPC64)
1379 case 8: segv
= put_user_u64(val
, addr
); break;
1381 if (val2
== env
->reserve_val2
) {
1384 val
= env
->gpr
[reg
+1];
1386 val2
= env
->gpr
[reg
+1];
1388 segv
= put_user_u64(val
, addr
);
1390 segv
= put_user_u64(val2
, addr
+ 8);
1403 env
->crf
[0] = (stored
<< 1) | xer_so
;
1404 env
->reserve_addr
= (target_ulong
)-1;
1414 void cpu_loop(CPUPPCState
*env
)
1416 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1417 target_siginfo_t info
;
1423 trapnr
= cpu_exec(cs
);
1425 process_queued_cpu_work(cs
);
1428 case POWERPC_EXCP_NONE
:
1431 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1432 cpu_abort(cs
, "Critical interrupt while in user mode. "
1435 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1436 cpu_abort(cs
, "Machine check exception while in user mode. "
1439 case POWERPC_EXCP_DSI
: /* Data storage exception */
1440 /* XXX: check this. Seems bugged */
1441 switch (env
->error_code
& 0xFF000000) {
1444 info
.si_signo
= TARGET_SIGSEGV
;
1446 info
.si_code
= TARGET_SEGV_MAPERR
;
1449 info
.si_signo
= TARGET_SIGILL
;
1451 info
.si_code
= TARGET_ILL_ILLADR
;
1454 info
.si_signo
= TARGET_SIGSEGV
;
1456 info
.si_code
= TARGET_SEGV_ACCERR
;
1459 /* Let's send a regular segfault... */
1460 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1462 info
.si_signo
= TARGET_SIGSEGV
;
1464 info
.si_code
= TARGET_SEGV_MAPERR
;
1467 info
._sifields
._sigfault
._addr
= env
->spr
[SPR_DAR
];
1468 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1470 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1471 /* XXX: check this */
1472 switch (env
->error_code
& 0xFF000000) {
1474 info
.si_signo
= TARGET_SIGSEGV
;
1476 info
.si_code
= TARGET_SEGV_MAPERR
;
1480 info
.si_signo
= TARGET_SIGSEGV
;
1482 info
.si_code
= TARGET_SEGV_ACCERR
;
1485 /* Let's send a regular segfault... */
1486 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1488 info
.si_signo
= TARGET_SIGSEGV
;
1490 info
.si_code
= TARGET_SEGV_MAPERR
;
1493 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1494 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1496 case POWERPC_EXCP_EXTERNAL
: /* External input */
1497 cpu_abort(cs
, "External interrupt while in user mode. "
1500 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1501 /* XXX: check this */
1502 info
.si_signo
= TARGET_SIGBUS
;
1504 info
.si_code
= TARGET_BUS_ADRALN
;
1505 info
._sifields
._sigfault
._addr
= env
->nip
;
1506 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1508 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1509 case POWERPC_EXCP_HV_EMU
: /* HV emulation */
1510 /* XXX: check this */
1511 switch (env
->error_code
& ~0xF) {
1512 case POWERPC_EXCP_FP
:
1513 info
.si_signo
= TARGET_SIGFPE
;
1515 switch (env
->error_code
& 0xF) {
1516 case POWERPC_EXCP_FP_OX
:
1517 info
.si_code
= TARGET_FPE_FLTOVF
;
1519 case POWERPC_EXCP_FP_UX
:
1520 info
.si_code
= TARGET_FPE_FLTUND
;
1522 case POWERPC_EXCP_FP_ZX
:
1523 case POWERPC_EXCP_FP_VXZDZ
:
1524 info
.si_code
= TARGET_FPE_FLTDIV
;
1526 case POWERPC_EXCP_FP_XX
:
1527 info
.si_code
= TARGET_FPE_FLTRES
;
1529 case POWERPC_EXCP_FP_VXSOFT
:
1530 info
.si_code
= TARGET_FPE_FLTINV
;
1532 case POWERPC_EXCP_FP_VXSNAN
:
1533 case POWERPC_EXCP_FP_VXISI
:
1534 case POWERPC_EXCP_FP_VXIDI
:
1535 case POWERPC_EXCP_FP_VXIMZ
:
1536 case POWERPC_EXCP_FP_VXVC
:
1537 case POWERPC_EXCP_FP_VXSQRT
:
1538 case POWERPC_EXCP_FP_VXCVI
:
1539 info
.si_code
= TARGET_FPE_FLTSUB
;
1542 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1547 case POWERPC_EXCP_INVAL
:
1548 info
.si_signo
= TARGET_SIGILL
;
1550 switch (env
->error_code
& 0xF) {
1551 case POWERPC_EXCP_INVAL_INVAL
:
1552 info
.si_code
= TARGET_ILL_ILLOPC
;
1554 case POWERPC_EXCP_INVAL_LSWX
:
1555 info
.si_code
= TARGET_ILL_ILLOPN
;
1557 case POWERPC_EXCP_INVAL_SPR
:
1558 info
.si_code
= TARGET_ILL_PRVREG
;
1560 case POWERPC_EXCP_INVAL_FP
:
1561 info
.si_code
= TARGET_ILL_COPROC
;
1564 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1565 env
->error_code
& 0xF);
1566 info
.si_code
= TARGET_ILL_ILLADR
;
1570 case POWERPC_EXCP_PRIV
:
1571 info
.si_signo
= TARGET_SIGILL
;
1573 switch (env
->error_code
& 0xF) {
1574 case POWERPC_EXCP_PRIV_OPC
:
1575 info
.si_code
= TARGET_ILL_PRVOPC
;
1577 case POWERPC_EXCP_PRIV_REG
:
1578 info
.si_code
= TARGET_ILL_PRVREG
;
1581 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1582 env
->error_code
& 0xF);
1583 info
.si_code
= TARGET_ILL_PRVOPC
;
1587 case POWERPC_EXCP_TRAP
:
1588 cpu_abort(cs
, "Tried to call a TRAP\n");
1591 /* Should not happen ! */
1592 cpu_abort(cs
, "Unknown program exception (%02x)\n",
1596 info
._sifields
._sigfault
._addr
= env
->nip
;
1597 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1599 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1600 info
.si_signo
= TARGET_SIGILL
;
1602 info
.si_code
= TARGET_ILL_COPROC
;
1603 info
._sifields
._sigfault
._addr
= env
->nip
;
1604 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1606 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1607 cpu_abort(cs
, "Syscall exception while in user mode. "
1610 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1611 info
.si_signo
= TARGET_SIGILL
;
1613 info
.si_code
= TARGET_ILL_COPROC
;
1614 info
._sifields
._sigfault
._addr
= env
->nip
;
1615 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1617 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1618 cpu_abort(cs
, "Decrementer interrupt while in user mode. "
1621 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1622 cpu_abort(cs
, "Fix interval timer interrupt while in user mode. "
1625 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1626 cpu_abort(cs
, "Watchdog timer interrupt while in user mode. "
1629 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1630 cpu_abort(cs
, "Data TLB exception while in user mode. "
1633 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1634 cpu_abort(cs
, "Instruction TLB exception while in user mode. "
1637 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1638 info
.si_signo
= TARGET_SIGILL
;
1640 info
.si_code
= TARGET_ILL_COPROC
;
1641 info
._sifields
._sigfault
._addr
= env
->nip
;
1642 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1644 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1645 cpu_abort(cs
, "Embedded floating-point data IRQ not handled\n");
1647 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1648 cpu_abort(cs
, "Embedded floating-point round IRQ not handled\n");
1650 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1651 cpu_abort(cs
, "Performance monitor exception not handled\n");
1653 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1654 cpu_abort(cs
, "Doorbell interrupt while in user mode. "
1657 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1658 cpu_abort(cs
, "Doorbell critical interrupt while in user mode. "
1661 case POWERPC_EXCP_RESET
: /* System reset exception */
1662 cpu_abort(cs
, "Reset interrupt while in user mode. "
1665 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1666 cpu_abort(cs
, "Data segment exception while in user mode. "
1669 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1670 cpu_abort(cs
, "Instruction segment exception "
1671 "while in user mode. Aborting\n");
1673 /* PowerPC 64 with hypervisor mode support */
1674 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1675 cpu_abort(cs
, "Hypervisor decrementer interrupt "
1676 "while in user mode. Aborting\n");
1678 case POWERPC_EXCP_TRACE
: /* Trace exception */
1680 * we use this exception to emulate step-by-step execution mode.
1683 /* PowerPC 64 with hypervisor mode support */
1684 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1685 cpu_abort(cs
, "Hypervisor data storage exception "
1686 "while in user mode. Aborting\n");
1688 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1689 cpu_abort(cs
, "Hypervisor instruction storage exception "
1690 "while in user mode. Aborting\n");
1692 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1693 cpu_abort(cs
, "Hypervisor data segment exception "
1694 "while in user mode. Aborting\n");
1696 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1697 cpu_abort(cs
, "Hypervisor instruction segment exception "
1698 "while in user mode. Aborting\n");
1700 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1701 info
.si_signo
= TARGET_SIGILL
;
1703 info
.si_code
= TARGET_ILL_COPROC
;
1704 info
._sifields
._sigfault
._addr
= env
->nip
;
1705 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1707 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1708 cpu_abort(cs
, "Programmable interval timer interrupt "
1709 "while in user mode. Aborting\n");
1711 case POWERPC_EXCP_IO
: /* IO error exception */
1712 cpu_abort(cs
, "IO error exception while in user mode. "
1715 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1716 cpu_abort(cs
, "Run mode exception while in user mode. "
1719 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1720 cpu_abort(cs
, "Emulation trap exception not handled\n");
1722 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1723 cpu_abort(cs
, "Instruction fetch TLB exception "
1724 "while in user-mode. Aborting");
1726 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1727 cpu_abort(cs
, "Data load TLB exception while in user-mode. "
1730 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1731 cpu_abort(cs
, "Data store TLB exception while in user-mode. "
1734 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1735 cpu_abort(cs
, "Floating-point assist exception not handled\n");
1737 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1738 cpu_abort(cs
, "Instruction address breakpoint exception "
1741 case POWERPC_EXCP_SMI
: /* System management interrupt */
1742 cpu_abort(cs
, "System management interrupt while in user mode. "
1745 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1746 cpu_abort(cs
, "Thermal interrupt interrupt while in user mode. "
1749 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1750 cpu_abort(cs
, "Performance monitor exception not handled\n");
1752 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1753 cpu_abort(cs
, "Vector assist exception not handled\n");
1755 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1756 cpu_abort(cs
, "Soft patch exception not handled\n");
1758 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1759 cpu_abort(cs
, "Maintenance exception while in user mode. "
1762 case POWERPC_EXCP_STOP
: /* stop translation */
1763 /* We did invalidate the instruction cache. Go on */
1765 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1766 /* We just stopped because of a branch. Go on */
1768 case POWERPC_EXCP_SYSCALL_USER
:
1769 /* system call in user-mode emulation */
1771 * PPC ABI uses overflow flag in cr0 to signal an error
1774 env
->crf
[0] &= ~0x1;
1776 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1777 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1779 if (ret
== -TARGET_ERESTARTSYS
) {
1783 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1784 /* Returning from a successful sigreturn syscall.
1785 Avoid corrupting register state. */
1788 if (ret
> (target_ulong
)(-515)) {
1794 case POWERPC_EXCP_STCX
:
1795 if (do_store_exclusive(env
)) {
1796 info
.si_signo
= TARGET_SIGSEGV
;
1798 info
.si_code
= TARGET_SEGV_MAPERR
;
1799 info
._sifields
._sigfault
._addr
= env
->nip
;
1800 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1807 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1809 info
.si_signo
= sig
;
1811 info
.si_code
= TARGET_TRAP_BRKPT
;
1812 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1816 case EXCP_INTERRUPT
:
1817 /* just indicate that signals should be handled asap */
1820 cpu_exec_step_atomic(cs
);
1823 cpu_abort(cs
, "Unknown exception 0x%x. Aborting\n", trapnr
);
1826 process_pending_signals(env
);
1833 # ifdef TARGET_ABI_MIPSO32
1834 # define MIPS_SYS(name, args) args,
1835 static const uint8_t mips_syscall_args
[] = {
1836 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1837 MIPS_SYS(sys_exit
, 1)
1838 MIPS_SYS(sys_fork
, 0)
1839 MIPS_SYS(sys_read
, 3)
1840 MIPS_SYS(sys_write
, 3)
1841 MIPS_SYS(sys_open
, 3) /* 4005 */
1842 MIPS_SYS(sys_close
, 1)
1843 MIPS_SYS(sys_waitpid
, 3)
1844 MIPS_SYS(sys_creat
, 2)
1845 MIPS_SYS(sys_link
, 2)
1846 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1847 MIPS_SYS(sys_execve
, 0)
1848 MIPS_SYS(sys_chdir
, 1)
1849 MIPS_SYS(sys_time
, 1)
1850 MIPS_SYS(sys_mknod
, 3)
1851 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1852 MIPS_SYS(sys_lchown
, 3)
1853 MIPS_SYS(sys_ni_syscall
, 0)
1854 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1855 MIPS_SYS(sys_lseek
, 3)
1856 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1857 MIPS_SYS(sys_mount
, 5)
1858 MIPS_SYS(sys_umount
, 1)
1859 MIPS_SYS(sys_setuid
, 1)
1860 MIPS_SYS(sys_getuid
, 0)
1861 MIPS_SYS(sys_stime
, 1) /* 4025 */
1862 MIPS_SYS(sys_ptrace
, 4)
1863 MIPS_SYS(sys_alarm
, 1)
1864 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1865 MIPS_SYS(sys_pause
, 0)
1866 MIPS_SYS(sys_utime
, 2) /* 4030 */
1867 MIPS_SYS(sys_ni_syscall
, 0)
1868 MIPS_SYS(sys_ni_syscall
, 0)
1869 MIPS_SYS(sys_access
, 2)
1870 MIPS_SYS(sys_nice
, 1)
1871 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1872 MIPS_SYS(sys_sync
, 0)
1873 MIPS_SYS(sys_kill
, 2)
1874 MIPS_SYS(sys_rename
, 2)
1875 MIPS_SYS(sys_mkdir
, 2)
1876 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1877 MIPS_SYS(sys_dup
, 1)
1878 MIPS_SYS(sys_pipe
, 0)
1879 MIPS_SYS(sys_times
, 1)
1880 MIPS_SYS(sys_ni_syscall
, 0)
1881 MIPS_SYS(sys_brk
, 1) /* 4045 */
1882 MIPS_SYS(sys_setgid
, 1)
1883 MIPS_SYS(sys_getgid
, 0)
1884 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1885 MIPS_SYS(sys_geteuid
, 0)
1886 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1887 MIPS_SYS(sys_acct
, 0)
1888 MIPS_SYS(sys_umount2
, 2)
1889 MIPS_SYS(sys_ni_syscall
, 0)
1890 MIPS_SYS(sys_ioctl
, 3)
1891 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1892 MIPS_SYS(sys_ni_syscall
, 2)
1893 MIPS_SYS(sys_setpgid
, 2)
1894 MIPS_SYS(sys_ni_syscall
, 0)
1895 MIPS_SYS(sys_olduname
, 1)
1896 MIPS_SYS(sys_umask
, 1) /* 4060 */
1897 MIPS_SYS(sys_chroot
, 1)
1898 MIPS_SYS(sys_ustat
, 2)
1899 MIPS_SYS(sys_dup2
, 2)
1900 MIPS_SYS(sys_getppid
, 0)
1901 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1902 MIPS_SYS(sys_setsid
, 0)
1903 MIPS_SYS(sys_sigaction
, 3)
1904 MIPS_SYS(sys_sgetmask
, 0)
1905 MIPS_SYS(sys_ssetmask
, 1)
1906 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1907 MIPS_SYS(sys_setregid
, 2)
1908 MIPS_SYS(sys_sigsuspend
, 0)
1909 MIPS_SYS(sys_sigpending
, 1)
1910 MIPS_SYS(sys_sethostname
, 2)
1911 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1912 MIPS_SYS(sys_getrlimit
, 2)
1913 MIPS_SYS(sys_getrusage
, 2)
1914 MIPS_SYS(sys_gettimeofday
, 2)
1915 MIPS_SYS(sys_settimeofday
, 2)
1916 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1917 MIPS_SYS(sys_setgroups
, 2)
1918 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1919 MIPS_SYS(sys_symlink
, 2)
1920 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1921 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1922 MIPS_SYS(sys_uselib
, 1)
1923 MIPS_SYS(sys_swapon
, 2)
1924 MIPS_SYS(sys_reboot
, 3)
1925 MIPS_SYS(old_readdir
, 3)
1926 MIPS_SYS(old_mmap
, 6) /* 4090 */
1927 MIPS_SYS(sys_munmap
, 2)
1928 MIPS_SYS(sys_truncate
, 2)
1929 MIPS_SYS(sys_ftruncate
, 2)
1930 MIPS_SYS(sys_fchmod
, 2)
1931 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1932 MIPS_SYS(sys_getpriority
, 2)
1933 MIPS_SYS(sys_setpriority
, 3)
1934 MIPS_SYS(sys_ni_syscall
, 0)
1935 MIPS_SYS(sys_statfs
, 2)
1936 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1937 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1938 MIPS_SYS(sys_socketcall
, 2)
1939 MIPS_SYS(sys_syslog
, 3)
1940 MIPS_SYS(sys_setitimer
, 3)
1941 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1942 MIPS_SYS(sys_newstat
, 2)
1943 MIPS_SYS(sys_newlstat
, 2)
1944 MIPS_SYS(sys_newfstat
, 2)
1945 MIPS_SYS(sys_uname
, 1)
1946 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1947 MIPS_SYS(sys_vhangup
, 0)
1948 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1949 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1950 MIPS_SYS(sys_wait4
, 4)
1951 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1952 MIPS_SYS(sys_sysinfo
, 1)
1953 MIPS_SYS(sys_ipc
, 6)
1954 MIPS_SYS(sys_fsync
, 1)
1955 MIPS_SYS(sys_sigreturn
, 0)
1956 MIPS_SYS(sys_clone
, 6) /* 4120 */
1957 MIPS_SYS(sys_setdomainname
, 2)
1958 MIPS_SYS(sys_newuname
, 1)
1959 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1960 MIPS_SYS(sys_adjtimex
, 1)
1961 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1962 MIPS_SYS(sys_sigprocmask
, 3)
1963 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1964 MIPS_SYS(sys_init_module
, 5)
1965 MIPS_SYS(sys_delete_module
, 1)
1966 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1967 MIPS_SYS(sys_quotactl
, 0)
1968 MIPS_SYS(sys_getpgid
, 1)
1969 MIPS_SYS(sys_fchdir
, 1)
1970 MIPS_SYS(sys_bdflush
, 2)
1971 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1972 MIPS_SYS(sys_personality
, 1)
1973 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1974 MIPS_SYS(sys_setfsuid
, 1)
1975 MIPS_SYS(sys_setfsgid
, 1)
1976 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1977 MIPS_SYS(sys_getdents
, 3)
1978 MIPS_SYS(sys_select
, 5)
1979 MIPS_SYS(sys_flock
, 2)
1980 MIPS_SYS(sys_msync
, 3)
1981 MIPS_SYS(sys_readv
, 3) /* 4145 */
1982 MIPS_SYS(sys_writev
, 3)
1983 MIPS_SYS(sys_cacheflush
, 3)
1984 MIPS_SYS(sys_cachectl
, 3)
1985 MIPS_SYS(sys_sysmips
, 4)
1986 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1987 MIPS_SYS(sys_getsid
, 1)
1988 MIPS_SYS(sys_fdatasync
, 0)
1989 MIPS_SYS(sys_sysctl
, 1)
1990 MIPS_SYS(sys_mlock
, 2)
1991 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1992 MIPS_SYS(sys_mlockall
, 1)
1993 MIPS_SYS(sys_munlockall
, 0)
1994 MIPS_SYS(sys_sched_setparam
, 2)
1995 MIPS_SYS(sys_sched_getparam
, 2)
1996 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1997 MIPS_SYS(sys_sched_getscheduler
, 1)
1998 MIPS_SYS(sys_sched_yield
, 0)
1999 MIPS_SYS(sys_sched_get_priority_max
, 1)
2000 MIPS_SYS(sys_sched_get_priority_min
, 1)
2001 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
2002 MIPS_SYS(sys_nanosleep
, 2)
2003 MIPS_SYS(sys_mremap
, 5)
2004 MIPS_SYS(sys_accept
, 3)
2005 MIPS_SYS(sys_bind
, 3)
2006 MIPS_SYS(sys_connect
, 3) /* 4170 */
2007 MIPS_SYS(sys_getpeername
, 3)
2008 MIPS_SYS(sys_getsockname
, 3)
2009 MIPS_SYS(sys_getsockopt
, 5)
2010 MIPS_SYS(sys_listen
, 2)
2011 MIPS_SYS(sys_recv
, 4) /* 4175 */
2012 MIPS_SYS(sys_recvfrom
, 6)
2013 MIPS_SYS(sys_recvmsg
, 3)
2014 MIPS_SYS(sys_send
, 4)
2015 MIPS_SYS(sys_sendmsg
, 3)
2016 MIPS_SYS(sys_sendto
, 6) /* 4180 */
2017 MIPS_SYS(sys_setsockopt
, 5)
2018 MIPS_SYS(sys_shutdown
, 2)
2019 MIPS_SYS(sys_socket
, 3)
2020 MIPS_SYS(sys_socketpair
, 4)
2021 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
2022 MIPS_SYS(sys_getresuid
, 3)
2023 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
2024 MIPS_SYS(sys_poll
, 3)
2025 MIPS_SYS(sys_nfsservctl
, 3)
2026 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
2027 MIPS_SYS(sys_getresgid
, 3)
2028 MIPS_SYS(sys_prctl
, 5)
2029 MIPS_SYS(sys_rt_sigreturn
, 0)
2030 MIPS_SYS(sys_rt_sigaction
, 4)
2031 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
2032 MIPS_SYS(sys_rt_sigpending
, 2)
2033 MIPS_SYS(sys_rt_sigtimedwait
, 4)
2034 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
2035 MIPS_SYS(sys_rt_sigsuspend
, 0)
2036 MIPS_SYS(sys_pread64
, 6) /* 4200 */
2037 MIPS_SYS(sys_pwrite64
, 6)
2038 MIPS_SYS(sys_chown
, 3)
2039 MIPS_SYS(sys_getcwd
, 2)
2040 MIPS_SYS(sys_capget
, 2)
2041 MIPS_SYS(sys_capset
, 2) /* 4205 */
2042 MIPS_SYS(sys_sigaltstack
, 2)
2043 MIPS_SYS(sys_sendfile
, 4)
2044 MIPS_SYS(sys_ni_syscall
, 0)
2045 MIPS_SYS(sys_ni_syscall
, 0)
2046 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
2047 MIPS_SYS(sys_truncate64
, 4)
2048 MIPS_SYS(sys_ftruncate64
, 4)
2049 MIPS_SYS(sys_stat64
, 2)
2050 MIPS_SYS(sys_lstat64
, 2)
2051 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2052 MIPS_SYS(sys_pivot_root
, 2)
2053 MIPS_SYS(sys_mincore
, 3)
2054 MIPS_SYS(sys_madvise
, 3)
2055 MIPS_SYS(sys_getdents64
, 3)
2056 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2057 MIPS_SYS(sys_ni_syscall
, 0)
2058 MIPS_SYS(sys_gettid
, 0)
2059 MIPS_SYS(sys_readahead
, 5)
2060 MIPS_SYS(sys_setxattr
, 5)
2061 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2062 MIPS_SYS(sys_fsetxattr
, 5)
2063 MIPS_SYS(sys_getxattr
, 4)
2064 MIPS_SYS(sys_lgetxattr
, 4)
2065 MIPS_SYS(sys_fgetxattr
, 4)
2066 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2067 MIPS_SYS(sys_llistxattr
, 3)
2068 MIPS_SYS(sys_flistxattr
, 3)
2069 MIPS_SYS(sys_removexattr
, 2)
2070 MIPS_SYS(sys_lremovexattr
, 2)
2071 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2072 MIPS_SYS(sys_tkill
, 2)
2073 MIPS_SYS(sys_sendfile64
, 5)
2074 MIPS_SYS(sys_futex
, 6)
2075 MIPS_SYS(sys_sched_setaffinity
, 3)
2076 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2077 MIPS_SYS(sys_io_setup
, 2)
2078 MIPS_SYS(sys_io_destroy
, 1)
2079 MIPS_SYS(sys_io_getevents
, 5)
2080 MIPS_SYS(sys_io_submit
, 3)
2081 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2082 MIPS_SYS(sys_exit_group
, 1)
2083 MIPS_SYS(sys_lookup_dcookie
, 3)
2084 MIPS_SYS(sys_epoll_create
, 1)
2085 MIPS_SYS(sys_epoll_ctl
, 4)
2086 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2087 MIPS_SYS(sys_remap_file_pages
, 5)
2088 MIPS_SYS(sys_set_tid_address
, 1)
2089 MIPS_SYS(sys_restart_syscall
, 0)
2090 MIPS_SYS(sys_fadvise64_64
, 7)
2091 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2092 MIPS_SYS(sys_fstatfs64
, 2)
2093 MIPS_SYS(sys_timer_create
, 3)
2094 MIPS_SYS(sys_timer_settime
, 4)
2095 MIPS_SYS(sys_timer_gettime
, 2)
2096 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2097 MIPS_SYS(sys_timer_delete
, 1)
2098 MIPS_SYS(sys_clock_settime
, 2)
2099 MIPS_SYS(sys_clock_gettime
, 2)
2100 MIPS_SYS(sys_clock_getres
, 2)
2101 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2102 MIPS_SYS(sys_tgkill
, 3)
2103 MIPS_SYS(sys_utimes
, 2)
2104 MIPS_SYS(sys_mbind
, 4)
2105 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2106 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2107 MIPS_SYS(sys_mq_open
, 4)
2108 MIPS_SYS(sys_mq_unlink
, 1)
2109 MIPS_SYS(sys_mq_timedsend
, 5)
2110 MIPS_SYS(sys_mq_timedreceive
, 5)
2111 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2112 MIPS_SYS(sys_mq_getsetattr
, 3)
2113 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2114 MIPS_SYS(sys_waitid
, 4)
2115 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2116 MIPS_SYS(sys_add_key
, 5)
2117 MIPS_SYS(sys_request_key
, 4)
2118 MIPS_SYS(sys_keyctl
, 5)
2119 MIPS_SYS(sys_set_thread_area
, 1)
2120 MIPS_SYS(sys_inotify_init
, 0)
2121 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2122 MIPS_SYS(sys_inotify_rm_watch
, 2)
2123 MIPS_SYS(sys_migrate_pages
, 4)
2124 MIPS_SYS(sys_openat
, 4)
2125 MIPS_SYS(sys_mkdirat
, 3)
2126 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2127 MIPS_SYS(sys_fchownat
, 5)
2128 MIPS_SYS(sys_futimesat
, 3)
2129 MIPS_SYS(sys_fstatat64
, 4)
2130 MIPS_SYS(sys_unlinkat
, 3)
2131 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2132 MIPS_SYS(sys_linkat
, 5)
2133 MIPS_SYS(sys_symlinkat
, 3)
2134 MIPS_SYS(sys_readlinkat
, 4)
2135 MIPS_SYS(sys_fchmodat
, 3)
2136 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2137 MIPS_SYS(sys_pselect6
, 6)
2138 MIPS_SYS(sys_ppoll
, 5)
2139 MIPS_SYS(sys_unshare
, 1)
2140 MIPS_SYS(sys_splice
, 6)
2141 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2142 MIPS_SYS(sys_tee
, 4)
2143 MIPS_SYS(sys_vmsplice
, 4)
2144 MIPS_SYS(sys_move_pages
, 6)
2145 MIPS_SYS(sys_set_robust_list
, 2)
2146 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2147 MIPS_SYS(sys_kexec_load
, 4)
2148 MIPS_SYS(sys_getcpu
, 3)
2149 MIPS_SYS(sys_epoll_pwait
, 6)
2150 MIPS_SYS(sys_ioprio_set
, 3)
2151 MIPS_SYS(sys_ioprio_get
, 2)
2152 MIPS_SYS(sys_utimensat
, 4)
2153 MIPS_SYS(sys_signalfd
, 3)
2154 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2155 MIPS_SYS(sys_eventfd
, 1)
2156 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2157 MIPS_SYS(sys_timerfd_create
, 2)
2158 MIPS_SYS(sys_timerfd_gettime
, 2)
2159 MIPS_SYS(sys_timerfd_settime
, 4)
2160 MIPS_SYS(sys_signalfd4
, 4)
2161 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2162 MIPS_SYS(sys_epoll_create1
, 1)
2163 MIPS_SYS(sys_dup3
, 3)
2164 MIPS_SYS(sys_pipe2
, 2)
2165 MIPS_SYS(sys_inotify_init1
, 1)
2166 MIPS_SYS(sys_preadv
, 5) /* 4330 */
2167 MIPS_SYS(sys_pwritev
, 5)
2168 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2169 MIPS_SYS(sys_perf_event_open
, 5)
2170 MIPS_SYS(sys_accept4
, 4)
2171 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2172 MIPS_SYS(sys_fanotify_init
, 2)
2173 MIPS_SYS(sys_fanotify_mark
, 6)
2174 MIPS_SYS(sys_prlimit64
, 4)
2175 MIPS_SYS(sys_name_to_handle_at
, 5)
2176 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2177 MIPS_SYS(sys_clock_adjtime
, 2)
2178 MIPS_SYS(sys_syncfs
, 1)
2179 MIPS_SYS(sys_sendmmsg
, 4)
2180 MIPS_SYS(sys_setns
, 2)
2181 MIPS_SYS(sys_process_vm_readv
, 6) /* 345 */
2182 MIPS_SYS(sys_process_vm_writev
, 6)
2183 MIPS_SYS(sys_kcmp
, 5)
2184 MIPS_SYS(sys_finit_module
, 3)
2185 MIPS_SYS(sys_sched_setattr
, 2)
2186 MIPS_SYS(sys_sched_getattr
, 3) /* 350 */
2187 MIPS_SYS(sys_renameat2
, 5)
2188 MIPS_SYS(sys_seccomp
, 3)
2189 MIPS_SYS(sys_getrandom
, 3)
2190 MIPS_SYS(sys_memfd_create
, 2)
2191 MIPS_SYS(sys_bpf
, 3) /* 355 */
2192 MIPS_SYS(sys_execveat
, 5)
2193 MIPS_SYS(sys_userfaultfd
, 1)
2194 MIPS_SYS(sys_membarrier
, 2)
2195 MIPS_SYS(sys_mlock2
, 3)
2196 MIPS_SYS(sys_copy_file_range
, 6) /* 360 */
2197 MIPS_SYS(sys_preadv2
, 6)
2198 MIPS_SYS(sys_pwritev2
, 6)
2203 static int do_store_exclusive(CPUMIPSState
*env
)
2206 target_ulong page_addr
;
2214 page_addr
= addr
& TARGET_PAGE_MASK
;
2217 flags
= page_get_flags(page_addr
);
2218 if ((flags
& PAGE_READ
) == 0) {
2221 reg
= env
->llreg
& 0x1f;
2222 d
= (env
->llreg
& 0x20) != 0;
2224 segv
= get_user_s64(val
, addr
);
2226 segv
= get_user_s32(val
, addr
);
2229 if (val
!= env
->llval
) {
2230 env
->active_tc
.gpr
[reg
] = 0;
2233 segv
= put_user_u64(env
->llnewval
, addr
);
2235 segv
= put_user_u32(env
->llnewval
, addr
);
2238 env
->active_tc
.gpr
[reg
] = 1;
2245 env
->active_tc
.PC
+= 4;
2258 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2266 info
->si_signo
= TARGET_SIGFPE
;
2268 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2269 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2273 info
->si_signo
= TARGET_SIGTRAP
;
2275 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2283 void cpu_loop(CPUMIPSState
*env
)
2285 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2286 target_siginfo_t info
;
2289 # ifdef TARGET_ABI_MIPSO32
2290 unsigned int syscall_num
;
2295 trapnr
= cpu_exec(cs
);
2297 process_queued_cpu_work(cs
);
2301 env
->active_tc
.PC
+= 4;
2302 # ifdef TARGET_ABI_MIPSO32
2303 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2304 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2305 ret
= -TARGET_ENOSYS
;
2309 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2311 nb_args
= mips_syscall_args
[syscall_num
];
2312 sp_reg
= env
->active_tc
.gpr
[29];
2314 /* these arguments are taken from the stack */
2316 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2320 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2324 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2328 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2334 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2335 env
->active_tc
.gpr
[4],
2336 env
->active_tc
.gpr
[5],
2337 env
->active_tc
.gpr
[6],
2338 env
->active_tc
.gpr
[7],
2339 arg5
, arg6
, arg7
, arg8
);
2343 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2344 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2345 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2346 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2347 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2349 if (ret
== -TARGET_ERESTARTSYS
) {
2350 env
->active_tc
.PC
-= 4;
2353 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2354 /* Returning from a successful sigreturn syscall.
2355 Avoid clobbering register state. */
2358 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2359 env
->active_tc
.gpr
[7] = 1; /* error flag */
2362 env
->active_tc
.gpr
[7] = 0; /* error flag */
2364 env
->active_tc
.gpr
[2] = ret
;
2370 info
.si_signo
= TARGET_SIGSEGV
;
2372 /* XXX: check env->error_code */
2373 info
.si_code
= TARGET_SEGV_MAPERR
;
2374 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2375 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2379 info
.si_signo
= TARGET_SIGILL
;
2382 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2384 case EXCP_INTERRUPT
:
2385 /* just indicate that signals should be handled asap */
2391 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2394 info
.si_signo
= sig
;
2396 info
.si_code
= TARGET_TRAP_BRKPT
;
2397 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2402 if (do_store_exclusive(env
)) {
2403 info
.si_signo
= TARGET_SIGSEGV
;
2405 info
.si_code
= TARGET_SEGV_MAPERR
;
2406 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2407 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2411 info
.si_signo
= TARGET_SIGILL
;
2413 info
.si_code
= TARGET_ILL_ILLOPC
;
2414 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2416 /* The code below was inspired by the MIPS Linux kernel trap
2417 * handling code in arch/mips/kernel/traps.c.
2421 abi_ulong trap_instr
;
2424 if (env
->hflags
& MIPS_HFLAG_M16
) {
2425 if (env
->insn_flags
& ASE_MICROMIPS
) {
2426 /* microMIPS mode */
2427 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2432 if ((trap_instr
>> 10) == 0x11) {
2433 /* 16-bit instruction */
2434 code
= trap_instr
& 0xf;
2436 /* 32-bit instruction */
2439 ret
= get_user_u16(instr_lo
,
2440 env
->active_tc
.PC
+ 2);
2444 trap_instr
= (trap_instr
<< 16) | instr_lo
;
2445 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2446 /* Unfortunately, microMIPS also suffers from
2447 the old assembler bug... */
2448 if (code
>= (1 << 10)) {
2454 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2458 code
= (trap_instr
>> 6) & 0x3f;
2461 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2466 /* As described in the original Linux kernel code, the
2467 * below checks on 'code' are to work around an old
2470 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2471 if (code
>= (1 << 10)) {
2476 if (do_break(env
, &info
, code
) != 0) {
2483 abi_ulong trap_instr
;
2484 unsigned int code
= 0;
2486 if (env
->hflags
& MIPS_HFLAG_M16
) {
2487 /* microMIPS mode */
2490 ret
= get_user_u16(instr
[0], env
->active_tc
.PC
) ||
2491 get_user_u16(instr
[1], env
->active_tc
.PC
+ 2);
2493 trap_instr
= (instr
[0] << 16) | instr
[1];
2495 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2502 /* The immediate versions don't provide a code. */
2503 if (!(trap_instr
& 0xFC000000)) {
2504 if (env
->hflags
& MIPS_HFLAG_M16
) {
2505 /* microMIPS mode */
2506 code
= ((trap_instr
>> 12) & ((1 << 4) - 1));
2508 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2512 if (do_break(env
, &info
, code
) != 0) {
2518 cpu_exec_step_atomic(cs
);
2522 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
2525 process_pending_signals(env
);
2532 void cpu_loop(CPUNios2State
*env
)
2534 CPUState
*cs
= ENV_GET_CPU(env
);
2535 Nios2CPU
*cpu
= NIOS2_CPU(cs
);
2536 target_siginfo_t info
;
2537 int trapnr
, gdbsig
, ret
;
2541 trapnr
= cpu_exec(cs
);
2546 case EXCP_INTERRUPT
:
2547 /* just indicate that signals should be handled asap */
2550 if (env
->regs
[R_AT
] == 0) {
2552 qemu_log_mask(CPU_LOG_INT
, "\nSyscall\n");
2554 ret
= do_syscall(env
, env
->regs
[2],
2555 env
->regs
[4], env
->regs
[5], env
->regs
[6],
2556 env
->regs
[7], env
->regs
[8], env
->regs
[9],
2559 if (env
->regs
[2] == 0) { /* FIXME: syscall 0 workaround */
2563 env
->regs
[2] = abs(ret
);
2564 /* Return value is 0..4096 */
2565 env
->regs
[7] = (ret
> 0xfffffffffffff000ULL
);
2566 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2567 env
->regs
[CR_STATUS
] &= ~0x3;
2568 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2569 env
->regs
[R_PC
] += 4;
2572 qemu_log_mask(CPU_LOG_INT
, "\nTrap\n");
2574 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2575 env
->regs
[CR_STATUS
] &= ~0x3;
2576 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2577 env
->regs
[R_PC
] = cpu
->exception_addr
;
2579 gdbsig
= TARGET_SIGTRAP
;
2583 switch (env
->regs
[R_PC
]) {
2584 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2585 case 0x1004: /* __kuser_cmpxchg */
2587 if (env
->regs
[4] & 0x3) {
2590 ret
= get_user_u32(env
->regs
[2], env
->regs
[4]);
2595 env
->regs
[2] -= env
->regs
[5];
2596 if (env
->regs
[2] == 0) {
2597 put_user_u32(env
->regs
[6], env
->regs
[4]);
2600 env
->regs
[R_PC
] = env
->regs
[R_RA
];
2602 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2606 info
.si_signo
= TARGET_SIGSEGV
;
2608 /* TODO: check env->error_code */
2609 info
.si_code
= TARGET_SEGV_MAPERR
;
2610 info
._sifields
._sigfault
._addr
= env
->regs
[R_PC
];
2611 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2615 EXCP_DUMP(env
, "\nqemu: unhandled CPU exception %#x - aborting\n",
2617 gdbsig
= TARGET_SIGILL
;
2621 gdb_handlesig(cs
, gdbsig
);
2622 if (gdbsig
!= TARGET_SIGTRAP
) {
2627 process_pending_signals(env
);
2631 #endif /* TARGET_NIOS2 */
2633 #ifdef TARGET_OPENRISC
2635 void cpu_loop(CPUOpenRISCState
*env
)
2637 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2640 target_siginfo_t info
;
2644 trapnr
= cpu_exec(cs
);
2646 process_queued_cpu_work(cs
);
2650 env
->pc
+= 4; /* 0xc00; */
2651 ret
= do_syscall(env
,
2652 cpu_get_gpr(env
, 11), /* return value */
2653 cpu_get_gpr(env
, 3), /* r3 - r7 are params */
2654 cpu_get_gpr(env
, 4),
2655 cpu_get_gpr(env
, 5),
2656 cpu_get_gpr(env
, 6),
2657 cpu_get_gpr(env
, 7),
2658 cpu_get_gpr(env
, 8), 0, 0);
2659 if (ret
== -TARGET_ERESTARTSYS
) {
2661 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2662 cpu_set_gpr(env
, 11, ret
);
2668 info
.si_signo
= TARGET_SIGSEGV
;
2670 info
.si_code
= TARGET_SEGV_MAPERR
;
2671 info
._sifields
._sigfault
._addr
= env
->pc
;
2672 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2675 info
.si_signo
= TARGET_SIGBUS
;
2677 info
.si_code
= TARGET_BUS_ADRALN
;
2678 info
._sifields
._sigfault
._addr
= env
->pc
;
2679 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2682 info
.si_signo
= TARGET_SIGILL
;
2684 info
.si_code
= TARGET_ILL_ILLOPC
;
2685 info
._sifields
._sigfault
._addr
= env
->pc
;
2686 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2689 info
.si_signo
= TARGET_SIGFPE
;
2692 info
._sifields
._sigfault
._addr
= env
->pc
;
2693 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2695 case EXCP_INTERRUPT
:
2696 /* We processed the pending cpu work above. */
2699 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2701 info
.si_signo
= trapnr
;
2703 info
.si_code
= TARGET_TRAP_BRKPT
;
2704 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2708 cpu_exec_step_atomic(cs
);
2711 g_assert_not_reached();
2713 process_pending_signals(env
);
2717 #endif /* TARGET_OPENRISC */
2720 void cpu_loop(CPUSH4State
*env
)
2722 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2724 target_siginfo_t info
;
2727 bool arch_interrupt
= true;
2730 trapnr
= cpu_exec(cs
);
2732 process_queued_cpu_work(cs
);
2737 ret
= do_syscall(env
,
2746 if (ret
== -TARGET_ERESTARTSYS
) {
2748 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2749 env
->gregs
[0] = ret
;
2752 case EXCP_INTERRUPT
:
2753 /* just indicate that signals should be handled asap */
2759 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2761 info
.si_signo
= sig
;
2763 info
.si_code
= TARGET_TRAP_BRKPT
;
2764 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2766 arch_interrupt
= false;
2772 info
.si_signo
= TARGET_SIGSEGV
;
2774 info
.si_code
= TARGET_SEGV_MAPERR
;
2775 info
._sifields
._sigfault
._addr
= env
->tea
;
2776 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2779 cpu_exec_step_atomic(cs
);
2780 arch_interrupt
= false;
2783 printf ("Unhandled trap: 0x%x\n", trapnr
);
2784 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2787 process_pending_signals (env
);
2789 /* Most of the traps imply an exception or interrupt, which
2790 implies an REI instruction has been executed. Which means
2791 that LDST (aka LOK_ADDR) should be cleared. But there are
2792 a few exceptions for traps internal to QEMU. */
2793 if (arch_interrupt
) {
2794 env
->lock_addr
= -1;
2801 void cpu_loop(CPUCRISState
*env
)
2803 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2805 target_siginfo_t info
;
2809 trapnr
= cpu_exec(cs
);
2811 process_queued_cpu_work(cs
);
2816 info
.si_signo
= TARGET_SIGSEGV
;
2818 /* XXX: check env->error_code */
2819 info
.si_code
= TARGET_SEGV_MAPERR
;
2820 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2821 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2824 case EXCP_INTERRUPT
:
2825 /* just indicate that signals should be handled asap */
2828 ret
= do_syscall(env
,
2837 if (ret
== -TARGET_ERESTARTSYS
) {
2839 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2840 env
->regs
[10] = ret
;
2847 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2850 info
.si_signo
= sig
;
2852 info
.si_code
= TARGET_TRAP_BRKPT
;
2853 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2858 cpu_exec_step_atomic(cs
);
2861 printf ("Unhandled trap: 0x%x\n", trapnr
);
2862 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2865 process_pending_signals (env
);
2870 #ifdef TARGET_MICROBLAZE
2871 void cpu_loop(CPUMBState
*env
)
2873 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2875 target_siginfo_t info
;
2879 trapnr
= cpu_exec(cs
);
2881 process_queued_cpu_work(cs
);
2886 info
.si_signo
= TARGET_SIGSEGV
;
2888 /* XXX: check env->error_code */
2889 info
.si_code
= TARGET_SEGV_MAPERR
;
2890 info
._sifields
._sigfault
._addr
= 0;
2891 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2894 case EXCP_INTERRUPT
:
2895 /* just indicate that signals should be handled asap */
2898 /* Return address is 4 bytes after the call. */
2900 env
->sregs
[SR_PC
] = env
->regs
[14];
2901 ret
= do_syscall(env
,
2910 if (ret
== -TARGET_ERESTARTSYS
) {
2911 /* Wind back to before the syscall. */
2912 env
->sregs
[SR_PC
] -= 4;
2913 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2916 /* All syscall exits result in guest r14 being equal to the
2917 * PC we return to, because the kernel syscall exit "rtbd" does
2918 * this. (This is true even for sigreturn(); note that r14 is
2919 * not a userspace-usable register, as the kernel may clobber it
2922 env
->regs
[14] = env
->sregs
[SR_PC
];
2925 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2926 if (env
->iflags
& D_FLAG
) {
2927 env
->sregs
[SR_ESR
] |= 1 << 12;
2928 env
->sregs
[SR_PC
] -= 4;
2929 /* FIXME: if branch was immed, replay the imm as well. */
2932 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2934 switch (env
->sregs
[SR_ESR
] & 31) {
2935 case ESR_EC_DIVZERO
:
2936 info
.si_signo
= TARGET_SIGFPE
;
2938 info
.si_code
= TARGET_FPE_FLTDIV
;
2939 info
._sifields
._sigfault
._addr
= 0;
2940 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2943 info
.si_signo
= TARGET_SIGFPE
;
2945 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2946 info
.si_code
= TARGET_FPE_FLTINV
;
2948 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2949 info
.si_code
= TARGET_FPE_FLTDIV
;
2951 info
._sifields
._sigfault
._addr
= 0;
2952 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2955 printf ("Unhandled hw-exception: 0x%x\n",
2956 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2957 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2966 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2969 info
.si_signo
= sig
;
2971 info
.si_code
= TARGET_TRAP_BRKPT
;
2972 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2977 cpu_exec_step_atomic(cs
);
2980 printf ("Unhandled trap: 0x%x\n", trapnr
);
2981 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2984 process_pending_signals (env
);
2991 void cpu_loop(CPUM68KState
*env
)
2993 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2996 target_siginfo_t info
;
2997 TaskState
*ts
= cs
->opaque
;
3001 trapnr
= cpu_exec(cs
);
3003 process_queued_cpu_work(cs
);
3008 if (ts
->sim_syscalls
) {
3010 get_user_u16(nr
, env
->pc
+ 2);
3012 do_m68k_simcall(env
, nr
);
3018 case EXCP_HALT_INSN
:
3019 /* Semihosing syscall. */
3021 do_m68k_semihosting(env
, env
->dregs
[0]);
3025 case EXCP_UNSUPPORTED
:
3027 info
.si_signo
= TARGET_SIGILL
;
3029 info
.si_code
= TARGET_ILL_ILLOPN
;
3030 info
._sifields
._sigfault
._addr
= env
->pc
;
3031 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3034 info
.si_signo
= TARGET_SIGFPE
;
3036 info
.si_code
= TARGET_FPE_INTOVF
;
3037 info
._sifields
._sigfault
._addr
= env
->pc
;
3038 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3041 info
.si_signo
= TARGET_SIGFPE
;
3043 info
.si_code
= TARGET_FPE_INTDIV
;
3044 info
._sifields
._sigfault
._addr
= env
->pc
;
3045 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3050 ts
->sim_syscalls
= 0;
3053 ret
= do_syscall(env
,
3062 if (ret
== -TARGET_ERESTARTSYS
) {
3064 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3065 env
->dregs
[0] = ret
;
3069 case EXCP_INTERRUPT
:
3070 /* just indicate that signals should be handled asap */
3074 info
.si_signo
= TARGET_SIGSEGV
;
3076 /* XXX: check env->error_code */
3077 info
.si_code
= TARGET_SEGV_MAPERR
;
3078 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
3079 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3086 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3089 info
.si_signo
= sig
;
3091 info
.si_code
= TARGET_TRAP_BRKPT
;
3092 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3097 cpu_exec_step_atomic(cs
);
3100 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
3103 process_pending_signals(env
);
3106 #endif /* TARGET_M68K */
3109 void cpu_loop(CPUAlphaState
*env
)
3111 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
3113 target_siginfo_t info
;
3117 bool arch_interrupt
= true;
3120 trapnr
= cpu_exec(cs
);
3122 process_queued_cpu_work(cs
);
3126 fprintf(stderr
, "Reset requested. Exit\n");
3130 fprintf(stderr
, "Machine check exception. Exit\n");
3133 case EXCP_SMP_INTERRUPT
:
3134 case EXCP_CLK_INTERRUPT
:
3135 case EXCP_DEV_INTERRUPT
:
3136 fprintf(stderr
, "External interrupt. Exit\n");
3140 info
.si_signo
= TARGET_SIGSEGV
;
3142 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
3143 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
3144 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3145 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3148 info
.si_signo
= TARGET_SIGBUS
;
3150 info
.si_code
= TARGET_BUS_ADRALN
;
3151 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3152 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3156 info
.si_signo
= TARGET_SIGILL
;
3158 info
.si_code
= TARGET_ILL_ILLOPC
;
3159 info
._sifields
._sigfault
._addr
= env
->pc
;
3160 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3163 info
.si_signo
= TARGET_SIGFPE
;
3165 info
.si_code
= TARGET_FPE_FLTINV
;
3166 info
._sifields
._sigfault
._addr
= env
->pc
;
3167 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3170 /* No-op. Linux simply re-enables the FPU. */
3173 switch (env
->error_code
) {
3176 info
.si_signo
= TARGET_SIGTRAP
;
3178 info
.si_code
= TARGET_TRAP_BRKPT
;
3179 info
._sifields
._sigfault
._addr
= env
->pc
;
3180 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3184 info
.si_signo
= TARGET_SIGTRAP
;
3187 info
._sifields
._sigfault
._addr
= env
->pc
;
3188 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3192 trapnr
= env
->ir
[IR_V0
];
3193 sysret
= do_syscall(env
, trapnr
,
3194 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
3195 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
3196 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
3198 if (sysret
== -TARGET_ERESTARTSYS
) {
3202 if (sysret
== -TARGET_QEMU_ESIGRETURN
) {
3205 /* Syscall writes 0 to V0 to bypass error check, similar
3206 to how this is handled internal to Linux kernel.
3207 (Ab)use trapnr temporarily as boolean indicating error. */
3208 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
3209 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
3210 env
->ir
[IR_A3
] = trapnr
;
3214 /* ??? We can probably elide the code using page_unprotect
3215 that is checking for self-modifying code. Instead we
3216 could simply call tb_flush here. Until we work out the
3217 changes required to turn off the extra write protection,
3218 this can be a no-op. */
3222 /* Handled in the translator for usermode. */
3226 /* Handled in the translator for usermode. */
3230 info
.si_signo
= TARGET_SIGFPE
;
3231 switch (env
->ir
[IR_A0
]) {
3232 case TARGET_GEN_INTOVF
:
3233 info
.si_code
= TARGET_FPE_INTOVF
;
3235 case TARGET_GEN_INTDIV
:
3236 info
.si_code
= TARGET_FPE_INTDIV
;
3238 case TARGET_GEN_FLTOVF
:
3239 info
.si_code
= TARGET_FPE_FLTOVF
;
3241 case TARGET_GEN_FLTUND
:
3242 info
.si_code
= TARGET_FPE_FLTUND
;
3244 case TARGET_GEN_FLTINV
:
3245 info
.si_code
= TARGET_FPE_FLTINV
;
3247 case TARGET_GEN_FLTINE
:
3248 info
.si_code
= TARGET_FPE_FLTRES
;
3250 case TARGET_GEN_ROPRAND
:
3254 info
.si_signo
= TARGET_SIGTRAP
;
3259 info
._sifields
._sigfault
._addr
= env
->pc
;
3260 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3267 info
.si_signo
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3268 if (info
.si_signo
) {
3270 info
.si_code
= TARGET_TRAP_BRKPT
;
3271 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3273 arch_interrupt
= false;
3276 case EXCP_INTERRUPT
:
3277 /* Just indicate that signals should be handled asap. */
3280 cpu_exec_step_atomic(cs
);
3281 arch_interrupt
= false;
3284 printf ("Unhandled trap: 0x%x\n", trapnr
);
3285 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3288 process_pending_signals (env
);
3290 /* Most of the traps imply a transition through PALcode, which
3291 implies an REI instruction has been executed. Which means
3292 that RX and LOCK_ADDR should be cleared. But there are a
3293 few exceptions for traps internal to QEMU. */
3294 if (arch_interrupt
) {
3295 env
->flags
&= ~ENV_FLAG_RX_FLAG
;
3296 env
->lock_addr
= -1;
3300 #endif /* TARGET_ALPHA */
3304 /* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */
3305 #define S390X_FAIL_ADDR_MASK -4096LL
3307 void cpu_loop(CPUS390XState
*env
)
3309 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3311 target_siginfo_t info
;
3317 trapnr
= cpu_exec(cs
);
3319 process_queued_cpu_work(cs
);
3322 case EXCP_INTERRUPT
:
3323 /* Just indicate that signals should be handled asap. */
3327 n
= env
->int_svc_code
;
3329 /* syscalls > 255 */
3332 env
->psw
.addr
+= env
->int_svc_ilen
;
3333 ret
= do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3334 env
->regs
[4], env
->regs
[5],
3335 env
->regs
[6], env
->regs
[7], 0, 0);
3336 if (ret
== -TARGET_ERESTARTSYS
) {
3337 env
->psw
.addr
-= env
->int_svc_ilen
;
3338 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3344 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3346 n
= TARGET_TRAP_BRKPT
;
3351 n
= env
->int_pgm_code
;
3354 case PGM_PRIVILEGED
:
3355 sig
= TARGET_SIGILL
;
3356 n
= TARGET_ILL_ILLOPC
;
3358 case PGM_PROTECTION
:
3359 case PGM_ADDRESSING
:
3360 sig
= TARGET_SIGSEGV
;
3361 /* XXX: check env->error_code */
3362 n
= TARGET_SEGV_MAPERR
;
3363 addr
= env
->__excp_addr
& S390X_FAIL_ADDR_MASK
;
3366 case PGM_SPECIFICATION
:
3367 case PGM_SPECIAL_OP
:
3370 sig
= TARGET_SIGILL
;
3371 n
= TARGET_ILL_ILLOPN
;
3374 case PGM_FIXPT_OVERFLOW
:
3375 sig
= TARGET_SIGFPE
;
3376 n
= TARGET_FPE_INTOVF
;
3378 case PGM_FIXPT_DIVIDE
:
3379 sig
= TARGET_SIGFPE
;
3380 n
= TARGET_FPE_INTDIV
;
3384 n
= (env
->fpc
>> 8) & 0xff;
3386 /* compare-and-trap */
3389 /* An IEEE exception, simulated or otherwise. */
3391 n
= TARGET_FPE_FLTINV
;
3392 } else if (n
& 0x40) {
3393 n
= TARGET_FPE_FLTDIV
;
3394 } else if (n
& 0x20) {
3395 n
= TARGET_FPE_FLTOVF
;
3396 } else if (n
& 0x10) {
3397 n
= TARGET_FPE_FLTUND
;
3398 } else if (n
& 0x08) {
3399 n
= TARGET_FPE_FLTRES
;
3401 /* ??? Quantum exception; BFP, DFP error. */
3404 sig
= TARGET_SIGFPE
;
3409 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3410 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3416 addr
= env
->psw
.addr
;
3418 info
.si_signo
= sig
;
3421 info
._sifields
._sigfault
._addr
= addr
;
3422 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3426 cpu_exec_step_atomic(cs
);
3429 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3430 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3433 process_pending_signals (env
);
3437 #endif /* TARGET_S390X */
3439 #ifdef TARGET_TILEGX
3441 static void gen_sigill_reg(CPUTLGState
*env
)
3443 target_siginfo_t info
;
3445 info
.si_signo
= TARGET_SIGILL
;
3447 info
.si_code
= TARGET_ILL_PRVREG
;
3448 info
._sifields
._sigfault
._addr
= env
->pc
;
3449 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3452 static void do_signal(CPUTLGState
*env
, int signo
, int sigcode
)
3454 target_siginfo_t info
;
3456 info
.si_signo
= signo
;
3458 info
._sifields
._sigfault
._addr
= env
->pc
;
3460 if (signo
== TARGET_SIGSEGV
) {
3461 /* The passed in sigcode is a dummy; check for a page mapping
3462 and pass either MAPERR or ACCERR. */
3463 target_ulong addr
= env
->excaddr
;
3464 info
._sifields
._sigfault
._addr
= addr
;
3465 if (page_check_range(addr
, 1, PAGE_VALID
) < 0) {
3466 sigcode
= TARGET_SEGV_MAPERR
;
3468 sigcode
= TARGET_SEGV_ACCERR
;
3471 info
.si_code
= sigcode
;
3473 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3476 static void gen_sigsegv_maperr(CPUTLGState
*env
, target_ulong addr
)
3478 env
->excaddr
= addr
;
3479 do_signal(env
, TARGET_SIGSEGV
, 0);
3482 static void set_regval(CPUTLGState
*env
, uint8_t reg
, uint64_t val
)
3484 if (unlikely(reg
>= TILEGX_R_COUNT
)) {
3495 gen_sigill_reg(env
);
3498 g_assert_not_reached();
3501 env
->regs
[reg
] = val
;
3505 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3506 * memory at the address held in the first source register. If the values are
3507 * not equal, then no memory operation is performed. If the values are equal,
3508 * the 8-byte quantity from the second source register is written into memory
3509 * at the address held in the first source register. In either case, the result
3510 * of the instruction is the value read from memory. The compare and write to
3511 * memory are atomic and thus can be used for synchronization purposes. This
3512 * instruction only operates for addresses aligned to a 8-byte boundary.
3513 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3515 * Functional Description (64-bit)
3516 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3517 * rf[Dest] = memVal;
3518 * if (memVal == SPR[CmpValueSPR])
3519 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3521 * Functional Description (32-bit)
3522 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3523 * rf[Dest] = memVal;
3524 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3525 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3528 * This function also processes exch and exch4 which need not process SPR.
3530 static void do_exch(CPUTLGState
*env
, bool quad
, bool cmp
)
3533 target_long val
, sprval
;
3537 addr
= env
->atomic_srca
;
3538 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3539 goto sigsegv_maperr
;
3544 sprval
= env
->spregs
[TILEGX_SPR_CMPEXCH
];
3546 sprval
= sextract64(env
->spregs
[TILEGX_SPR_CMPEXCH
], 0, 32);
3550 if (!cmp
|| val
== sprval
) {
3551 target_long valb
= env
->atomic_srcb
;
3552 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3553 goto sigsegv_maperr
;
3557 set_regval(env
, env
->atomic_dstr
, val
);
3563 gen_sigsegv_maperr(env
, addr
);
3566 static void do_fetch(CPUTLGState
*env
, int trapnr
, bool quad
)
3570 target_long val
, valb
;
3574 addr
= env
->atomic_srca
;
3575 valb
= env
->atomic_srcb
;
3576 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3577 goto sigsegv_maperr
;
3581 case TILEGX_EXCP_OPCODE_FETCHADD
:
3582 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3585 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3591 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3593 if ((int32_t)valb
< 0) {
3597 case TILEGX_EXCP_OPCODE_FETCHAND
:
3598 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3601 case TILEGX_EXCP_OPCODE_FETCHOR
:
3602 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3606 g_assert_not_reached();
3610 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3611 goto sigsegv_maperr
;
3615 set_regval(env
, env
->atomic_dstr
, val
);
3621 gen_sigsegv_maperr(env
, addr
);
3624 void cpu_loop(CPUTLGState
*env
)
3626 CPUState
*cs
= CPU(tilegx_env_get_cpu(env
));
3631 trapnr
= cpu_exec(cs
);
3633 process_queued_cpu_work(cs
);
3636 case TILEGX_EXCP_SYSCALL
:
3638 abi_ulong ret
= do_syscall(env
, env
->regs
[TILEGX_R_NR
],
3639 env
->regs
[0], env
->regs
[1],
3640 env
->regs
[2], env
->regs
[3],
3641 env
->regs
[4], env
->regs
[5],
3642 env
->regs
[6], env
->regs
[7]);
3643 if (ret
== -TARGET_ERESTARTSYS
) {
3645 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3646 env
->regs
[TILEGX_R_RE
] = ret
;
3647 env
->regs
[TILEGX_R_ERR
] = TILEGX_IS_ERRNO(ret
) ? -ret
: 0;
3651 case TILEGX_EXCP_OPCODE_EXCH
:
3652 do_exch(env
, true, false);
3654 case TILEGX_EXCP_OPCODE_EXCH4
:
3655 do_exch(env
, false, false);
3657 case TILEGX_EXCP_OPCODE_CMPEXCH
:
3658 do_exch(env
, true, true);
3660 case TILEGX_EXCP_OPCODE_CMPEXCH4
:
3661 do_exch(env
, false, true);
3663 case TILEGX_EXCP_OPCODE_FETCHADD
:
3664 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3665 case TILEGX_EXCP_OPCODE_FETCHAND
:
3666 case TILEGX_EXCP_OPCODE_FETCHOR
:
3667 do_fetch(env
, trapnr
, true);
3669 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3670 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3671 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3672 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3673 do_fetch(env
, trapnr
, false);
3675 case TILEGX_EXCP_SIGNAL
:
3676 do_signal(env
, env
->signo
, env
->sigcode
);
3678 case TILEGX_EXCP_REG_IDN_ACCESS
:
3679 case TILEGX_EXCP_REG_UDN_ACCESS
:
3680 gen_sigill_reg(env
);
3683 cpu_exec_step_atomic(cs
);
3686 fprintf(stderr
, "trapnr is %d[0x%x].\n", trapnr
, trapnr
);
3687 g_assert_not_reached();
3689 process_pending_signals(env
);
3697 static abi_ulong
hppa_lws(CPUHPPAState
*env
)
3699 uint32_t which
= env
->gr
[20];
3700 abi_ulong addr
= env
->gr
[26];
3701 abi_ulong old
= env
->gr
[25];
3702 abi_ulong
new = env
->gr
[24];
3703 abi_ulong size
, ret
;
3707 return -TARGET_ENOSYS
;
3709 case 0: /* elf32 atomic 32bit cmpxchg */
3710 if ((addr
& 3) || !access_ok(VERIFY_WRITE
, addr
, 4)) {
3711 return -TARGET_EFAULT
;
3715 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3719 case 2: /* elf32 atomic "new" cmpxchg */
3722 return -TARGET_ENOSYS
;
3724 if (((addr
| old
| new) & ((1 << size
) - 1))
3725 || !access_ok(VERIFY_WRITE
, addr
, 1 << size
)
3726 || !access_ok(VERIFY_READ
, old
, 1 << size
)
3727 || !access_ok(VERIFY_READ
, new, 1 << size
)) {
3728 return -TARGET_EFAULT
;
3730 /* Note that below we use host-endian loads so that the cmpxchg
3731 can be host-endian as well. */
3734 old
= *(uint8_t *)g2h(old
);
3735 new = *(uint8_t *)g2h(new);
3736 ret
= atomic_cmpxchg((uint8_t *)g2h(addr
), old
, new);
3740 old
= *(uint16_t *)g2h(old
);
3741 new = *(uint16_t *)g2h(new);
3742 ret
= atomic_cmpxchg((uint16_t *)g2h(addr
), old
, new);
3746 old
= *(uint32_t *)g2h(old
);
3747 new = *(uint32_t *)g2h(new);
3748 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3753 uint64_t o64
, n64
, r64
;
3754 o64
= *(uint64_t *)g2h(old
);
3755 n64
= *(uint64_t *)g2h(new);
3756 #ifdef CONFIG_ATOMIC64
3757 r64
= atomic_cmpxchg__nocheck((uint64_t *)g2h(addr
), o64
, n64
);
3761 r64
= *(uint64_t *)g2h(addr
);
3764 *(uint64_t *)g2h(addr
) = n64
;
3779 void cpu_loop(CPUHPPAState
*env
)
3781 CPUState
*cs
= CPU(hppa_env_get_cpu(env
));
3782 target_siginfo_t info
;
3788 trapnr
= cpu_exec(cs
);
3790 process_queued_cpu_work(cs
);
3794 ret
= do_syscall(env
, env
->gr
[20],
3795 env
->gr
[26], env
->gr
[25],
3796 env
->gr
[24], env
->gr
[23],
3797 env
->gr
[22], env
->gr
[21], 0, 0);
3801 /* We arrived here by faking the gateway page. Return. */
3802 env
->iaoq_f
= env
->gr
[31];
3803 env
->iaoq_b
= env
->gr
[31] + 4;
3805 case -TARGET_ERESTARTSYS
:
3806 case -TARGET_QEMU_ESIGRETURN
:
3810 case EXCP_SYSCALL_LWS
:
3811 env
->gr
[21] = hppa_lws(env
);
3812 /* We arrived here by faking the gateway page. Return. */
3813 env
->iaoq_f
= env
->gr
[31];
3814 env
->iaoq_b
= env
->gr
[31] + 4;
3817 info
.si_signo
= TARGET_SIGSEGV
;
3819 info
.si_code
= TARGET_SEGV_ACCERR
;
3820 info
._sifields
._sigfault
._addr
= env
->ior
;
3821 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3824 info
.si_signo
= TARGET_SIGILL
;
3826 info
.si_code
= TARGET_ILL_ILLOPN
;
3827 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3828 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3831 info
.si_signo
= TARGET_SIGFPE
;
3834 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3835 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3838 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3840 info
.si_signo
= trapnr
;
3842 info
.si_code
= TARGET_TRAP_BRKPT
;
3843 queue_signal(env
, trapnr
, QEMU_SI_FAULT
, &info
);
3846 case EXCP_INTERRUPT
:
3847 /* just indicate that signals should be handled asap */
3850 g_assert_not_reached();
3852 process_pending_signals(env
);
3856 #endif /* TARGET_HPPA */
3858 THREAD CPUState
*thread_cpu
;
3860 bool qemu_cpu_is_self(CPUState
*cpu
)
3862 return thread_cpu
== cpu
;
3865 void qemu_cpu_kick(CPUState
*cpu
)
3870 void task_settid(TaskState
*ts
)
3872 if (ts
->ts_tid
== 0) {
3873 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3877 void stop_all_tasks(void)
3880 * We trust that when using NPTL, start_exclusive()
3881 * handles thread stopping correctly.
3886 /* Assumes contents are already zeroed. */
3887 void init_task_state(TaskState
*ts
)
3892 CPUArchState
*cpu_copy(CPUArchState
*env
)
3894 CPUState
*cpu
= ENV_GET_CPU(env
);
3895 CPUState
*new_cpu
= cpu_init(cpu_model
);
3896 CPUArchState
*new_env
= new_cpu
->env_ptr
;
3900 /* Reset non arch specific state */
3903 memcpy(new_env
, env
, sizeof(CPUArchState
));
3905 /* Clone all break/watchpoints.
3906 Note: Once we support ptrace with hw-debug register access, make sure
3907 BP_CPU break/watchpoints are handled correctly on clone. */
3908 QTAILQ_INIT(&new_cpu
->breakpoints
);
3909 QTAILQ_INIT(&new_cpu
->watchpoints
);
3910 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
3911 cpu_breakpoint_insert(new_cpu
, bp
->pc
, bp
->flags
, NULL
);
3913 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
3914 cpu_watchpoint_insert(new_cpu
, wp
->vaddr
, wp
->len
, wp
->flags
, NULL
);
3920 static void handle_arg_help(const char *arg
)
3922 usage(EXIT_SUCCESS
);
3925 static void handle_arg_log(const char *arg
)
3929 mask
= qemu_str_to_log_mask(arg
);
3931 qemu_print_log_usage(stdout
);
3934 qemu_log_needs_buffers();
3938 static void handle_arg_dfilter(const char *arg
)
3940 qemu_set_dfilter_ranges(arg
, NULL
);
3943 static void handle_arg_log_filename(const char *arg
)
3945 qemu_set_log_filename(arg
, &error_fatal
);
3948 static void handle_arg_set_env(const char *arg
)
3950 char *r
, *p
, *token
;
3951 r
= p
= strdup(arg
);
3952 while ((token
= strsep(&p
, ",")) != NULL
) {
3953 if (envlist_setenv(envlist
, token
) != 0) {
3954 usage(EXIT_FAILURE
);
3960 static void handle_arg_unset_env(const char *arg
)
3962 char *r
, *p
, *token
;
3963 r
= p
= strdup(arg
);
3964 while ((token
= strsep(&p
, ",")) != NULL
) {
3965 if (envlist_unsetenv(envlist
, token
) != 0) {
3966 usage(EXIT_FAILURE
);
3972 static void handle_arg_argv0(const char *arg
)
3974 argv0
= strdup(arg
);
3977 static void handle_arg_stack_size(const char *arg
)
3980 guest_stack_size
= strtoul(arg
, &p
, 0);
3981 if (guest_stack_size
== 0) {
3982 usage(EXIT_FAILURE
);
3986 guest_stack_size
*= 1024 * 1024;
3987 } else if (*p
== 'k' || *p
== 'K') {
3988 guest_stack_size
*= 1024;
3992 static void handle_arg_ld_prefix(const char *arg
)
3994 interp_prefix
= strdup(arg
);
3997 static void handle_arg_pagesize(const char *arg
)
3999 qemu_host_page_size
= atoi(arg
);
4000 if (qemu_host_page_size
== 0 ||
4001 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
4002 fprintf(stderr
, "page size must be a power of two\n");
4007 static void handle_arg_randseed(const char *arg
)
4009 unsigned long long seed
;
4011 if (parse_uint_full(arg
, &seed
, 0) != 0 || seed
> UINT_MAX
) {
4012 fprintf(stderr
, "Invalid seed number: %s\n", arg
);
4018 static void handle_arg_gdb(const char *arg
)
4020 gdbstub_port
= atoi(arg
);
4023 static void handle_arg_uname(const char *arg
)
4025 qemu_uname_release
= strdup(arg
);
4028 static void handle_arg_cpu(const char *arg
)
4030 cpu_model
= strdup(arg
);
4031 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
4032 /* XXX: implement xxx_cpu_list for targets that still miss it */
4033 #if defined(cpu_list)
4034 cpu_list(stdout
, &fprintf
); /* deprecated */
4036 /* TODO: add cpu selection for alpha, microblaze, unicore32, s390x. */
4037 printf("Target ignores cpu selection\n");
4043 static void handle_arg_guest_base(const char *arg
)
4045 guest_base
= strtol(arg
, NULL
, 0);
4046 have_guest_base
= 1;
4049 static void handle_arg_reserved_va(const char *arg
)
4053 reserved_va
= strtoul(arg
, &p
, 0);
4067 unsigned long unshifted
= reserved_va
;
4069 reserved_va
<<= shift
;
4070 if (reserved_va
>> shift
!= unshifted
4071 || (MAX_RESERVED_VA
&& reserved_va
> MAX_RESERVED_VA
)) {
4072 fprintf(stderr
, "Reserved virtual address too big\n");
4077 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
4082 static void handle_arg_singlestep(const char *arg
)
4087 static void handle_arg_strace(const char *arg
)
4092 static void handle_arg_version(const char *arg
)
4094 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
4095 "\n" QEMU_COPYRIGHT
"\n");
4099 static char *trace_file
;
4100 static void handle_arg_trace(const char *arg
)
4103 trace_file
= trace_opt_parse(arg
);
4106 struct qemu_argument
{
4110 void (*handle_opt
)(const char *arg
);
4111 const char *example
;
4115 static const struct qemu_argument arg_table
[] = {
4116 {"h", "", false, handle_arg_help
,
4117 "", "print this help"},
4118 {"help", "", false, handle_arg_help
,
4120 {"g", "QEMU_GDB", true, handle_arg_gdb
,
4121 "port", "wait gdb connection to 'port'"},
4122 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
4123 "path", "set the elf interpreter prefix to 'path'"},
4124 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
4125 "size", "set the stack size to 'size' bytes"},
4126 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
4127 "model", "select CPU (-cpu help for list)"},
4128 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
4129 "var=value", "sets targets environment variable (see below)"},
4130 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
4131 "var", "unsets targets environment variable (see below)"},
4132 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
4133 "argv0", "forces target process argv[0] to be 'argv0'"},
4134 {"r", "QEMU_UNAME", true, handle_arg_uname
,
4135 "uname", "set qemu uname release string to 'uname'"},
4136 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
4137 "address", "set guest_base address to 'address'"},
4138 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
4139 "size", "reserve 'size' bytes for guest virtual address space"},
4140 {"d", "QEMU_LOG", true, handle_arg_log
,
4141 "item[,...]", "enable logging of specified items "
4142 "(use '-d help' for a list of items)"},
4143 {"dfilter", "QEMU_DFILTER", true, handle_arg_dfilter
,
4144 "range[,...]","filter logging based on address range"},
4145 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
4146 "logfile", "write logs to 'logfile' (default stderr)"},
4147 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
4148 "pagesize", "set the host page size to 'pagesize'"},
4149 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
4150 "", "run in singlestep mode"},
4151 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
4152 "", "log system calls"},
4153 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed
,
4154 "", "Seed for pseudo-random number generator"},
4155 {"trace", "QEMU_TRACE", true, handle_arg_trace
,
4156 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
4157 {"version", "QEMU_VERSION", false, handle_arg_version
,
4158 "", "display version information and exit"},
4159 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
4162 static void QEMU_NORETURN
usage(int exitcode
)
4164 const struct qemu_argument
*arginfo
;
4168 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
4169 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
4171 "Options and associated environment variables:\n"
4174 /* Calculate column widths. We must always have at least enough space
4175 * for the column header.
4177 maxarglen
= strlen("Argument");
4178 maxenvlen
= strlen("Env-variable");
4180 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4181 int arglen
= strlen(arginfo
->argv
);
4182 if (arginfo
->has_arg
) {
4183 arglen
+= strlen(arginfo
->example
) + 1;
4185 if (strlen(arginfo
->env
) > maxenvlen
) {
4186 maxenvlen
= strlen(arginfo
->env
);
4188 if (arglen
> maxarglen
) {
4193 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
4194 maxenvlen
, "Env-variable");
4196 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4197 if (arginfo
->has_arg
) {
4198 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
4199 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
4200 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
4202 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
4203 maxenvlen
, arginfo
->env
,
4210 "QEMU_LD_PREFIX = %s\n"
4211 "QEMU_STACK_SIZE = %ld byte\n",
4216 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4217 "QEMU_UNSET_ENV environment variables to set and unset\n"
4218 "environment variables for the target process.\n"
4219 "It is possible to provide several variables by separating them\n"
4220 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4221 "provide the -E and -U options multiple times.\n"
4222 "The following lines are equivalent:\n"
4223 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4224 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4225 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4226 "Note that if you provide several changes to a single variable\n"
4227 "the last change will stay in effect.\n"
4229 QEMU_HELP_BOTTOM
"\n");
4234 static int parse_args(int argc
, char **argv
)
4238 const struct qemu_argument
*arginfo
;
4240 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4241 if (arginfo
->env
== NULL
) {
4245 r
= getenv(arginfo
->env
);
4247 arginfo
->handle_opt(r
);
4253 if (optind
>= argc
) {
4262 if (!strcmp(r
, "-")) {
4265 /* Treat --foo the same as -foo. */
4270 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4271 if (!strcmp(r
, arginfo
->argv
)) {
4272 if (arginfo
->has_arg
) {
4273 if (optind
>= argc
) {
4274 (void) fprintf(stderr
,
4275 "qemu: missing argument for option '%s'\n", r
);
4278 arginfo
->handle_opt(argv
[optind
]);
4281 arginfo
->handle_opt(NULL
);
4287 /* no option matched the current argv */
4288 if (arginfo
->handle_opt
== NULL
) {
4289 (void) fprintf(stderr
, "qemu: unknown option '%s'\n", r
);
4294 if (optind
>= argc
) {
4295 (void) fprintf(stderr
, "qemu: no user program specified\n");
4299 filename
= argv
[optind
];
4300 exec_path
= argv
[optind
];
4305 int main(int argc
, char **argv
)
4307 struct target_pt_regs regs1
, *regs
= ®s1
;
4308 struct image_info info1
, *info
= &info1
;
4309 struct linux_binprm bprm
;
4314 char **target_environ
, **wrk
;
4321 module_call_init(MODULE_INIT_TRACE
);
4322 qemu_init_cpu_list();
4323 module_call_init(MODULE_INIT_QOM
);
4325 envlist
= envlist_create();
4327 /* add current environment into the list */
4328 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
4329 (void) envlist_setenv(envlist
, *wrk
);
4332 /* Read the stack limit from the kernel. If it's "unlimited",
4333 then we can do little else besides use the default. */
4336 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
4337 && lim
.rlim_cur
!= RLIM_INFINITY
4338 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
4339 guest_stack_size
= lim
.rlim_cur
;
4347 qemu_add_opts(&qemu_trace_opts
);
4349 optind
= parse_args(argc
, argv
);
4351 if (!trace_init_backends()) {
4354 trace_init_file(trace_file
);
4357 memset(regs
, 0, sizeof(struct target_pt_regs
));
4359 /* Zero out image_info */
4360 memset(info
, 0, sizeof(struct image_info
));
4362 memset(&bprm
, 0, sizeof (bprm
));
4364 /* Scan interp_prefix dir for replacement files. */
4365 init_paths(interp_prefix
);
4367 init_qemu_uname_release();
4369 if (cpu_model
== NULL
) {
4370 #if defined(TARGET_I386)
4371 #ifdef TARGET_X86_64
4372 cpu_model
= "qemu64";
4374 cpu_model
= "qemu32";
4376 #elif defined(TARGET_ARM)
4378 #elif defined(TARGET_UNICORE32)
4380 #elif defined(TARGET_M68K)
4382 #elif defined(TARGET_SPARC)
4383 #ifdef TARGET_SPARC64
4384 cpu_model
= "TI UltraSparc II";
4386 cpu_model
= "Fujitsu MB86904";
4388 #elif defined(TARGET_MIPS)
4389 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
4394 #elif defined TARGET_OPENRISC
4395 cpu_model
= "or1200";
4396 #elif defined(TARGET_PPC)
4397 # ifdef TARGET_PPC64
4398 cpu_model
= "POWER8";
4402 #elif defined TARGET_SH4
4403 cpu_model
= "sh7785";
4404 #elif defined TARGET_S390X
4411 /* NOTE: we need to init the CPU at this stage to get
4412 qemu_host_page_size */
4413 cpu
= cpu_init(cpu_model
);
4419 if (getenv("QEMU_STRACE")) {
4423 if (getenv("QEMU_RAND_SEED")) {
4424 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4427 target_environ
= envlist_to_environ(envlist
, NULL
);
4428 envlist_free(envlist
);
4431 * Now that page sizes are configured in cpu_init() we can do
4432 * proper page alignment for guest_base.
4434 guest_base
= HOST_PAGE_ALIGN(guest_base
);
4436 if (reserved_va
|| have_guest_base
) {
4437 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
4439 if (guest_base
== (unsigned long)-1) {
4440 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
4441 "space for use as guest address space (check your virtual "
4442 "memory ulimit setting or reserve less using -R option)\n",
4448 mmap_next_start
= reserved_va
;
4453 * Read in mmap_min_addr kernel parameter. This value is used
4454 * When loading the ELF image to determine whether guest_base
4455 * is needed. It is also used in mmap_find_vma.
4460 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
4462 if (fscanf(fp
, "%lu", &tmp
) == 1) {
4463 mmap_min_addr
= tmp
;
4464 qemu_log_mask(CPU_LOG_PAGE
, "host mmap_min_addr=0x%lx\n", mmap_min_addr
);
4471 * Prepare copy of argv vector for target.
4473 target_argc
= argc
- optind
;
4474 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
4475 if (target_argv
== NULL
) {
4476 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
4481 * If argv0 is specified (using '-0' switch) we replace
4482 * argv[0] pointer with the given one.
4485 if (argv0
!= NULL
) {
4486 target_argv
[i
++] = strdup(argv0
);
4488 for (; i
< target_argc
; i
++) {
4489 target_argv
[i
] = strdup(argv
[optind
+ i
]);
4491 target_argv
[target_argc
] = NULL
;
4493 ts
= g_new0(TaskState
, 1);
4494 init_task_state(ts
);
4495 /* build Task State */
4501 execfd
= qemu_getauxval(AT_EXECFD
);
4503 execfd
= open(filename
, O_RDONLY
);
4505 printf("Error while loading %s: %s\n", filename
, strerror(errno
));
4506 _exit(EXIT_FAILURE
);
4510 ret
= loader_exec(execfd
, filename
, target_argv
, target_environ
, regs
,
4513 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
4514 _exit(EXIT_FAILURE
);
4517 for (wrk
= target_environ
; *wrk
; wrk
++) {
4521 g_free(target_environ
);
4523 if (qemu_loglevel_mask(CPU_LOG_PAGE
)) {
4524 qemu_log("guest_base 0x%" PRIxPTR
"\n", guest_base
);
4527 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
4528 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
4529 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n", info
->start_code
);
4530 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n", info
->start_data
);
4531 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
4532 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n", info
->start_stack
);
4533 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
4534 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
4535 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->arg_start
);
4536 qemu_log("env_start 0x" TARGET_ABI_FMT_lx
"\n",
4537 info
->arg_end
+ (abi_ulong
)sizeof(abi_ulong
));
4538 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->saved_auxv
);
4541 target_set_brk(info
->brk
);
4545 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4546 generating the prologue until now so that the prologue can take
4547 the real value of GUEST_BASE into account. */
4548 tcg_prologue_init(tcg_ctx
);
4551 #if defined(TARGET_I386)
4552 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
4553 env
->hflags
|= HF_PE_MASK
| HF_CPL_MASK
;
4554 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
4555 env
->cr
[4] |= CR4_OSFXSR_MASK
;
4556 env
->hflags
|= HF_OSFXSR_MASK
;
4558 #ifndef TARGET_ABI32
4559 /* enable 64 bit mode if possible */
4560 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
4561 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
4564 env
->cr
[4] |= CR4_PAE_MASK
;
4565 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
4566 env
->hflags
|= HF_LMA_MASK
;
4569 /* flags setup : we activate the IRQs by default as in user mode */
4570 env
->eflags
|= IF_MASK
;
4572 /* linux register setup */
4573 #ifndef TARGET_ABI32
4574 env
->regs
[R_EAX
] = regs
->rax
;
4575 env
->regs
[R_EBX
] = regs
->rbx
;
4576 env
->regs
[R_ECX
] = regs
->rcx
;
4577 env
->regs
[R_EDX
] = regs
->rdx
;
4578 env
->regs
[R_ESI
] = regs
->rsi
;
4579 env
->regs
[R_EDI
] = regs
->rdi
;
4580 env
->regs
[R_EBP
] = regs
->rbp
;
4581 env
->regs
[R_ESP
] = regs
->rsp
;
4582 env
->eip
= regs
->rip
;
4584 env
->regs
[R_EAX
] = regs
->eax
;
4585 env
->regs
[R_EBX
] = regs
->ebx
;
4586 env
->regs
[R_ECX
] = regs
->ecx
;
4587 env
->regs
[R_EDX
] = regs
->edx
;
4588 env
->regs
[R_ESI
] = regs
->esi
;
4589 env
->regs
[R_EDI
] = regs
->edi
;
4590 env
->regs
[R_EBP
] = regs
->ebp
;
4591 env
->regs
[R_ESP
] = regs
->esp
;
4592 env
->eip
= regs
->eip
;
4595 /* linux interrupt setup */
4596 #ifndef TARGET_ABI32
4597 env
->idt
.limit
= 511;
4599 env
->idt
.limit
= 255;
4601 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
4602 PROT_READ
|PROT_WRITE
,
4603 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4604 idt_table
= g2h(env
->idt
.base
);
4627 /* linux segment setup */
4629 uint64_t *gdt_table
;
4630 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
4631 PROT_READ
|PROT_WRITE
,
4632 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4633 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
4634 gdt_table
= g2h(env
->gdt
.base
);
4636 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4637 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4638 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4640 /* 64 bit code segment */
4641 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4642 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4644 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4646 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
4647 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4648 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
4650 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
4651 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
4653 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
4654 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
4655 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
4656 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
4657 /* This hack makes Wine work... */
4658 env
->segs
[R_FS
].selector
= 0;
4660 cpu_x86_load_seg(env
, R_DS
, 0);
4661 cpu_x86_load_seg(env
, R_ES
, 0);
4662 cpu_x86_load_seg(env
, R_FS
, 0);
4663 cpu_x86_load_seg(env
, R_GS
, 0);
4665 #elif defined(TARGET_AARCH64)
4669 if (!(arm_feature(env
, ARM_FEATURE_AARCH64
))) {
4671 "The selected ARM CPU does not support 64 bit mode\n");
4675 for (i
= 0; i
< 31; i
++) {
4676 env
->xregs
[i
] = regs
->regs
[i
];
4679 env
->xregs
[31] = regs
->sp
;
4680 #ifdef TARGET_WORDS_BIGENDIAN
4681 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4682 for (i
= 1; i
< 4; ++i
) {
4683 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
4687 #elif defined(TARGET_ARM)
4690 cpsr_write(env
, regs
->uregs
[16], CPSR_USER
| CPSR_EXEC
,
4692 for(i
= 0; i
< 16; i
++) {
4693 env
->regs
[i
] = regs
->uregs
[i
];
4695 #ifdef TARGET_WORDS_BIGENDIAN
4697 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
4698 && (info
->elf_flags
& EF_ARM_BE8
)) {
4699 env
->uncached_cpsr
|= CPSR_E
;
4700 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4702 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
4706 #elif defined(TARGET_UNICORE32)
4709 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
4710 for (i
= 0; i
< 32; i
++) {
4711 env
->regs
[i
] = regs
->uregs
[i
];
4714 #elif defined(TARGET_SPARC)
4718 env
->npc
= regs
->npc
;
4720 for(i
= 0; i
< 8; i
++)
4721 env
->gregs
[i
] = regs
->u_regs
[i
];
4722 for(i
= 0; i
< 8; i
++)
4723 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
4725 #elif defined(TARGET_PPC)
4729 #if defined(TARGET_PPC64)
4730 int flag
= (env
->insns_flags2
& PPC2_BOOKE206
) ? MSR_CM
: MSR_SF
;
4731 #if defined(TARGET_ABI32)
4732 env
->msr
&= ~((target_ulong
)1 << flag
);
4734 env
->msr
|= (target_ulong
)1 << flag
;
4737 env
->nip
= regs
->nip
;
4738 for(i
= 0; i
< 32; i
++) {
4739 env
->gpr
[i
] = regs
->gpr
[i
];
4742 #elif defined(TARGET_M68K)
4745 env
->dregs
[0] = regs
->d0
;
4746 env
->dregs
[1] = regs
->d1
;
4747 env
->dregs
[2] = regs
->d2
;
4748 env
->dregs
[3] = regs
->d3
;
4749 env
->dregs
[4] = regs
->d4
;
4750 env
->dregs
[5] = regs
->d5
;
4751 env
->dregs
[6] = regs
->d6
;
4752 env
->dregs
[7] = regs
->d7
;
4753 env
->aregs
[0] = regs
->a0
;
4754 env
->aregs
[1] = regs
->a1
;
4755 env
->aregs
[2] = regs
->a2
;
4756 env
->aregs
[3] = regs
->a3
;
4757 env
->aregs
[4] = regs
->a4
;
4758 env
->aregs
[5] = regs
->a5
;
4759 env
->aregs
[6] = regs
->a6
;
4760 env
->aregs
[7] = regs
->usp
;
4762 ts
->sim_syscalls
= 1;
4764 #elif defined(TARGET_MICROBLAZE)
4766 env
->regs
[0] = regs
->r0
;
4767 env
->regs
[1] = regs
->r1
;
4768 env
->regs
[2] = regs
->r2
;
4769 env
->regs
[3] = regs
->r3
;
4770 env
->regs
[4] = regs
->r4
;
4771 env
->regs
[5] = regs
->r5
;
4772 env
->regs
[6] = regs
->r6
;
4773 env
->regs
[7] = regs
->r7
;
4774 env
->regs
[8] = regs
->r8
;
4775 env
->regs
[9] = regs
->r9
;
4776 env
->regs
[10] = regs
->r10
;
4777 env
->regs
[11] = regs
->r11
;
4778 env
->regs
[12] = regs
->r12
;
4779 env
->regs
[13] = regs
->r13
;
4780 env
->regs
[14] = regs
->r14
;
4781 env
->regs
[15] = regs
->r15
;
4782 env
->regs
[16] = regs
->r16
;
4783 env
->regs
[17] = regs
->r17
;
4784 env
->regs
[18] = regs
->r18
;
4785 env
->regs
[19] = regs
->r19
;
4786 env
->regs
[20] = regs
->r20
;
4787 env
->regs
[21] = regs
->r21
;
4788 env
->regs
[22] = regs
->r22
;
4789 env
->regs
[23] = regs
->r23
;
4790 env
->regs
[24] = regs
->r24
;
4791 env
->regs
[25] = regs
->r25
;
4792 env
->regs
[26] = regs
->r26
;
4793 env
->regs
[27] = regs
->r27
;
4794 env
->regs
[28] = regs
->r28
;
4795 env
->regs
[29] = regs
->r29
;
4796 env
->regs
[30] = regs
->r30
;
4797 env
->regs
[31] = regs
->r31
;
4798 env
->sregs
[SR_PC
] = regs
->pc
;
4800 #elif defined(TARGET_MIPS)
4804 for(i
= 0; i
< 32; i
++) {
4805 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
4807 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
4808 if (regs
->cp0_epc
& 1) {
4809 env
->hflags
|= MIPS_HFLAG_M16
;
4811 if (((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) !=
4812 ((env
->active_fpu
.fcr31
& (1 << FCR31_NAN2008
)) != 0)) {
4813 if ((env
->active_fpu
.fcr31_rw_bitmask
&
4814 (1 << FCR31_NAN2008
)) == 0) {
4815 fprintf(stderr
, "ELF binary's NaN mode not supported by CPU\n");
4818 if ((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) {
4819 env
->active_fpu
.fcr31
|= (1 << FCR31_NAN2008
);
4821 env
->active_fpu
.fcr31
&= ~(1 << FCR31_NAN2008
);
4823 restore_snan_bit_mode(env
);
4826 #elif defined(TARGET_NIOS2)
4829 env
->regs
[1] = regs
->r1
;
4830 env
->regs
[2] = regs
->r2
;
4831 env
->regs
[3] = regs
->r3
;
4832 env
->regs
[4] = regs
->r4
;
4833 env
->regs
[5] = regs
->r5
;
4834 env
->regs
[6] = regs
->r6
;
4835 env
->regs
[7] = regs
->r7
;
4836 env
->regs
[8] = regs
->r8
;
4837 env
->regs
[9] = regs
->r9
;
4838 env
->regs
[10] = regs
->r10
;
4839 env
->regs
[11] = regs
->r11
;
4840 env
->regs
[12] = regs
->r12
;
4841 env
->regs
[13] = regs
->r13
;
4842 env
->regs
[14] = regs
->r14
;
4843 env
->regs
[15] = regs
->r15
;
4844 /* TODO: unsigned long orig_r2; */
4845 env
->regs
[R_RA
] = regs
->ra
;
4846 env
->regs
[R_FP
] = regs
->fp
;
4847 env
->regs
[R_SP
] = regs
->sp
;
4848 env
->regs
[R_GP
] = regs
->gp
;
4849 env
->regs
[CR_ESTATUS
] = regs
->estatus
;
4850 env
->regs
[R_EA
] = regs
->ea
;
4851 /* TODO: unsigned long orig_r7; */
4853 /* Emulate eret when starting thread. */
4854 env
->regs
[R_PC
] = regs
->ea
;
4856 #elif defined(TARGET_OPENRISC)
4860 for (i
= 0; i
< 32; i
++) {
4861 cpu_set_gpr(env
, i
, regs
->gpr
[i
]);
4864 cpu_set_sr(env
, regs
->sr
);
4866 #elif defined(TARGET_SH4)
4870 for(i
= 0; i
< 16; i
++) {
4871 env
->gregs
[i
] = regs
->regs
[i
];
4875 #elif defined(TARGET_ALPHA)
4879 for(i
= 0; i
< 28; i
++) {
4880 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4882 env
->ir
[IR_SP
] = regs
->usp
;
4885 #elif defined(TARGET_CRIS)
4887 env
->regs
[0] = regs
->r0
;
4888 env
->regs
[1] = regs
->r1
;
4889 env
->regs
[2] = regs
->r2
;
4890 env
->regs
[3] = regs
->r3
;
4891 env
->regs
[4] = regs
->r4
;
4892 env
->regs
[5] = regs
->r5
;
4893 env
->regs
[6] = regs
->r6
;
4894 env
->regs
[7] = regs
->r7
;
4895 env
->regs
[8] = regs
->r8
;
4896 env
->regs
[9] = regs
->r9
;
4897 env
->regs
[10] = regs
->r10
;
4898 env
->regs
[11] = regs
->r11
;
4899 env
->regs
[12] = regs
->r12
;
4900 env
->regs
[13] = regs
->r13
;
4901 env
->regs
[14] = info
->start_stack
;
4902 env
->regs
[15] = regs
->acr
;
4903 env
->pc
= regs
->erp
;
4905 #elif defined(TARGET_S390X)
4908 for (i
= 0; i
< 16; i
++) {
4909 env
->regs
[i
] = regs
->gprs
[i
];
4911 env
->psw
.mask
= regs
->psw
.mask
;
4912 env
->psw
.addr
= regs
->psw
.addr
;
4914 #elif defined(TARGET_TILEGX)
4917 for (i
= 0; i
< TILEGX_R_COUNT
; i
++) {
4918 env
->regs
[i
] = regs
->regs
[i
];
4920 for (i
= 0; i
< TILEGX_SPR_COUNT
; i
++) {
4925 #elif defined(TARGET_HPPA)
4928 for (i
= 1; i
< 32; i
++) {
4929 env
->gr
[i
] = regs
->gr
[i
];
4931 env
->iaoq_f
= regs
->iaoq
[0];
4932 env
->iaoq_b
= regs
->iaoq
[1];
4935 #error unsupported target CPU
4938 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4939 ts
->stack_base
= info
->start_stack
;
4940 ts
->heap_base
= info
->brk
;
4941 /* This will be filled in on the first SYS_HEAPINFO call. */
4946 if (gdbserver_start(gdbstub_port
) < 0) {
4947 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4951 gdb_handlesig(cpu
, 0);