hw/ppc/mac_oldworld.c

   1
   2 /*
   3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4  *
   5  * Copyright (c) 2004-2007 Fabrice Bellard
   6  * Copyright (c) 2007 Jocelyn Mayer
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26 #include "qemu/osdep.h"
  27 #include "qemu/units.h"
  28 #include "qapi/error.h"
  29 #include "hw/hw.h"
  30 #include "hw/ppc/ppc.h"
  31 #include "mac.h"
  32 #include "hw/input/adb.h"
  33 #include "sysemu/sysemu.h"
  34 #include "net/net.h"
  35 #include "hw/isa/isa.h"
  36 #include "hw/pci/pci.h"
  37 #include "hw/pci/pci_host.h"
  38 #include "hw/boards.h"
  39 #include "hw/nvram/fw_cfg.h"
  40 #include "hw/char/escc.h"
  41 #include "hw/misc/macio/macio.h"
  42 #include "hw/ide.h"
  43 #include "hw/loader.h"
  44 #include "hw/fw-path-provider.h"
  45 #include "elf.h"
  46 #include "qemu/error-report.h"
  47 #include "sysemu/kvm.h"
  48 #include "kvm_ppc.h"
  49 #include "exec/address-spaces.h"
  50
  51 #define MAX_IDE_BUS 2
  52 #define CFG_ADDR 0xf0000510
  53 #define TBFREQ 16600000UL
  54 #define CLOCKFREQ 266000000UL
  55 #define BUSFREQ 66000000UL
  56
  57 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  58
  59 #define GRACKLE_BASE 0xfec00000
  60
  61 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  62                             Error **errp)
  63 {
  64     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  65 }
  66
  67 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  68 {
  69     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  70 }
  71
  72 static void ppc_heathrow_reset(void *opaque)
  73 {
  74     PowerPCCPU *cpu = opaque;
  75
  76     cpu_reset(CPU(cpu));
  77 }
  78
  79 static void ppc_heathrow_init(MachineState *machine)
  80 {
  81     ram_addr_t ram_size = machine->ram_size;
  82     const char *kernel_filename = machine->kernel_filename;
  83     const char *kernel_cmdline = machine->kernel_cmdline;
  84     const char *initrd_filename = machine->initrd_filename;
  85     const char *boot_device = machine->boot_order;
  86     MemoryRegion *sysmem = get_system_memory();
  87     PowerPCCPU *cpu = NULL;
  88     CPUPPCState *env = NULL;
  89     char *filename;
  90     int linux_boot, i;
  91     MemoryRegion *ram = g_new(MemoryRegion, 1);
  92     MemoryRegion *bios = g_new(MemoryRegion, 1);
  93     uint32_t kernel_base, initrd_base, cmdline_base = 0;
  94     int32_t kernel_size, initrd_size;
  95     PCIBus *pci_bus;
  96     OldWorldMacIOState *macio;
  97     MACIOIDEState *macio_ide;
  98     SysBusDevice *s;
  99     DeviceState *dev, *pic_dev;
 100     BusState *adb_bus;
 101     int bios_size;
 102     uint16_t ppc_boot_device;
 103     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 104     void *fw_cfg;
 105     uint64_t tbfreq;
 106
 107     linux_boot = (kernel_filename != NULL);
 108
 109     /* init CPUs */
 110     for (i = 0; i < smp_cpus; i++) {
 111         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 112         env = &cpu->env;
 113
 114         /* Set time-base frequency to 16.6 Mhz */
 115         cpu_ppc_tb_init(env,  TBFREQ);
 116         qemu_register_reset(ppc_heathrow_reset, cpu);
 117     }
 118
 119     /* allocate RAM */
 120     if (ram_size > 2047 * MiB) {
 121         error_report("Too much memory for this machine: %" PRId64 " MB, "
 122                      "maximum 2047 MB", ram_size / MiB);
 123         exit(1);
 124     }
 125
 126     memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
 127                                          ram_size);
 128     memory_region_add_subregion(sysmem, 0, ram);
 129
 130     /* allocate and load BIOS */
 131     memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
 132                            &error_fatal);
 133
 134     if (bios_name == NULL)
 135         bios_name = PROM_FILENAME;
 136     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 137     memory_region_set_readonly(bios, true);
 138     memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 139
 140     /* Load OpenBIOS (ELF) */
 141     if (filename) {
 142         bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL,
 143                              1, PPC_ELF_MACHINE, 0, 0);
 144         g_free(filename);
 145     } else {
 146         bios_size = -1;
 147     }
 148     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 149         error_report("could not load PowerPC bios '%s'", bios_name);
 150         exit(1);
 151     }
 152
 153     if (linux_boot) {
 154         uint64_t lowaddr = 0;
 155         int bswap_needed;
 156
 157 #ifdef BSWAP_NEEDED
 158         bswap_needed = 1;
 159 #else
 160         bswap_needed = 0;
 161 #endif
 162         kernel_base = KERNEL_LOAD_ADDR;
 163         kernel_size = load_elf(kernel_filename, NULL,
 164                                translate_kernel_address, NULL,
 165                                NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
 166                                0, 0);
 167         if (kernel_size < 0)
 168             kernel_size = load_aout(kernel_filename, kernel_base,
 169                                     ram_size - kernel_base, bswap_needed,
 170                                     TARGET_PAGE_SIZE);
 171         if (kernel_size < 0)
 172             kernel_size = load_image_targphys(kernel_filename,
 173                                               kernel_base,
 174                                               ram_size - kernel_base);
 175         if (kernel_size < 0) {
 176             error_report("could not load kernel '%s'", kernel_filename);
 177             exit(1);
 178         }
 179         /* load initrd */
 180         if (initrd_filename) {
 181             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 182             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 183                                               ram_size - initrd_base);
 184             if (initrd_size < 0) {
 185                 error_report("could not load initial ram disk '%s'",
 186                              initrd_filename);
 187                 exit(1);
 188             }
 189             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 190         } else {
 191             initrd_base = 0;
 192             initrd_size = 0;
 193             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 194         }
 195         ppc_boot_device = 'm';
 196     } else {
 197         kernel_base = 0;
 198         kernel_size = 0;
 199         initrd_base = 0;
 200         initrd_size = 0;
 201         ppc_boot_device = '\0';
 202         for (i = 0; boot_device[i] != '\0'; i++) {
 203             /* TOFIX: for now, the second IDE channel is not properly
 204              *        used by OHW. The Mac floppy disk are not emulated.
 205              *        For now, OHW cannot boot from the network.
 206              */
 207 #if 0
 208             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 209                 ppc_boot_device = boot_device[i];
 210                 break;
 211             }
 212 #else
 213             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 214                 ppc_boot_device = boot_device[i];
 215                 break;
 216             }
 217 #endif
 218         }
 219         if (ppc_boot_device == '\0') {
 220             error_report("No valid boot device for G3 Beige machine");
 221             exit(1);
 222         }
 223     }
 224
 225     /* XXX: we register only 1 output pin for heathrow PIC */
 226     pic_dev = qdev_create(NULL, TYPE_HEATHROW);
 227     qdev_init_nofail(pic_dev);
 228
 229     /* Connect the heathrow PIC outputs to the 6xx bus */
 230     for (i = 0; i < smp_cpus; i++) {
 231         switch (PPC_INPUT(env)) {
 232         case PPC_FLAGS_INPUT_6xx:
 233             qdev_connect_gpio_out(pic_dev, 0,
 234                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
 235             break;
 236         default:
 237             error_report("Bus model not supported on OldWorld Mac machine");
 238             exit(1);
 239         }
 240     }
 241
 242     /* Timebase Frequency */
 243     if (kvm_enabled()) {
 244         tbfreq = kvmppc_get_tbfreq();
 245     } else {
 246         tbfreq = TBFREQ;
 247     }
 248
 249     /* init basic PC hardware */
 250     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 251         error_report("Only 6xx bus is supported on heathrow machine");
 252         exit(1);
 253     }
 254
 255     /* Grackle PCI host bridge */
 256     dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
 257     qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
 258     object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 259                              &error_abort);
 260     qdev_init_nofail(dev);
 261     s = SYS_BUS_DEVICE(dev);
 262     sysbus_mmio_map(s, 0, GRACKLE_BASE);
 263     sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
 264     /* PCI hole */
 265     memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 266                                 sysbus_mmio_get_region(s, 2));
 267     /* Register 2 MB of ISA IO space */
 268     memory_region_add_subregion(get_system_memory(), 0xfe000000,
 269                                 sysbus_mmio_get_region(s, 3));
 270
 271     pci_bus = PCI_HOST_BRIDGE(dev)->bus;
 272
 273     pci_vga_init(pci_bus);
 274
 275     for (i = 0; i < nb_nics; i++) {
 276         pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
 277     }
 278
 279     ide_drive_get(hd, ARRAY_SIZE(hd));
 280
 281     /* MacIO */
 282     macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
 283     dev = DEVICE(macio);
 284     qdev_prop_set_uint64(dev, "frequency", tbfreq);
 285     object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
 286                              &error_abort);
 287     qdev_init_nofail(dev);
 288
 289     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 290                                                         "ide[0]"));
 291     macio_ide_init_drives(macio_ide, hd);
 292
 293     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 294                                                         "ide[1]"));
 295     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 296
 297     dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 298     adb_bus = qdev_get_child_bus(dev, "adb.0");
 299     dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 300     qdev_init_nofail(dev);
 301     dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 302     qdev_init_nofail(dev);
 303
 304     if (machine_usb(machine)) {
 305         pci_create_simple(pci_bus, -1, "pci-ohci");
 306     }
 307
 308     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 309         graphic_depth = 15;
 310
 311     /* No PCI init: the BIOS will do it */
 312
 313     dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
 314     fw_cfg = FW_CFG(dev);
 315     qdev_prop_set_uint32(dev, "data_width", 1);
 316     qdev_prop_set_bit(dev, "dma_enabled", false);
 317     object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
 318                               OBJECT(fw_cfg), NULL);
 319     qdev_init_nofail(dev);
 320     s = SYS_BUS_DEVICE(dev);
 321     sysbus_mmio_map(s, 0, CFG_ADDR);
 322     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 323
 324     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 325     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 326     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 327     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 328     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 329     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 330     if (kernel_cmdline) {
 331         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 332         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 333     } else {
 334         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 335     }
 336     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 337     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 338     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 339
 340     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 341     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 342     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 343
 344     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 345     if (kvm_enabled()) {
 346 #ifdef CONFIG_KVM
 347         uint8_t *hypercall;
 348
 349         hypercall = g_malloc(16);
 350         kvmppc_get_hypercall(env, hypercall, 16);
 351         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 352         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 353 #endif
 354     }
 355     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 356     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 357     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 358     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 359
 360     /* MacOS NDRV VGA driver */
 361     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 362     if (filename) {
 363         gchar *ndrv_file;
 364         gsize ndrv_size;
 365
 366         if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
 367             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 368         }
 369         g_free(filename);
 370     }
 371
 372     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 373 }
 374
 375 /*
 376  * Implementation of an interface to adjust firmware path
 377  * for the bootindex property handling.
 378  */
 379 static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
 380                                   DeviceState *dev)
 381 {
 382     PCIDevice *pci;
 383     IDEBus *ide_bus;
 384     IDEState *ide_s;
 385     MACIOIDEState *macio_ide;
 386
 387     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
 388         pci = PCI_DEVICE(dev);
 389         return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
 390     }
 391
 392     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
 393         macio_ide = MACIO_IDE(dev);
 394         return g_strdup_printf("ata-3@%x", macio_ide->addr);
 395     }
 396
 397     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
 398         ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
 399         ide_s = idebus_active_if(ide_bus);
 400
 401         if (ide_s->drive_kind == IDE_CD) {
 402             return g_strdup("cdrom");
 403         }
 404
 405         return g_strdup("hd");
 406     }
 407
 408     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
 409         return g_strdup("hd");
 410     }
 411
 412     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
 413         return g_strdup("cdrom");
 414     }
 415
 416     if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
 417         return g_strdup("disk");
 418     }
 419
 420     return NULL;
 421 }
 422
 423 static int heathrow_kvm_type(MachineState *machine, const char *arg)
 424 {
 425     /* Always force PR KVM */
 426     return 2;
 427 }
 428
 429 static void heathrow_class_init(ObjectClass *oc, void *data)
 430 {
 431     MachineClass *mc = MACHINE_CLASS(oc);
 432     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
 433
 434     mc->desc = "Heathrow based PowerMAC";
 435     mc->init = ppc_heathrow_init;
 436     mc->block_default_type = IF_IDE;
 437     mc->max_cpus = MAX_CPUS;
 438 #ifndef TARGET_PPC64
 439     mc->is_default = 1;
 440 #endif
 441     /* TOFIX "cad" when Mac floppy is implemented */
 442     mc->default_boot_order = "cd";
 443     mc->kvm_type = heathrow_kvm_type;
 444     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
 445     mc->default_display = "std";
 446     mc->ignore_boot_device_suffixes = true;
 447     fwc->get_dev_path = heathrow_fw_dev_path;
 448 }
 449
 450 static const TypeInfo ppc_heathrow_machine_info = {
 451     .name          = MACHINE_TYPE_NAME("g3beige"),
 452     .parent        = TYPE_MACHINE,
 453     .class_init    = heathrow_class_init,
 454     .interfaces = (InterfaceInfo[]) {
 455         { TYPE_FW_PATH_PROVIDER },
 456         { }
 457     },
 458 };
 459
 460 static void ppc_heathrow_register_types(void)
 461 {
 462     type_register_static(&ppc_heathrow_machine_info);
 463 }
 464
 465 type_init(ppc_heathrow_register_types);