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hw/boards: Add a MachineState parameter to kvm_type callback
[qemu/ar7.git] / hw / ppc / mac_newworld.c
blob97e88171450ebfef2d1424ec0bd7da004a64f910
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47 *
48 */
49 #include "qemu/osdep.h"
50 #include "qapi/error.h"
51 #include "hw/hw.h"
52 #include "hw/ppc/ppc.h"
53 #include "hw/ppc/mac.h"
54 #include "hw/input/adb.h"
55 #include "hw/ppc/mac_dbdma.h"
56 #include "hw/pci/pci.h"
57 #include "net/net.h"
58 #include "sysemu/sysemu.h"
59 #include "hw/boards.h"
60 #include "hw/nvram/fw_cfg.h"
61 #include "hw/char/escc.h"
62 #include "hw/misc/macio/macio.h"
63 #include "hw/ppc/openpic.h"
64 #include "hw/ide.h"
65 #include "hw/loader.h"
66 #include "hw/fw-path-provider.h"
67 #include "elf.h"
68 #include "qemu/error-report.h"
69 #include "sysemu/kvm.h"
70 #include "kvm_ppc.h"
71 #include "hw/usb.h"
72 #include "exec/address-spaces.h"
73 #include "hw/sysbus.h"
74 #include "trace.h"
75
76 #define MAX_IDE_BUS 2
77 #define CFG_ADDR 0xf0000510
78 #define TBFREQ (100UL * 1000UL * 1000UL)
79 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
80 #define BUSFREQ (100UL * 1000UL * 1000UL)
81
82 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
83
84
85 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
86 Error **errp)
87 {
88 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
89 }
90
91 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
92 {
93 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
94 }
95
96 static void ppc_core99_reset(void *opaque)
97 {
98 PowerPCCPU *cpu = opaque;
99
100 cpu_reset(CPU(cpu));
101 /* 970 CPUs want to get their initial IP as part of their boot protocol */
102 cpu->env.nip = PROM_ADDR + 0x100;
103 }
104
105 /* PowerPC Mac99 hardware initialisation */
106 static void ppc_core99_init(MachineState *machine)
107 {
108 ram_addr_t ram_size = machine->ram_size;
109 const char *kernel_filename = machine->kernel_filename;
110 const char *kernel_cmdline = machine->kernel_cmdline;
111 const char *initrd_filename = machine->initrd_filename;
112 const char *boot_device = machine->boot_order;
113 Core99MachineState *core99_machine = CORE99_MACHINE(machine);
114 PowerPCCPU *cpu = NULL;
115 CPUPPCState *env = NULL;
116 char *filename;
117 IrqLines *openpic_irqs;
118 int linux_boot, i, j, k;
119 MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
120 hwaddr kernel_base, initrd_base, cmdline_base = 0;
121 long kernel_size, initrd_size;
122 UNINHostState *uninorth_pci;
123 PCIBus *pci_bus;
124 NewWorldMacIOState *macio;
125 bool has_pmu, has_adb;
126 MACIOIDEState *macio_ide;
127 BusState *adb_bus;
128 MacIONVRAMState *nvr;
129 int bios_size;
130 int ppc_boot_device;
131 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
132 void *fw_cfg;
133 int machine_arch;
134 SysBusDevice *s;
135 DeviceState *dev, *pic_dev;
136 hwaddr nvram_addr = 0xFFF04000;
137 uint64_t tbfreq;
138
139 linux_boot = (kernel_filename != NULL);
140
141 /* init CPUs */
142 for (i = 0; i < smp_cpus; i++) {
143 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
144 env = &cpu->env;
145
146 /* Set time-base frequency to 100 Mhz */
147 cpu_ppc_tb_init(env, TBFREQ);
148 qemu_register_reset(ppc_core99_reset, cpu);
149 }
150
151 /* allocate RAM */
152 memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size);
153 memory_region_add_subregion(get_system_memory(), 0, ram);
154
155 /* allocate and load BIOS */
156 memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
157 &error_fatal);
158
159 if (bios_name == NULL)
160 bios_name = PROM_FILENAME;
161 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
162 memory_region_set_readonly(bios, true);
163 memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
164
165 /* Load OpenBIOS (ELF) */
166 if (filename) {
167 bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
168 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
169
170 g_free(filename);
171 } else {
172 bios_size = -1;
173 }
174 if (bios_size < 0 || bios_size > BIOS_SIZE) {
175 error_report("could not load PowerPC bios '%s'", bios_name);
176 exit(1);
177 }
178
179 if (linux_boot) {
180 uint64_t lowaddr = 0;
181 int bswap_needed;
182
183 #ifdef BSWAP_NEEDED
184 bswap_needed = 1;
185 #else
186 bswap_needed = 0;
187 #endif
188 kernel_base = KERNEL_LOAD_ADDR;
189
190 kernel_size = load_elf(kernel_filename, NULL,
191 translate_kernel_address, NULL,
192 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
193 0, 0);
194 if (kernel_size < 0)
195 kernel_size = load_aout(kernel_filename, kernel_base,
196 ram_size - kernel_base, bswap_needed,
197 TARGET_PAGE_SIZE);
198 if (kernel_size < 0)
199 kernel_size = load_image_targphys(kernel_filename,
200 kernel_base,
201 ram_size - kernel_base);
202 if (kernel_size < 0) {
203 error_report("could not load kernel '%s'", kernel_filename);
204 exit(1);
205 }
206 /* load initrd */
207 if (initrd_filename) {
208 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
209 initrd_size = load_image_targphys(initrd_filename, initrd_base,
210 ram_size - initrd_base);
211 if (initrd_size < 0) {
212 error_report("could not load initial ram disk '%s'",
213 initrd_filename);
214 exit(1);
215 }
216 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
217 } else {
218 initrd_base = 0;
219 initrd_size = 0;
220 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
221 }
222 ppc_boot_device = 'm';
223 } else {
224 kernel_base = 0;
225 kernel_size = 0;
226 initrd_base = 0;
227 initrd_size = 0;
228 ppc_boot_device = '\0';
229 /* We consider that NewWorld PowerMac never have any floppy drive
230 * For now, OHW cannot boot from the network.
231 */
232 for (i = 0; boot_device[i] != '\0'; i++) {
233 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
234 ppc_boot_device = boot_device[i];
235 break;
236 }
237 }
238 if (ppc_boot_device == '\0') {
239 error_report("No valid boot device for Mac99 machine");
240 exit(1);
241 }
242 }
243
244 /* UniN init */
245 dev = qdev_create(NULL, TYPE_UNI_NORTH);
246 qdev_init_nofail(dev);
247 s = SYS_BUS_DEVICE(dev);
248 memory_region_add_subregion(get_system_memory(), 0xf8000000,
249 sysbus_mmio_get_region(s, 0));
250
251 openpic_irqs = g_new0(IrqLines, smp_cpus);
252 for (i = 0; i < smp_cpus; i++) {
253 /* Mac99 IRQ connection between OpenPIC outputs pins
254 * and PowerPC input pins
255 */
256 switch (PPC_INPUT(env)) {
257 case PPC_FLAGS_INPUT_6xx:
258 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
259 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
260 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
261 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
262 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
263 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
264 /* Not connected ? */
265 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
266 /* Check this */
267 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
268 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
269 break;
270 #if defined(TARGET_PPC64)
271 case PPC_FLAGS_INPUT_970:
272 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
273 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
274 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
275 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
276 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
277 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
278 /* Not connected ? */
279 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
280 /* Check this */
281 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
282 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
283 break;
284 #endif /* defined(TARGET_PPC64) */
285 default:
286 error_report("Bus model not supported on mac99 machine");
287 exit(1);
288 }
289 }
290
291 pic_dev = qdev_create(NULL, TYPE_OPENPIC);
292 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
293 qdev_init_nofail(pic_dev);
294 s = SYS_BUS_DEVICE(pic_dev);
295 k = 0;
296 for (i = 0; i < smp_cpus; i++) {
297 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
298 sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
299 }
300 }
301 g_free(openpic_irqs);
302
303 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
304 /* 970 gets a U3 bus */
305 /* Uninorth AGP bus */
306 dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
307 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
308 &error_abort);
309 qdev_init_nofail(dev);
310 uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
311 s = SYS_BUS_DEVICE(dev);
312 /* PCI hole */
313 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
314 sysbus_mmio_get_region(s, 2));
315 /* Register 8 MB of ISA IO space */
316 memory_region_add_subregion(get_system_memory(), 0xf2000000,
317 sysbus_mmio_get_region(s, 3));
318 sysbus_mmio_map(s, 0, 0xf0800000);
319 sysbus_mmio_map(s, 1, 0xf0c00000);
320
321 machine_arch = ARCH_MAC99_U3;
322 } else {
323 /* Use values found on a real PowerMac */
324 /* Uninorth AGP bus */
325 dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
326 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
327 &error_abort);
328 qdev_init_nofail(dev);
329 s = SYS_BUS_DEVICE(dev);
330 sysbus_mmio_map(s, 0, 0xf0800000);
331 sysbus_mmio_map(s, 1, 0xf0c00000);
332
333 /* Uninorth internal bus */
334 dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
335 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
336 &error_abort);
337 qdev_init_nofail(dev);
338 s = SYS_BUS_DEVICE(dev);
339 sysbus_mmio_map(s, 0, 0xf4800000);
340 sysbus_mmio_map(s, 1, 0xf4c00000);
341
342 /* Uninorth main bus */
343 dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
344 qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
345 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
346 &error_abort);
347 qdev_init_nofail(dev);
348 uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
349 s = SYS_BUS_DEVICE(dev);
350 /* PCI hole */
351 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
352 sysbus_mmio_get_region(s, 2));
353 /* Register 8 MB of ISA IO space */
354 memory_region_add_subregion(get_system_memory(), 0xf2000000,
355 sysbus_mmio_get_region(s, 3));
356 sysbus_mmio_map(s, 0, 0xf2800000);
357 sysbus_mmio_map(s, 1, 0xf2c00000);
358
359 machine_arch = ARCH_MAC99;
360 }
361
362 machine->usb |= defaults_enabled() && !machine->usb_disabled;
363 has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
364 has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
365 core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
366
367 /* Timebase Frequency */
368 if (kvm_enabled()) {
369 tbfreq = kvmppc_get_tbfreq();
370 } else {
371 tbfreq = TBFREQ;
372 }
373
374 /* init basic PC hardware */
375 pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
376
377 /* MacIO */
378 macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
379 dev = DEVICE(macio);
380 qdev_prop_set_uint64(dev, "frequency", tbfreq);
381 qdev_prop_set_bit(dev, "has-pmu", has_pmu);
382 qdev_prop_set_bit(dev, "has-adb", has_adb);
383 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
384 &error_abort);
385 qdev_init_nofail(dev);
386
387 /* We only emulate 2 out of 3 IDE controllers for now */
388 ide_drive_get(hd, ARRAY_SIZE(hd));
389
390 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
391 "ide[0]"));
392 macio_ide_init_drives(macio_ide, hd);
393
394 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
395 "ide[1]"));
396 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
397
398 if (has_adb) {
399 if (has_pmu) {
400 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
401 } else {
402 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
403 }
404
405 adb_bus = qdev_get_child_bus(dev, "adb.0");
406 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
407 qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
408 qdev_init_nofail(dev);
409
410 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
411 qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
412 qdev_init_nofail(dev);
413 }
414
415 if (machine->usb) {
416 pci_create_simple(pci_bus, -1, "pci-ohci");
417
418 /* U3 needs to use USB for input because Linux doesn't support via-cuda
419 on PPC64 */
420 if (!has_adb || machine_arch == ARCH_MAC99_U3) {
421 USBBus *usb_bus = usb_bus_find(-1);
422
423 usb_create_simple(usb_bus, "usb-kbd");
424 usb_create_simple(usb_bus, "usb-mouse");
425 }
426 }
427
428 pci_vga_init(pci_bus);
429
430 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
431 graphic_depth = 15;
432 }
433
434 for (i = 0; i < nb_nics; i++) {
435 pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
436 }
437
438 /* The NewWorld NVRAM is not located in the MacIO device */
439 #ifdef CONFIG_KVM
440 if (kvm_enabled() && getpagesize() > 4096) {
441 /* We can't combine read-write and read-only in a single page, so
442 move the NVRAM out of ROM again for KVM */
443 nvram_addr = 0xFFE00000;
444 }
445 #endif
446 dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
447 qdev_prop_set_uint32(dev, "size", 0x2000);
448 qdev_prop_set_uint32(dev, "it_shift", 1);
449 qdev_init_nofail(dev);
450 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
451 nvr = MACIO_NVRAM(dev);
452 pmac_format_nvram_partition(nvr, 0x2000);
453 /* No PCI init: the BIOS will do it */
454
455 dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
456 fw_cfg = FW_CFG(dev);
457 qdev_prop_set_uint32(dev, "data_width", 1);
458 qdev_prop_set_bit(dev, "dma_enabled", false);
459 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
460 OBJECT(fw_cfg), NULL);
461 qdev_init_nofail(dev);
462 s = SYS_BUS_DEVICE(dev);
463 sysbus_mmio_map(s, 0, CFG_ADDR);
464 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
465
466 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
467 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
468 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
469 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
470 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
471 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
472 if (kernel_cmdline) {
473 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
474 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
475 } else {
476 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
477 }
478 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
479 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
480 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
481
482 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
483 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
484 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
485
486 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
487
488 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
489 if (kvm_enabled()) {
490 #ifdef CONFIG_KVM
491 uint8_t *hypercall;
492
493 hypercall = g_malloc(16);
494 kvmppc_get_hypercall(env, hypercall, 16);
495 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
496 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
497 #endif
498 }
499 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
500 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
501 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
502 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
503 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
504
505 /* MacOS NDRV VGA driver */
506 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
507 if (filename) {
508 gchar *ndrv_file;
509 gsize ndrv_size;
510
511 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
512 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
513 }
514 g_free(filename);
515 }
516
517 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
518 }
519
520 /*
521 * Implementation of an interface to adjust firmware path
522 * for the bootindex property handling.
523 */
524 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
525 DeviceState *dev)
526 {
527 PCIDevice *pci;
528 IDEBus *ide_bus;
529 IDEState *ide_s;
530 MACIOIDEState *macio_ide;
531
532 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
533 pci = PCI_DEVICE(dev);
534 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
535 }
536
537 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
538 macio_ide = MACIO_IDE(dev);
539 return g_strdup_printf("ata-3@%x", macio_ide->addr);
540 }
541
542 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
543 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
544 ide_s = idebus_active_if(ide_bus);
545
546 if (ide_s->drive_kind == IDE_CD) {
547 return g_strdup("cdrom");
548 }
549
550 return g_strdup("hd");
551 }
552
553 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
554 return g_strdup("hd");
555 }
556
557 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
558 return g_strdup("cdrom");
559 }
560
561 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
562 return g_strdup("disk");
563 }
564
565 return NULL;
566 }
567 static int core99_kvm_type(MachineState *machine, const char *arg)
568 {
569 /* Always force PR KVM */
570 return 2;
571 }
572
573 static void core99_machine_class_init(ObjectClass *oc, void *data)
574 {
575 MachineClass *mc = MACHINE_CLASS(oc);
576 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
577
578 mc->desc = "Mac99 based PowerMAC";
579 mc->init = ppc_core99_init;
580 mc->block_default_type = IF_IDE;
581 mc->max_cpus = MAX_CPUS;
582 mc->default_boot_order = "cd";
583 mc->default_display = "std";
584 mc->kvm_type = core99_kvm_type;
585 #ifdef TARGET_PPC64
586 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
587 #else
588 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
589 #endif
590 mc->ignore_boot_device_suffixes = true;
591 fwc->get_dev_path = core99_fw_dev_path;
592 }
593
594 static char *core99_get_via_config(Object *obj, Error **errp)
595 {
596 Core99MachineState *cms = CORE99_MACHINE(obj);
597
598 switch (cms->via_config) {
599 default:
600 case CORE99_VIA_CONFIG_CUDA:
601 return g_strdup("cuda");
602
603 case CORE99_VIA_CONFIG_PMU:
604 return g_strdup("pmu");
605
606 case CORE99_VIA_CONFIG_PMU_ADB:
607 return g_strdup("pmu-adb");
608 }
609 }
610
611 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
612 {
613 Core99MachineState *cms = CORE99_MACHINE(obj);
614
615 if (!strcmp(value, "cuda")) {
616 cms->via_config = CORE99_VIA_CONFIG_CUDA;
617 } else if (!strcmp(value, "pmu")) {
618 cms->via_config = CORE99_VIA_CONFIG_PMU;
619 } else if (!strcmp(value, "pmu-adb")) {
620 cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
621 } else {
622 error_setg(errp, "Invalid via value");
623 error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
624 }
625 }
626
627 static void core99_instance_init(Object *obj)
628 {
629 Core99MachineState *cms = CORE99_MACHINE(obj);
630
631 /* Default via_config is CORE99_VIA_CONFIG_CUDA */
632 cms->via_config = CORE99_VIA_CONFIG_CUDA;
633 object_property_add_str(obj, "via", core99_get_via_config,
634 core99_set_via_config, NULL);
635 object_property_set_description(obj, "via",
636 "Set VIA configuration. "
637 "Valid values are cuda, pmu and pmu-adb",
638 NULL);
639
640 return;
641 }
642
643 static const TypeInfo core99_machine_info = {
644 .name = MACHINE_TYPE_NAME("mac99"),
645 .parent = TYPE_MACHINE,
646 .class_init = core99_machine_class_init,
647 .instance_init = core99_instance_init,
648 .instance_size = sizeof(Core99MachineState),
649 .interfaces = (InterfaceInfo[]) {
650 { TYPE_FW_PATH_PROVIDER },
651 { }
652 },
653 };
654
655 static void mac_machine_register_types(void)
656 {
657 type_register_static(&core99_machine_info);
658 }
659
660 type_init(mac_machine_register_types)
AR7 emulation for QEMU