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Merge tag 'v7.1.0-rc3'
[qemu/ar7.git] / softmmu / memory.c
blob7a1aad44966d89d00ceb3b91ee242c9e818fb596
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
20 #include "exec/memory.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "sysemu/sysemu.h" /* trace_unassigned */
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/runstate.h"
34 #include "sysemu/tcg.h"
35 #include "qemu/accel.h"
36 #include "hw/boards.h"
37 #include "migration/vmstate.h"
38
39 //#define DEBUG_UNASSIGNED
40
41 static unsigned memory_region_transaction_depth;
42 static bool memory_region_update_pending;
43 static bool ioeventfd_update_pending;
44 unsigned int global_dirty_tracking;
45
46 static QTAILQ_HEAD(, MemoryListener) memory_listeners
47 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
48
49 static QTAILQ_HEAD(, AddressSpace) address_spaces
50 = QTAILQ_HEAD_INITIALIZER(address_spaces);
51
52 static GHashTable *flat_views;
53
54 typedef struct AddrRange AddrRange;
55
56 /*
57 * Note that signed integers are needed for negative offsetting in aliases
58 * (large MemoryRegion::alias_offset).
59 */
60 struct AddrRange {
61 Int128 start;
62 Int128 size;
63 };
64
65 static AddrRange addrrange_make(Int128 start, Int128 size)
66 {
67 return (AddrRange) { start, size };
68 }
69
70 static bool addrrange_equal(AddrRange r1, AddrRange r2)
71 {
72 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
73 }
74
75 static Int128 addrrange_end(AddrRange r)
76 {
77 return int128_add(r.start, r.size);
78 }
79
80 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
81 {
82 int128_addto(&range.start, delta);
83 return range;
84 }
85
86 static bool addrrange_contains(AddrRange range, Int128 addr)
87 {
88 return int128_ge(addr, range.start)
89 && int128_lt(addr, addrrange_end(range));
90 }
91
92 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
93 {
94 return addrrange_contains(r1, r2.start)
95 || addrrange_contains(r2, r1.start);
96 }
97
98 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
99 {
100 Int128 start = int128_max(r1.start, r2.start);
101 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
102 return addrrange_make(start, int128_sub(end, start));
103 }
104
105 enum ListenerDirection { Forward, Reverse };
106
107 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
138 if (_listener->_callback) { \
139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 case Reverse: \
144 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
145 if (_listener->_callback) { \
146 _listener->_callback(_listener, _section, ##_args); \
147 } \
148 } \
149 break; \
150 default: \
151 abort(); \
152 } \
153 } while (0)
154
155 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
156 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
157 do { \
158 MemoryRegionSection mrs = section_from_flat_range(fr, \
159 address_space_to_flatview(as)); \
160 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
161 } while(0)
162
163 struct CoalescedMemoryRange {
164 AddrRange addr;
165 QTAILQ_ENTRY(CoalescedMemoryRange) link;
166 };
167
168 struct MemoryRegionIoeventfd {
169 AddrRange addr;
170 bool match_data;
171 uint64_t data;
172 EventNotifier *e;
173 };
174
175 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
176 MemoryRegionIoeventfd *b)
177 {
178 if (int128_lt(a->addr.start, b->addr.start)) {
179 return true;
180 } else if (int128_gt(a->addr.start, b->addr.start)) {
181 return false;
182 } else if (int128_lt(a->addr.size, b->addr.size)) {
183 return true;
184 } else if (int128_gt(a->addr.size, b->addr.size)) {
185 return false;
186 } else if (a->match_data < b->match_data) {
187 return true;
188 } else if (a->match_data > b->match_data) {
189 return false;
190 } else if (a->match_data) {
191 if (a->data < b->data) {
192 return true;
193 } else if (a->data > b->data) {
194 return false;
195 }
196 }
197 if (a->e < b->e) {
198 return true;
199 } else if (a->e > b->e) {
200 return false;
201 }
202 return false;
203 }
204
205 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
206 MemoryRegionIoeventfd *b)
207 {
208 if (int128_eq(a->addr.start, b->addr.start) &&
209 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
210 (int128_eq(a->addr.size, b->addr.size) &&
211 (a->match_data == b->match_data) &&
212 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
213 (a->e == b->e))))
214 return true;
215
216 return false;
217 }
218
219 /* Range of memory in the global map. Addresses are absolute. */
220 struct FlatRange {
221 MemoryRegion *mr;
222 hwaddr offset_in_region;
223 AddrRange addr;
224 uint8_t dirty_log_mask;
225 bool romd_mode;
226 bool readonly;
227 bool nonvolatile;
228 };
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static inline MemoryRegionSection
234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
238 .fv = fv,
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
243 .nonvolatile = fr->nonvolatile,
244 };
245 }
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly
254 && a->nonvolatile == b->nonvolatile;
255 }
256
257 static FlatView *flatview_new(MemoryRegion *mr_root)
258 {
259 FlatView *view;
260
261 view = g_new0(FlatView, 1);
262 view->ref = 1;
263 view->root = mr_root;
264 memory_region_ref(mr_root);
265 trace_flatview_new(view, mr_root);
266
267 return view;
268 }
269
270 /* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274 {
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
277 view->ranges = g_realloc(view->ranges,
278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
283 memory_region_ref(range->mr);
284 ++view->nr;
285 }
286
287 static void flatview_destroy(FlatView *view)
288 {
289 int i;
290
291 trace_flatview_destroy(view, view->root);
292 if (view->dispatch) {
293 address_space_dispatch_free(view->dispatch);
294 }
295 for (i = 0; i < view->nr; i++) {
296 memory_region_unref(view->ranges[i].mr);
297 }
298 g_free(view->ranges);
299 memory_region_unref(view->root);
300 g_free(view);
301 }
302
303 static bool flatview_ref(FlatView *view)
304 {
305 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
306 }
307
308 void flatview_unref(FlatView *view)
309 {
310 if (qatomic_fetch_dec(&view->ref) == 1) {
311 trace_flatview_destroy_rcu(view, view->root);
312 assert(view->root);
313 call_rcu(view, flatview_destroy, rcu);
314 }
315 }
316
317 static bool can_merge(FlatRange *r1, FlatRange *r2)
318 {
319 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
320 && r1->mr == r2->mr
321 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
322 r1->addr.size),
323 int128_make64(r2->offset_in_region))
324 && r1->dirty_log_mask == r2->dirty_log_mask
325 && r1->romd_mode == r2->romd_mode
326 && r1->readonly == r2->readonly
327 && r1->nonvolatile == r2->nonvolatile;
328 }
329
330 /* Attempt to simplify a view by merging adjacent ranges */
331 static void flatview_simplify(FlatView *view)
332 {
333 unsigned i, j, k;
334
335 i = 0;
336 while (i < view->nr) {
337 j = i + 1;
338 while (j < view->nr
339 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
340 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
341 ++j;
342 }
343 ++i;
344 for (k = i; k < j; k++) {
345 memory_region_unref(view->ranges[k].mr);
346 }
347 memmove(&view->ranges[i], &view->ranges[j],
348 (view->nr - j) * sizeof(view->ranges[j]));
349 view->nr -= j - i;
350 }
351 }
352
353 static bool memory_region_big_endian(MemoryRegion *mr)
354 {
355 #if TARGET_BIG_ENDIAN
356 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
357 #else
358 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
359 #endif
360 }
361
362 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
363 {
364 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
365 switch (op & MO_SIZE) {
366 case MO_8:
367 break;
368 case MO_16:
369 *data = bswap16(*data);
370 break;
371 case MO_32:
372 *data = bswap32(*data);
373 break;
374 case MO_64:
375 *data = bswap64(*data);
376 break;
377 default:
378 g_assert_not_reached();
379 }
380 }
381 }
382
383 static inline void memory_region_shift_read_access(uint64_t *value,
384 signed shift,
385 uint64_t mask,
386 uint64_t tmp)
387 {
388 if (shift >= 0) {
389 *value |= (tmp & mask) << shift;
390 } else {
391 *value |= (tmp & mask) >> -shift;
392 }
393 }
394
395 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
396 signed shift,
397 uint64_t mask)
398 {
399 uint64_t tmp;
400
401 if (shift >= 0) {
402 tmp = (*value >> shift) & mask;
403 } else {
404 tmp = (*value << -shift) & mask;
405 }
406
407 return tmp;
408 }
409
410 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
411 {
412 MemoryRegion *root;
413 hwaddr abs_addr = offset;
414
415 abs_addr += mr->addr;
416 for (root = mr; root->container; ) {
417 root = root->container;
418 abs_addr += root->addr;
419 }
420
421 return abs_addr;
422 }
423
424 static int get_cpu_index(void)
425 {
426 if (current_cpu) {
427 return current_cpu->cpu_index;
428 }
429 return -1;
430 }
431
432 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
433 hwaddr addr,
434 uint64_t *value,
435 unsigned size,
436 signed shift,
437 uint64_t mask,
438 MemTxAttrs attrs)
439 {
440 uint64_t tmp;
441
442 tmp = mr->ops->read(mr->opaque, addr, size);
443 if (mr->subpage) {
444 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
445 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
446 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
447 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
448 memory_region_name(mr));
449 }
450 memory_region_shift_read_access(value, shift, mask, tmp);
451 return MEMTX_OK;
452 }
453
454 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
455 hwaddr addr,
456 uint64_t *value,
457 unsigned size,
458 signed shift,
459 uint64_t mask,
460 MemTxAttrs attrs)
461 {
462 uint64_t tmp = 0;
463 MemTxResult r;
464
465 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
466 if (mr->subpage) {
467 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
468 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
469 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
470 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
471 memory_region_name(mr));
472 }
473 memory_region_shift_read_access(value, shift, mask, tmp);
474 return r;
475 }
476
477 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
478 hwaddr addr,
479 uint64_t *value,
480 unsigned size,
481 signed shift,
482 uint64_t mask,
483 MemTxAttrs attrs)
484 {
485 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
486
487 if (mr->subpage) {
488 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
489 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
490 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
491 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
492 memory_region_name(mr));
493 }
494 mr->ops->write(mr->opaque, addr, tmp, size);
495 return MEMTX_OK;
496 }
497
498 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
499 hwaddr addr,
500 uint64_t *value,
501 unsigned size,
502 signed shift,
503 uint64_t mask,
504 MemTxAttrs attrs)
505 {
506 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
507
508 if (mr->subpage) {
509 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
510 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
511 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
512 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
513 memory_region_name(mr));
514 }
515 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
516 }
517
518 static MemTxResult access_with_adjusted_size(hwaddr addr,
519 uint64_t *value,
520 unsigned size,
521 unsigned access_size_min,
522 unsigned access_size_max,
523 MemTxResult (*access_fn)
524 (MemoryRegion *mr,
525 hwaddr addr,
526 uint64_t *value,
527 unsigned size,
528 signed shift,
529 uint64_t mask,
530 MemTxAttrs attrs),
531 MemoryRegion *mr,
532 MemTxAttrs attrs)
533 {
534 uint64_t access_mask;
535 unsigned access_size;
536 unsigned i;
537 MemTxResult r = MEMTX_OK;
538
539 if (!access_size_min) {
540 access_size_min = 1;
541 }
542 if (!access_size_max) {
543 access_size_max = 4;
544 }
545
546 /* FIXME: support unaligned access? */
547 access_size = MAX(MIN(size, access_size_max), access_size_min);
548 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
549 if (memory_region_big_endian(mr)) {
550 for (i = 0; i < size; i += access_size) {
551 r |= access_fn(mr, addr + i, value, access_size,
552 (size - access_size - i) * 8, access_mask, attrs);
553 }
554 } else {
555 for (i = 0; i < size; i += access_size) {
556 r |= access_fn(mr, addr + i, value, access_size, i * 8,
557 access_mask, attrs);
558 }
559 }
560 return r;
561 }
562
563 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
564 {
565 AddressSpace *as;
566
567 while (mr->container) {
568 mr = mr->container;
569 }
570 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
571 if (mr == as->root) {
572 return as;
573 }
574 }
575 return NULL;
576 }
577
578 /* Render a memory region into the global view. Ranges in @view obscure
579 * ranges in @mr.
580 */
581 static void render_memory_region(FlatView *view,
582 MemoryRegion *mr,
583 Int128 base,
584 AddrRange clip,
585 bool readonly,
586 bool nonvolatile)
587 {
588 MemoryRegion *subregion;
589 unsigned i;
590 hwaddr offset_in_region;
591 Int128 remain;
592 Int128 now;
593 FlatRange fr;
594 AddrRange tmp;
595
596 if (!mr->enabled) {
597 return;
598 }
599
600 int128_addto(&base, int128_make64(mr->addr));
601 readonly |= mr->readonly;
602 nonvolatile |= mr->nonvolatile;
603
604 tmp = addrrange_make(base, mr->size);
605
606 if (!addrrange_intersects(tmp, clip)) {
607 return;
608 }
609
610 clip = addrrange_intersection(tmp, clip);
611
612 if (mr->alias) {
613 int128_subfrom(&base, int128_make64(mr->alias->addr));
614 int128_subfrom(&base, int128_make64(mr->alias_offset));
615 render_memory_region(view, mr->alias, base, clip,
616 readonly, nonvolatile);
617 return;
618 }
619
620 /* Render subregions in priority order. */
621 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
622 render_memory_region(view, subregion, base, clip,
623 readonly, nonvolatile);
624 }
625
626 if (!mr->terminates) {
627 return;
628 }
629
630 offset_in_region = int128_get64(int128_sub(clip.start, base));
631 base = clip.start;
632 remain = clip.size;
633
634 fr.mr = mr;
635 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
636 fr.romd_mode = mr->romd_mode;
637 fr.readonly = readonly;
638 fr.nonvolatile = nonvolatile;
639
640 /* Render the region itself into any gaps left by the current view. */
641 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
642 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
643 continue;
644 }
645 if (int128_lt(base, view->ranges[i].addr.start)) {
646 now = int128_min(remain,
647 int128_sub(view->ranges[i].addr.start, base));
648 fr.offset_in_region = offset_in_region;
649 fr.addr = addrrange_make(base, now);
650 flatview_insert(view, i, &fr);
651 ++i;
652 int128_addto(&base, now);
653 offset_in_region += int128_get64(now);
654 int128_subfrom(&remain, now);
655 }
656 now = int128_sub(int128_min(int128_add(base, remain),
657 addrrange_end(view->ranges[i].addr)),
658 base);
659 int128_addto(&base, now);
660 offset_in_region += int128_get64(now);
661 int128_subfrom(&remain, now);
662 }
663 if (int128_nz(remain)) {
664 fr.offset_in_region = offset_in_region;
665 fr.addr = addrrange_make(base, remain);
666 flatview_insert(view, i, &fr);
667 }
668 }
669
670 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
671 {
672 FlatRange *fr;
673
674 assert(fv);
675 assert(cb);
676
677 FOR_EACH_FLAT_RANGE(fr, fv) {
678 if (cb(fr->addr.start, fr->addr.size, fr->mr,
679 fr->offset_in_region, opaque)) {
680 break;
681 }
682 }
683 }
684
685 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
686 {
687 while (mr->enabled) {
688 if (mr->alias) {
689 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
690 /* The alias is included in its entirety. Use it as
691 * the "real" root, so that we can share more FlatViews.
692 */
693 mr = mr->alias;
694 continue;
695 }
696 } else if (!mr->terminates) {
697 unsigned int found = 0;
698 MemoryRegion *child, *next = NULL;
699 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
700 if (child->enabled) {
701 if (++found > 1) {
702 next = NULL;
703 break;
704 }
705 if (!child->addr && int128_ge(mr->size, child->size)) {
706 /* A child is included in its entirety. If it's the only
707 * enabled one, use it in the hope of finding an alias down the
708 * way. This will also let us share FlatViews.
709 */
710 next = child;
711 }
712 }
713 }
714 if (found == 0) {
715 return NULL;
716 }
717 if (next) {
718 mr = next;
719 continue;
720 }
721 }
722
723 return mr;
724 }
725
726 return NULL;
727 }
728
729 /* Render a memory topology into a list of disjoint absolute ranges. */
730 static FlatView *generate_memory_topology(MemoryRegion *mr)
731 {
732 int i;
733 FlatView *view;
734
735 view = flatview_new(mr);
736
737 if (mr) {
738 render_memory_region(view, mr, int128_zero(),
739 addrrange_make(int128_zero(), int128_2_64()),
740 false, false);
741 }
742 flatview_simplify(view);
743
744 view->dispatch = address_space_dispatch_new(view);
745 for (i = 0; i < view->nr; i++) {
746 MemoryRegionSection mrs =
747 section_from_flat_range(&view->ranges[i], view);
748 flatview_add_to_dispatch(view, &mrs);
749 }
750 address_space_dispatch_compact(view->dispatch);
751 g_hash_table_replace(flat_views, mr, view);
752
753 return view;
754 }
755
756 static void address_space_add_del_ioeventfds(AddressSpace *as,
757 MemoryRegionIoeventfd *fds_new,
758 unsigned fds_new_nb,
759 MemoryRegionIoeventfd *fds_old,
760 unsigned fds_old_nb)
761 {
762 unsigned iold, inew;
763 MemoryRegionIoeventfd *fd;
764 MemoryRegionSection section;
765
766 /* Generate a symmetric difference of the old and new fd sets, adding
767 * and deleting as necessary.
768 */
769
770 iold = inew = 0;
771 while (iold < fds_old_nb || inew < fds_new_nb) {
772 if (iold < fds_old_nb
773 && (inew == fds_new_nb
774 || memory_region_ioeventfd_before(&fds_old[iold],
775 &fds_new[inew]))) {
776 fd = &fds_old[iold];
777 section = (MemoryRegionSection) {
778 .fv = address_space_to_flatview(as),
779 .offset_within_address_space = int128_get64(fd->addr.start),
780 .size = fd->addr.size,
781 };
782 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
783 fd->match_data, fd->data, fd->e);
784 ++iold;
785 } else if (inew < fds_new_nb
786 && (iold == fds_old_nb
787 || memory_region_ioeventfd_before(&fds_new[inew],
788 &fds_old[iold]))) {
789 fd = &fds_new[inew];
790 section = (MemoryRegionSection) {
791 .fv = address_space_to_flatview(as),
792 .offset_within_address_space = int128_get64(fd->addr.start),
793 .size = fd->addr.size,
794 };
795 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
796 fd->match_data, fd->data, fd->e);
797 ++inew;
798 } else {
799 ++iold;
800 ++inew;
801 }
802 }
803 }
804
805 FlatView *address_space_get_flatview(AddressSpace *as)
806 {
807 FlatView *view;
808
809 RCU_READ_LOCK_GUARD();
810 do {
811 view = address_space_to_flatview(as);
812 /* If somebody has replaced as->current_map concurrently,
813 * flatview_ref returns false.
814 */
815 } while (!flatview_ref(view));
816 return view;
817 }
818
819 static void address_space_update_ioeventfds(AddressSpace *as)
820 {
821 FlatView *view;
822 FlatRange *fr;
823 unsigned ioeventfd_nb = 0;
824 unsigned ioeventfd_max;
825 MemoryRegionIoeventfd *ioeventfds;
826 AddrRange tmp;
827 unsigned i;
828
829 /*
830 * It is likely that the number of ioeventfds hasn't changed much, so use
831 * the previous size as the starting value, with some headroom to avoid
832 * gratuitous reallocations.
833 */
834 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
835 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
836
837 view = address_space_get_flatview(as);
838 FOR_EACH_FLAT_RANGE(fr, view) {
839 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
840 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
841 int128_sub(fr->addr.start,
842 int128_make64(fr->offset_in_region)));
843 if (addrrange_intersects(fr->addr, tmp)) {
844 ++ioeventfd_nb;
845 if (ioeventfd_nb > ioeventfd_max) {
846 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
847 ioeventfds = g_realloc(ioeventfds,
848 ioeventfd_max * sizeof(*ioeventfds));
849 }
850 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
851 ioeventfds[ioeventfd_nb-1].addr = tmp;
852 }
853 }
854 }
855
856 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
857 as->ioeventfds, as->ioeventfd_nb);
858
859 g_free(as->ioeventfds);
860 as->ioeventfds = ioeventfds;
861 as->ioeventfd_nb = ioeventfd_nb;
862 flatview_unref(view);
863 }
864
865 /*
866 * Notify the memory listeners about the coalesced IO change events of
867 * range `cmr'. Only the part that has intersection of the specified
868 * FlatRange will be sent.
869 */
870 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
871 CoalescedMemoryRange *cmr, bool add)
872 {
873 AddrRange tmp;
874
875 tmp = addrrange_shift(cmr->addr,
876 int128_sub(fr->addr.start,
877 int128_make64(fr->offset_in_region)));
878 if (!addrrange_intersects(tmp, fr->addr)) {
879 return;
880 }
881 tmp = addrrange_intersection(tmp, fr->addr);
882
883 if (add) {
884 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
885 int128_get64(tmp.start),
886 int128_get64(tmp.size));
887 } else {
888 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
889 int128_get64(tmp.start),
890 int128_get64(tmp.size));
891 }
892 }
893
894 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
895 {
896 CoalescedMemoryRange *cmr;
897
898 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
899 flat_range_coalesced_io_notify(fr, as, cmr, false);
900 }
901 }
902
903 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
904 {
905 MemoryRegion *mr = fr->mr;
906 CoalescedMemoryRange *cmr;
907
908 if (QTAILQ_EMPTY(&mr->coalesced)) {
909 return;
910 }
911
912 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
913 flat_range_coalesced_io_notify(fr, as, cmr, true);
914 }
915 }
916
917 static void address_space_update_topology_pass(AddressSpace *as,
918 const FlatView *old_view,
919 const FlatView *new_view,
920 bool adding)
921 {
922 unsigned iold, inew;
923 FlatRange *frold, *frnew;
924
925 /* Generate a symmetric difference of the old and new memory maps.
926 * Kill ranges in the old map, and instantiate ranges in the new map.
927 */
928 iold = inew = 0;
929 while (iold < old_view->nr || inew < new_view->nr) {
930 if (iold < old_view->nr) {
931 frold = &old_view->ranges[iold];
932 } else {
933 frold = NULL;
934 }
935 if (inew < new_view->nr) {
936 frnew = &new_view->ranges[inew];
937 } else {
938 frnew = NULL;
939 }
940
941 if (frold
942 && (!frnew
943 || int128_lt(frold->addr.start, frnew->addr.start)
944 || (int128_eq(frold->addr.start, frnew->addr.start)
945 && !flatrange_equal(frold, frnew)))) {
946 /* In old but not in new, or in both but attributes changed. */
947
948 if (!adding) {
949 flat_range_coalesced_io_del(frold, as);
950 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
951 }
952
953 ++iold;
954 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
955 /* In both and unchanged (except logging may have changed) */
956
957 if (adding) {
958 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
959 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
960 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
961 frold->dirty_log_mask,
962 frnew->dirty_log_mask);
963 }
964 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
965 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
966 frold->dirty_log_mask,
967 frnew->dirty_log_mask);
968 }
969 }
970
971 ++iold;
972 ++inew;
973 } else {
974 /* In new */
975
976 if (adding) {
977 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
978 flat_range_coalesced_io_add(frnew, as);
979 }
980
981 ++inew;
982 }
983 }
984 }
985
986 static void flatviews_init(void)
987 {
988 static FlatView *empty_view;
989
990 if (flat_views) {
991 return;
992 }
993
994 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
995 (GDestroyNotify) flatview_unref);
996 if (!empty_view) {
997 empty_view = generate_memory_topology(NULL);
998 /* We keep it alive forever in the global variable. */
999 flatview_ref(empty_view);
1000 } else {
1001 g_hash_table_replace(flat_views, NULL, empty_view);
1002 flatview_ref(empty_view);
1003 }
1004 }
1005
1006 static void flatviews_reset(void)
1007 {
1008 AddressSpace *as;
1009
1010 if (flat_views) {
1011 g_hash_table_unref(flat_views);
1012 flat_views = NULL;
1013 }
1014 flatviews_init();
1015
1016 /* Render unique FVs */
1017 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1018 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1019
1020 if (g_hash_table_lookup(flat_views, physmr)) {
1021 continue;
1022 }
1023
1024 generate_memory_topology(physmr);
1025 }
1026 }
1027
1028 static void address_space_set_flatview(AddressSpace *as)
1029 {
1030 FlatView *old_view = address_space_to_flatview(as);
1031 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1032 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1033
1034 assert(new_view);
1035
1036 if (old_view == new_view) {
1037 return;
1038 }
1039
1040 if (old_view) {
1041 flatview_ref(old_view);
1042 }
1043
1044 flatview_ref(new_view);
1045
1046 if (!QTAILQ_EMPTY(&as->listeners)) {
1047 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1048
1049 if (!old_view2) {
1050 old_view2 = &tmpview;
1051 }
1052 address_space_update_topology_pass(as, old_view2, new_view, false);
1053 address_space_update_topology_pass(as, old_view2, new_view, true);
1054 }
1055
1056 /* Writes are protected by the BQL. */
1057 qatomic_rcu_set(&as->current_map, new_view);
1058 if (old_view) {
1059 flatview_unref(old_view);
1060 }
1061
1062 /* Note that all the old MemoryRegions are still alive up to this
1063 * point. This relieves most MemoryListeners from the need to
1064 * ref/unref the MemoryRegions they get---unless they use them
1065 * outside the iothread mutex, in which case precise reference
1066 * counting is necessary.
1067 */
1068 if (old_view) {
1069 flatview_unref(old_view);
1070 }
1071 }
1072
1073 static void address_space_update_topology(AddressSpace *as)
1074 {
1075 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1076
1077 flatviews_init();
1078 if (!g_hash_table_lookup(flat_views, physmr)) {
1079 generate_memory_topology(physmr);
1080 }
1081 address_space_set_flatview(as);
1082 }
1083
1084 void memory_region_transaction_begin(void)
1085 {
1086 qemu_flush_coalesced_mmio_buffer();
1087 ++memory_region_transaction_depth;
1088 }
1089
1090 void memory_region_transaction_commit(void)
1091 {
1092 AddressSpace *as;
1093
1094 assert(memory_region_transaction_depth);
1095 assert(qemu_mutex_iothread_locked());
1096
1097 --memory_region_transaction_depth;
1098 if (!memory_region_transaction_depth) {
1099 if (memory_region_update_pending) {
1100 flatviews_reset();
1101
1102 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1103
1104 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1105 address_space_set_flatview(as);
1106 address_space_update_ioeventfds(as);
1107 }
1108 memory_region_update_pending = false;
1109 ioeventfd_update_pending = false;
1110 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1111 } else if (ioeventfd_update_pending) {
1112 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1113 address_space_update_ioeventfds(as);
1114 }
1115 ioeventfd_update_pending = false;
1116 }
1117 }
1118 }
1119
1120 static void memory_region_destructor_none(MemoryRegion *mr)
1121 {
1122 }
1123
1124 static void memory_region_destructor_ram(MemoryRegion *mr)
1125 {
1126 qemu_ram_free(mr->ram_block);
1127 }
1128
1129 static bool memory_region_need_escape(char c)
1130 {
1131 return c == '/' || c == '[' || c == '\\' || c == ']';
1132 }
1133
1134 static char *memory_region_escape_name(const char *name)
1135 {
1136 const char *p;
1137 char *escaped, *q;
1138 uint8_t c;
1139 size_t bytes = 0;
1140
1141 for (p = name; *p; p++) {
1142 bytes += memory_region_need_escape(*p) ? 4 : 1;
1143 }
1144 if (bytes == p - name) {
1145 return g_memdup(name, bytes + 1);
1146 }
1147
1148 escaped = g_malloc(bytes + 1);
1149 for (p = name, q = escaped; *p; p++) {
1150 c = *p;
1151 if (unlikely(memory_region_need_escape(c))) {
1152 *q++ = '\\';
1153 *q++ = 'x';
1154 *q++ = "0123456789abcdef"[c >> 4];
1155 c = "0123456789abcdef"[c & 15];
1156 }
1157 *q++ = c;
1158 }
1159 *q = 0;
1160 return escaped;
1161 }
1162
1163 static void memory_region_do_init(MemoryRegion *mr,
1164 Object *owner,
1165 const char *name,
1166 uint64_t size)
1167 {
1168 mr->size = int128_make64(size);
1169 if (size == UINT64_MAX) {
1170 mr->size = int128_2_64();
1171 }
1172 mr->name = g_strdup(name);
1173 mr->owner = owner;
1174 mr->ram_block = NULL;
1175
1176 if (name) {
1177 char *escaped_name = memory_region_escape_name(name);
1178 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1179
1180 if (!owner) {
1181 owner = container_get(qdev_get_machine(), "/unattached");
1182 }
1183
1184 object_property_add_child(owner, name_array, OBJECT(mr));
1185 object_unref(OBJECT(mr));
1186 g_free(name_array);
1187 g_free(escaped_name);
1188 }
1189 }
1190
1191 void memory_region_init(MemoryRegion *mr,
1192 Object *owner,
1193 const char *name,
1194 uint64_t size)
1195 {
1196 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1197 memory_region_do_init(mr, owner, name, size);
1198 }
1199
1200 static void memory_region_get_container(Object *obj, Visitor *v,
1201 const char *name, void *opaque,
1202 Error **errp)
1203 {
1204 MemoryRegion *mr = MEMORY_REGION(obj);
1205 char *path = (char *)"";
1206
1207 if (mr->container) {
1208 path = object_get_canonical_path(OBJECT(mr->container));
1209 }
1210 visit_type_str(v, name, &path, errp);
1211 if (mr->container) {
1212 g_free(path);
1213 }
1214 }
1215
1216 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1217 const char *part)
1218 {
1219 MemoryRegion *mr = MEMORY_REGION(obj);
1220
1221 return OBJECT(mr->container);
1222 }
1223
1224 static void memory_region_get_priority(Object *obj, Visitor *v,
1225 const char *name, void *opaque,
1226 Error **errp)
1227 {
1228 MemoryRegion *mr = MEMORY_REGION(obj);
1229 int32_t value = mr->priority;
1230
1231 visit_type_int32(v, name, &value, errp);
1232 }
1233
1234 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1235 void *opaque, Error **errp)
1236 {
1237 MemoryRegion *mr = MEMORY_REGION(obj);
1238 uint64_t value = memory_region_size(mr);
1239
1240 visit_type_uint64(v, name, &value, errp);
1241 }
1242
1243 static void memory_region_initfn(Object *obj)
1244 {
1245 MemoryRegion *mr = MEMORY_REGION(obj);
1246 ObjectProperty *op;
1247
1248 mr->ops = &unassigned_mem_ops;
1249 mr->enabled = true;
1250 mr->romd_mode = true;
1251 mr->destructor = memory_region_destructor_none;
1252 QTAILQ_INIT(&mr->subregions);
1253 QTAILQ_INIT(&mr->coalesced);
1254
1255 op = object_property_add(OBJECT(mr), "container",
1256 "link<" TYPE_MEMORY_REGION ">",
1257 memory_region_get_container,
1258 NULL, /* memory_region_set_container */
1259 NULL, NULL);
1260 op->resolve = memory_region_resolve_container;
1261
1262 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1263 &mr->addr, OBJ_PROP_FLAG_READ);
1264 object_property_add(OBJECT(mr), "priority", "uint32",
1265 memory_region_get_priority,
1266 NULL, /* memory_region_set_priority */
1267 NULL, NULL);
1268 object_property_add(OBJECT(mr), "size", "uint64",
1269 memory_region_get_size,
1270 NULL, /* memory_region_set_size, */
1271 NULL, NULL);
1272 }
1273
1274 static int qemu_target_backtrace(target_ulong *array, size_t size)
1275 {
1276 int n = 0;
1277 if (size >= 2) {
1278 #if defined(TARGET_ARM)
1279 CPUArchState *env = current_cpu->env_ptr;
1280 array[0] = env->regs[15];
1281 array[1] = env->regs[14];
1282 #elif defined(TARGET_MIPS)
1283 CPUArchState *env = current_cpu->env_ptr;
1284 array[0] = env->active_tc.PC;
1285 array[1] = env->active_tc.gpr[31];
1286 #else
1287 array[0] = 0;
1288 array[1] = 0;
1289 #endif
1290 n = 2;
1291 }
1292 return n;
1293 }
1294
1295 #include "disas/disas.h"
1296 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1297 {
1298 char *p = buffer;
1299 if (current_cpu) {
1300 target_ulong caller[2];
1301 const char *symbol;
1302 qemu_target_backtrace(caller, 2);
1303 symbol = lookup_symbol(caller[0]);
1304 p += sprintf(p, "[%s]", symbol);
1305 symbol = lookup_symbol(caller[1]);
1306 p += sprintf(p, "[%s]", symbol);
1307 } else {
1308 p += sprintf(p, "[cpu not running]");
1309 }
1310 assert((p - buffer) < length);
1311 return buffer;
1312 }
1313
1314 static void iommu_memory_region_initfn(Object *obj)
1315 {
1316 MemoryRegion *mr = MEMORY_REGION(obj);
1317
1318 mr->is_iommu = true;
1319 }
1320
1321 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1322 unsigned size)
1323 {
1324 if (trace_unassigned) {
1325 char buffer[256];
1326 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1327 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1328 }
1329 //~ vm_stop(0);
1330 return 0;
1331 }
1332
1333 static void unassigned_mem_write(void *opaque, hwaddr addr,
1334 uint64_t val, unsigned size)
1335 {
1336 if (trace_unassigned) {
1337 char buffer[256];
1338 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1339 " = 0x%" PRIx64 " %s\n",
1340 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1341 }
1342 }
1343
1344 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1345 unsigned size, bool is_write,
1346 MemTxAttrs attrs)
1347 {
1348 return false;
1349 }
1350
1351 const MemoryRegionOps unassigned_mem_ops = {
1352 .valid.accepts = unassigned_mem_accepts,
1353 .endianness = DEVICE_NATIVE_ENDIAN,
1354 };
1355
1356 static uint64_t memory_region_ram_device_read(void *opaque,
1357 hwaddr addr, unsigned size)
1358 {
1359 MemoryRegion *mr = opaque;
1360 uint64_t data = (uint64_t)~0;
1361
1362 switch (size) {
1363 case 1:
1364 data = *(uint8_t *)(mr->ram_block->host + addr);
1365 break;
1366 case 2:
1367 data = *(uint16_t *)(mr->ram_block->host + addr);
1368 break;
1369 case 4:
1370 data = *(uint32_t *)(mr->ram_block->host + addr);
1371 break;
1372 case 8:
1373 data = *(uint64_t *)(mr->ram_block->host + addr);
1374 break;
1375 }
1376
1377 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1378
1379 return data;
1380 }
1381
1382 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1383 uint64_t data, unsigned size)
1384 {
1385 MemoryRegion *mr = opaque;
1386
1387 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1388
1389 switch (size) {
1390 case 1:
1391 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1392 break;
1393 case 2:
1394 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1395 break;
1396 case 4:
1397 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1398 break;
1399 case 8:
1400 *(uint64_t *)(mr->ram_block->host + addr) = data;
1401 break;
1402 }
1403 }
1404
1405 static const MemoryRegionOps ram_device_mem_ops = {
1406 .read = memory_region_ram_device_read,
1407 .write = memory_region_ram_device_write,
1408 .endianness = DEVICE_HOST_ENDIAN,
1409 .valid = {
1410 .min_access_size = 1,
1411 .max_access_size = 8,
1412 .unaligned = true,
1413 },
1414 .impl = {
1415 .min_access_size = 1,
1416 .max_access_size = 8,
1417 .unaligned = true,
1418 },
1419 };
1420
1421 bool memory_region_access_valid(MemoryRegion *mr,
1422 hwaddr addr,
1423 unsigned size,
1424 bool is_write,
1425 MemTxAttrs attrs)
1426 {
1427 if (mr->ops->valid.accepts
1428 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1429 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1430 ", size %u, region '%s', reason: rejected\n",
1431 is_write ? "write" : "read",
1432 addr, size, memory_region_name(mr));
1433 return false;
1434 }
1435
1436 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1437 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1438 ", size %u, region '%s', reason: unaligned\n",
1439 is_write ? "write" : "read",
1440 addr, size, memory_region_name(mr));
1441 return false;
1442 }
1443
1444 /* Treat zero as compatibility all valid */
1445 if (!mr->ops->valid.max_access_size) {
1446 return true;
1447 }
1448
1449 if (size > mr->ops->valid.max_access_size
1450 || size < mr->ops->valid.min_access_size) {
1451 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1452 ", size %u, region '%s', reason: invalid size "
1453 "(min:%u max:%u)\n",
1454 is_write ? "write" : "read",
1455 addr, size, memory_region_name(mr),
1456 mr->ops->valid.min_access_size,
1457 mr->ops->valid.max_access_size);
1458 return false;
1459 }
1460 return true;
1461 }
1462
1463 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1464 hwaddr addr,
1465 uint64_t *pval,
1466 unsigned size,
1467 MemTxAttrs attrs)
1468 {
1469 *pval = 0;
1470
1471 if (mr->ops->read) {
1472 return access_with_adjusted_size(addr, pval, size,
1473 mr->ops->impl.min_access_size,
1474 mr->ops->impl.max_access_size,
1475 memory_region_read_accessor,
1476 mr, attrs);
1477 } else {
1478 return access_with_adjusted_size(addr, pval, size,
1479 mr->ops->impl.min_access_size,
1480 mr->ops->impl.max_access_size,
1481 memory_region_read_with_attrs_accessor,
1482 mr, attrs);
1483 }
1484 }
1485
1486 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1487 hwaddr addr,
1488 uint64_t *pval,
1489 MemOp op,
1490 MemTxAttrs attrs)
1491 {
1492 unsigned size = memop_size(op);
1493 MemTxResult r;
1494
1495 if (mr->alias) {
1496 return memory_region_dispatch_read(mr->alias,
1497 mr->alias_offset + addr,
1498 pval, op, attrs);
1499 }
1500 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1501 *pval = unassigned_mem_read(mr, addr, size);
1502 return MEMTX_DECODE_ERROR;
1503 }
1504
1505 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1506 adjust_endianness(mr, pval, op);
1507 return r;
1508 }
1509
1510 /* Return true if an eventfd was signalled */
1511 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1512 hwaddr addr,
1513 uint64_t data,
1514 unsigned size,
1515 MemTxAttrs attrs)
1516 {
1517 MemoryRegionIoeventfd ioeventfd = {
1518 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1519 .data = data,
1520 };
1521 unsigned i;
1522
1523 for (i = 0; i < mr->ioeventfd_nb; i++) {
1524 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1525 ioeventfd.e = mr->ioeventfds[i].e;
1526
1527 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1528 event_notifier_set(ioeventfd.e);
1529 return true;
1530 }
1531 }
1532
1533 return false;
1534 }
1535
1536 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1537 hwaddr addr,
1538 uint64_t data,
1539 MemOp op,
1540 MemTxAttrs attrs)
1541 {
1542 unsigned size = memop_size(op);
1543
1544 if (mr->alias) {
1545 return memory_region_dispatch_write(mr->alias,
1546 mr->alias_offset + addr,
1547 data, op, attrs);
1548 }
1549 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1550 unassigned_mem_write(mr, addr, data, size);
1551 return MEMTX_DECODE_ERROR;
1552 }
1553
1554 adjust_endianness(mr, &data, op);
1555
1556 if ((!kvm_eventfds_enabled()) &&
1557 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1558 return MEMTX_OK;
1559 }
1560
1561 if (mr->ops->write) {
1562 return access_with_adjusted_size(addr, &data, size,
1563 mr->ops->impl.min_access_size,
1564 mr->ops->impl.max_access_size,
1565 memory_region_write_accessor, mr,
1566 attrs);
1567 } else {
1568 return
1569 access_with_adjusted_size(addr, &data, size,
1570 mr->ops->impl.min_access_size,
1571 mr->ops->impl.max_access_size,
1572 memory_region_write_with_attrs_accessor,
1573 mr, attrs);
1574 }
1575 }
1576
1577 void memory_region_init_io(MemoryRegion *mr,
1578 Object *owner,
1579 const MemoryRegionOps *ops,
1580 void *opaque,
1581 const char *name,
1582 uint64_t size)
1583 {
1584 memory_region_init(mr, owner, name, size);
1585 mr->ops = ops ? ops : &unassigned_mem_ops;
1586 mr->opaque = opaque;
1587 mr->terminates = true;
1588 }
1589
1590 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1591 Object *owner,
1592 const char *name,
1593 uint64_t size,
1594 Error **errp)
1595 {
1596 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1597 }
1598
1599 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1600 Object *owner,
1601 const char *name,
1602 uint64_t size,
1603 uint32_t ram_flags,
1604 Error **errp)
1605 {
1606 Error *err = NULL;
1607 memory_region_init(mr, owner, name, size);
1608 mr->ram = true;
1609 mr->terminates = true;
1610 mr->destructor = memory_region_destructor_ram;
1611 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1612 if (err) {
1613 mr->size = int128_zero();
1614 object_unparent(OBJECT(mr));
1615 error_propagate(errp, err);
1616 }
1617 }
1618
1619 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1620 Object *owner,
1621 const char *name,
1622 uint64_t size,
1623 uint64_t max_size,
1624 void (*resized)(const char*,
1625 uint64_t length,
1626 void *host),
1627 Error **errp)
1628 {
1629 Error *err = NULL;
1630 memory_region_init(mr, owner, name, size);
1631 mr->ram = true;
1632 mr->terminates = true;
1633 mr->destructor = memory_region_destructor_ram;
1634 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1635 mr, &err);
1636 if (err) {
1637 mr->size = int128_zero();
1638 object_unparent(OBJECT(mr));
1639 error_propagate(errp, err);
1640 }
1641 }
1642
1643 #ifdef CONFIG_POSIX
1644 void memory_region_init_ram_from_file(MemoryRegion *mr,
1645 Object *owner,
1646 const char *name,
1647 uint64_t size,
1648 uint64_t align,
1649 uint32_t ram_flags,
1650 const char *path,
1651 bool readonly,
1652 Error **errp)
1653 {
1654 Error *err = NULL;
1655 memory_region_init(mr, owner, name, size);
1656 mr->ram = true;
1657 mr->readonly = readonly;
1658 mr->terminates = true;
1659 mr->destructor = memory_region_destructor_ram;
1660 mr->align = align;
1661 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1662 readonly, &err);
1663 if (err) {
1664 mr->size = int128_zero();
1665 object_unparent(OBJECT(mr));
1666 error_propagate(errp, err);
1667 }
1668 }
1669
1670 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1671 Object *owner,
1672 const char *name,
1673 uint64_t size,
1674 uint32_t ram_flags,
1675 int fd,
1676 ram_addr_t offset,
1677 Error **errp)
1678 {
1679 Error *err = NULL;
1680 memory_region_init(mr, owner, name, size);
1681 mr->ram = true;
1682 mr->terminates = true;
1683 mr->destructor = memory_region_destructor_ram;
1684 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1685 false, &err);
1686 if (err) {
1687 mr->size = int128_zero();
1688 object_unparent(OBJECT(mr));
1689 error_propagate(errp, err);
1690 }
1691 }
1692 #endif
1693
1694 void memory_region_init_ram_ptr(MemoryRegion *mr,
1695 Object *owner,
1696 const char *name,
1697 uint64_t size,
1698 void *ptr)
1699 {
1700 memory_region_init(mr, owner, name, size);
1701 mr->ram = true;
1702 mr->terminates = true;
1703 mr->destructor = memory_region_destructor_ram;
1704
1705 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1706 assert(ptr != NULL);
1707 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1708 }
1709
1710 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1711 Object *owner,
1712 const char *name,
1713 uint64_t size,
1714 void *ptr)
1715 {
1716 memory_region_init(mr, owner, name, size);
1717 mr->ram = true;
1718 mr->terminates = true;
1719 mr->ram_device = true;
1720 mr->ops = &ram_device_mem_ops;
1721 mr->opaque = mr;
1722 mr->destructor = memory_region_destructor_ram;
1723
1724 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1725 assert(ptr != NULL);
1726 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1727 }
1728
1729 void memory_region_init_alias(MemoryRegion *mr,
1730 Object *owner,
1731 const char *name,
1732 MemoryRegion *orig,
1733 hwaddr offset,
1734 uint64_t size)
1735 {
1736 memory_region_init(mr, owner, name, size);
1737 mr->alias = orig;
1738 mr->alias_offset = offset;
1739 }
1740
1741 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1742 Object *owner,
1743 const char *name,
1744 uint64_t size,
1745 Error **errp)
1746 {
1747 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1748 mr->readonly = true;
1749 }
1750
1751 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1752 Object *owner,
1753 const MemoryRegionOps *ops,
1754 void *opaque,
1755 const char *name,
1756 uint64_t size,
1757 Error **errp)
1758 {
1759 Error *err = NULL;
1760 assert(ops);
1761 memory_region_init(mr, owner, name, size);
1762 mr->ops = ops;
1763 mr->opaque = opaque;
1764 mr->terminates = true;
1765 mr->rom_device = true;
1766 mr->destructor = memory_region_destructor_ram;
1767 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1768 if (err) {
1769 mr->size = int128_zero();
1770 object_unparent(OBJECT(mr));
1771 error_propagate(errp, err);
1772 }
1773 }
1774
1775 void memory_region_init_iommu(void *_iommu_mr,
1776 size_t instance_size,
1777 const char *mrtypename,
1778 Object *owner,
1779 const char *name,
1780 uint64_t size)
1781 {
1782 struct IOMMUMemoryRegion *iommu_mr;
1783 struct MemoryRegion *mr;
1784
1785 object_initialize(_iommu_mr, instance_size, mrtypename);
1786 mr = MEMORY_REGION(_iommu_mr);
1787 memory_region_do_init(mr, owner, name, size);
1788 iommu_mr = IOMMU_MEMORY_REGION(mr);
1789 mr->terminates = true; /* then re-forwards */
1790 QLIST_INIT(&iommu_mr->iommu_notify);
1791 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1792 }
1793
1794 static void memory_region_finalize(Object *obj)
1795 {
1796 MemoryRegion *mr = MEMORY_REGION(obj);
1797
1798 assert(!mr->container);
1799
1800 /* We know the region is not visible in any address space (it
1801 * does not have a container and cannot be a root either because
1802 * it has no references, so we can blindly clear mr->enabled.
1803 * memory_region_set_enabled instead could trigger a transaction
1804 * and cause an infinite loop.
1805 */
1806 mr->enabled = false;
1807 memory_region_transaction_begin();
1808 while (!QTAILQ_EMPTY(&mr->subregions)) {
1809 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1810 memory_region_del_subregion(mr, subregion);
1811 }
1812 memory_region_transaction_commit();
1813
1814 mr->destructor(mr);
1815 memory_region_clear_coalescing(mr);
1816 g_free((char *)mr->name);
1817 g_free(mr->ioeventfds);
1818 }
1819
1820 Object *memory_region_owner(MemoryRegion *mr)
1821 {
1822 Object *obj = OBJECT(mr);
1823 return obj->parent;
1824 }
1825
1826 void memory_region_ref(MemoryRegion *mr)
1827 {
1828 /* MMIO callbacks most likely will access data that belongs
1829 * to the owner, hence the need to ref/unref the owner whenever
1830 * the memory region is in use.
1831 *
1832 * The memory region is a child of its owner. As long as the
1833 * owner doesn't call unparent itself on the memory region,
1834 * ref-ing the owner will also keep the memory region alive.
1835 * Memory regions without an owner are supposed to never go away;
1836 * we do not ref/unref them because it slows down DMA sensibly.
1837 */
1838 if (mr && mr->owner) {
1839 object_ref(mr->owner);
1840 }
1841 }
1842
1843 void memory_region_unref(MemoryRegion *mr)
1844 {
1845 if (mr && mr->owner) {
1846 object_unref(mr->owner);
1847 }
1848 }
1849
1850 uint64_t memory_region_size(MemoryRegion *mr)
1851 {
1852 if (int128_eq(mr->size, int128_2_64())) {
1853 return UINT64_MAX;
1854 }
1855 return int128_get64(mr->size);
1856 }
1857
1858 const char *memory_region_name(const MemoryRegion *mr)
1859 {
1860 if (!mr->name) {
1861 ((MemoryRegion *)mr)->name =
1862 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1863 }
1864 return mr->name;
1865 }
1866
1867 bool memory_region_is_ram_device(MemoryRegion *mr)
1868 {
1869 return mr->ram_device;
1870 }
1871
1872 bool memory_region_is_protected(MemoryRegion *mr)
1873 {
1874 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1875 }
1876
1877 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1878 {
1879 uint8_t mask = mr->dirty_log_mask;
1880 RAMBlock *rb = mr->ram_block;
1881
1882 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1883 memory_region_is_iommu(mr))) {
1884 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1885 }
1886
1887 if (tcg_enabled() && rb) {
1888 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1889 mask |= (1 << DIRTY_MEMORY_CODE);
1890 }
1891 return mask;
1892 }
1893
1894 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1895 {
1896 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1897 }
1898
1899 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1900 Error **errp)
1901 {
1902 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1903 IOMMUNotifier *iommu_notifier;
1904 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1905 int ret = 0;
1906
1907 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1908 flags |= iommu_notifier->notifier_flags;
1909 }
1910
1911 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1912 ret = imrc->notify_flag_changed(iommu_mr,
1913 iommu_mr->iommu_notify_flags,
1914 flags, errp);
1915 }
1916
1917 if (!ret) {
1918 iommu_mr->iommu_notify_flags = flags;
1919 }
1920 return ret;
1921 }
1922
1923 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1924 uint64_t page_size_mask,
1925 Error **errp)
1926 {
1927 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1928 int ret = 0;
1929
1930 if (imrc->iommu_set_page_size_mask) {
1931 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1932 }
1933 return ret;
1934 }
1935
1936 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1937 IOMMUNotifier *n, Error **errp)
1938 {
1939 IOMMUMemoryRegion *iommu_mr;
1940 int ret;
1941
1942 if (mr->alias) {
1943 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1944 }
1945
1946 /* We need to register for at least one bitfield */
1947 iommu_mr = IOMMU_MEMORY_REGION(mr);
1948 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1949 assert(n->start <= n->end);
1950 assert(n->iommu_idx >= 0 &&
1951 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1952
1953 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1954 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1955 if (ret) {
1956 QLIST_REMOVE(n, node);
1957 }
1958 return ret;
1959 }
1960
1961 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1962 {
1963 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1964
1965 if (imrc->get_min_page_size) {
1966 return imrc->get_min_page_size(iommu_mr);
1967 }
1968 return TARGET_PAGE_SIZE;
1969 }
1970
1971 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1972 {
1973 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1974 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1975 hwaddr addr, granularity;
1976 IOMMUTLBEntry iotlb;
1977
1978 /* If the IOMMU has its own replay callback, override */
1979 if (imrc->replay) {
1980 imrc->replay(iommu_mr, n);
1981 return;
1982 }
1983
1984 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1985
1986 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1987 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1988 if (iotlb.perm != IOMMU_NONE) {
1989 n->notify(n, &iotlb);
1990 }
1991
1992 /* if (2^64 - MR size) < granularity, it's possible to get an
1993 * infinite loop here. This should catch such a wraparound */
1994 if ((addr + granularity) < addr) {
1995 break;
1996 }
1997 }
1998 }
1999
2000 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
2001 IOMMUNotifier *n)
2002 {
2003 IOMMUMemoryRegion *iommu_mr;
2004
2005 if (mr->alias) {
2006 memory_region_unregister_iommu_notifier(mr->alias, n);
2007 return;
2008 }
2009 QLIST_REMOVE(n, node);
2010 iommu_mr = IOMMU_MEMORY_REGION(mr);
2011 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2012 }
2013
2014 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2015 IOMMUTLBEvent *event)
2016 {
2017 IOMMUTLBEntry *entry = &event->entry;
2018 hwaddr entry_end = entry->iova + entry->addr_mask;
2019 IOMMUTLBEntry tmp = *entry;
2020
2021 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2022 assert(entry->perm == IOMMU_NONE);
2023 }
2024
2025 /*
2026 * Skip the notification if the notification does not overlap
2027 * with registered range.
2028 */
2029 if (notifier->start > entry_end || notifier->end < entry->iova) {
2030 return;
2031 }
2032
2033 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2034 /* Crop (iova, addr_mask) to range */
2035 tmp.iova = MAX(tmp.iova, notifier->start);
2036 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2037 } else {
2038 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2039 }
2040
2041 if (event->type & notifier->notifier_flags) {
2042 notifier->notify(notifier, &tmp);
2043 }
2044 }
2045
2046 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2047 int iommu_idx,
2048 IOMMUTLBEvent event)
2049 {
2050 IOMMUNotifier *iommu_notifier;
2051
2052 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2053
2054 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2055 if (iommu_notifier->iommu_idx == iommu_idx) {
2056 memory_region_notify_iommu_one(iommu_notifier, &event);
2057 }
2058 }
2059 }
2060
2061 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2062 enum IOMMUMemoryRegionAttr attr,
2063 void *data)
2064 {
2065 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2066
2067 if (!imrc->get_attr) {
2068 return -EINVAL;
2069 }
2070
2071 return imrc->get_attr(iommu_mr, attr, data);
2072 }
2073
2074 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2075 MemTxAttrs attrs)
2076 {
2077 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2078
2079 if (!imrc->attrs_to_index) {
2080 return 0;
2081 }
2082
2083 return imrc->attrs_to_index(iommu_mr, attrs);
2084 }
2085
2086 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2087 {
2088 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2089
2090 if (!imrc->num_indexes) {
2091 return 1;
2092 }
2093
2094 return imrc->num_indexes(iommu_mr);
2095 }
2096
2097 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2098 {
2099 if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2100 return NULL;
2101 }
2102 return mr->rdm;
2103 }
2104
2105 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2106 RamDiscardManager *rdm)
2107 {
2108 g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2109 g_assert(!rdm || !mr->rdm);
2110 mr->rdm = rdm;
2111 }
2112
2113 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2114 const MemoryRegion *mr)
2115 {
2116 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2117
2118 g_assert(rdmc->get_min_granularity);
2119 return rdmc->get_min_granularity(rdm, mr);
2120 }
2121
2122 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2123 const MemoryRegionSection *section)
2124 {
2125 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2126
2127 g_assert(rdmc->is_populated);
2128 return rdmc->is_populated(rdm, section);
2129 }
2130
2131 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2132 MemoryRegionSection *section,
2133 ReplayRamPopulate replay_fn,
2134 void *opaque)
2135 {
2136 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2137
2138 g_assert(rdmc->replay_populated);
2139 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2140 }
2141
2142 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2143 MemoryRegionSection *section,
2144 ReplayRamDiscard replay_fn,
2145 void *opaque)
2146 {
2147 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2148
2149 g_assert(rdmc->replay_discarded);
2150 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2151 }
2152
2153 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2154 RamDiscardListener *rdl,
2155 MemoryRegionSection *section)
2156 {
2157 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2158
2159 g_assert(rdmc->register_listener);
2160 rdmc->register_listener(rdm, rdl, section);
2161 }
2162
2163 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2164 RamDiscardListener *rdl)
2165 {
2166 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2167
2168 g_assert(rdmc->unregister_listener);
2169 rdmc->unregister_listener(rdm, rdl);
2170 }
2171
2172 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2173 {
2174 uint8_t mask = 1 << client;
2175 uint8_t old_logging;
2176
2177 assert(client == DIRTY_MEMORY_VGA);
2178 old_logging = mr->vga_logging_count;
2179 mr->vga_logging_count += log ? 1 : -1;
2180 if (!!old_logging == !!mr->vga_logging_count) {
2181 return;
2182 }
2183
2184 memory_region_transaction_begin();
2185 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2186 memory_region_update_pending |= mr->enabled;
2187 memory_region_transaction_commit();
2188 }
2189
2190 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2191 hwaddr size)
2192 {
2193 assert(mr->ram_block);
2194 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2195 size,
2196 memory_region_get_dirty_log_mask(mr));
2197 }
2198
2199 /*
2200 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2201 * dirty bitmap for the specified memory region.
2202 */
2203 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2204 {
2205 MemoryListener *listener;
2206 AddressSpace *as;
2207 FlatView *view;
2208 FlatRange *fr;
2209
2210 /* If the same address space has multiple log_sync listeners, we
2211 * visit that address space's FlatView multiple times. But because
2212 * log_sync listeners are rare, it's still cheaper than walking each
2213 * address space once.
2214 */
2215 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2216 if (listener->log_sync) {
2217 as = listener->address_space;
2218 view = address_space_get_flatview(as);
2219 FOR_EACH_FLAT_RANGE(fr, view) {
2220 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2221 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2222 listener->log_sync(listener, &mrs);
2223 }
2224 }
2225 flatview_unref(view);
2226 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2227 } else if (listener->log_sync_global) {
2228 /*
2229 * No matter whether MR is specified, what we can do here
2230 * is to do a global sync, because we are not capable to
2231 * sync in a finer granularity.
2232 */
2233 listener->log_sync_global(listener);
2234 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2235 }
2236 }
2237 }
2238
2239 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2240 hwaddr len)
2241 {
2242 MemoryRegionSection mrs;
2243 MemoryListener *listener;
2244 AddressSpace *as;
2245 FlatView *view;
2246 FlatRange *fr;
2247 hwaddr sec_start, sec_end, sec_size;
2248
2249 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2250 if (!listener->log_clear) {
2251 continue;
2252 }
2253 as = listener->address_space;
2254 view = address_space_get_flatview(as);
2255 FOR_EACH_FLAT_RANGE(fr, view) {
2256 if (!fr->dirty_log_mask || fr->mr != mr) {
2257 /*
2258 * Clear dirty bitmap operation only applies to those
2259 * regions whose dirty logging is at least enabled
2260 */
2261 continue;
2262 }
2263
2264 mrs = section_from_flat_range(fr, view);
2265
2266 sec_start = MAX(mrs.offset_within_region, start);
2267 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2268 sec_end = MIN(sec_end, start + len);
2269
2270 if (sec_start >= sec_end) {
2271 /*
2272 * If this memory region section has no intersection
2273 * with the requested range, skip.
2274 */
2275 continue;
2276 }
2277
2278 /* Valid case; shrink the section if needed */
2279 mrs.offset_within_address_space +=
2280 sec_start - mrs.offset_within_region;
2281 mrs.offset_within_region = sec_start;
2282 sec_size = sec_end - sec_start;
2283 mrs.size = int128_make64(sec_size);
2284 listener->log_clear(listener, &mrs);
2285 }
2286 flatview_unref(view);
2287 }
2288 }
2289
2290 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2291 hwaddr addr,
2292 hwaddr size,
2293 unsigned client)
2294 {
2295 DirtyBitmapSnapshot *snapshot;
2296 assert(mr->ram_block);
2297 memory_region_sync_dirty_bitmap(mr);
2298 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2299 memory_global_after_dirty_log_sync();
2300 return snapshot;
2301 }
2302
2303 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2304 hwaddr addr, hwaddr size)
2305 {
2306 assert(mr->ram_block);
2307 return cpu_physical_memory_snapshot_get_dirty(snap,
2308 memory_region_get_ram_addr(mr) + addr, size);
2309 }
2310
2311 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2312 {
2313 if (mr->readonly != readonly) {
2314 memory_region_transaction_begin();
2315 mr->readonly = readonly;
2316 memory_region_update_pending |= mr->enabled;
2317 memory_region_transaction_commit();
2318 }
2319 }
2320
2321 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2322 {
2323 if (mr->nonvolatile != nonvolatile) {
2324 memory_region_transaction_begin();
2325 mr->nonvolatile = nonvolatile;
2326 memory_region_update_pending |= mr->enabled;
2327 memory_region_transaction_commit();
2328 }
2329 }
2330
2331 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2332 {
2333 if (mr->romd_mode != romd_mode) {
2334 memory_region_transaction_begin();
2335 mr->romd_mode = romd_mode;
2336 memory_region_update_pending |= mr->enabled;
2337 memory_region_transaction_commit();
2338 }
2339 }
2340
2341 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2342 hwaddr size, unsigned client)
2343 {
2344 assert(mr->ram_block);
2345 cpu_physical_memory_test_and_clear_dirty(
2346 memory_region_get_ram_addr(mr) + addr, size, client);
2347 }
2348
2349 int memory_region_get_fd(MemoryRegion *mr)
2350 {
2351 int fd;
2352
2353 RCU_READ_LOCK_GUARD();
2354 while (mr->alias) {
2355 mr = mr->alias;
2356 }
2357 fd = mr->ram_block->fd;
2358
2359 return fd;
2360 }
2361
2362 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2363 {
2364 void *ptr;
2365 uint64_t offset = 0;
2366
2367 RCU_READ_LOCK_GUARD();
2368 while (mr->alias) {
2369 offset += mr->alias_offset;
2370 mr = mr->alias;
2371 }
2372 assert(mr->ram_block);
2373 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2374
2375 return ptr;
2376 }
2377
2378 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2379 {
2380 RAMBlock *block;
2381
2382 block = qemu_ram_block_from_host(ptr, false, offset);
2383 if (!block) {
2384 return NULL;
2385 }
2386
2387 return block->mr;
2388 }
2389
2390 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2391 {
2392 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2393 }
2394
2395 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2396 {
2397 assert(mr->ram_block);
2398
2399 qemu_ram_resize(mr->ram_block, newsize, errp);
2400 }
2401
2402 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2403 {
2404 if (mr->ram_block) {
2405 qemu_ram_msync(mr->ram_block, addr, size);
2406 }
2407 }
2408
2409 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2410 {
2411 /*
2412 * Might be extended case needed to cover
2413 * different types of memory regions
2414 */
2415 if (mr->dirty_log_mask) {
2416 memory_region_msync(mr, addr, size);
2417 }
2418 }
2419
2420 /*
2421 * Call proper memory listeners about the change on the newly
2422 * added/removed CoalescedMemoryRange.
2423 */
2424 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2425 CoalescedMemoryRange *cmr,
2426 bool add)
2427 {
2428 AddressSpace *as;
2429 FlatView *view;
2430 FlatRange *fr;
2431
2432 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2433 view = address_space_get_flatview(as);
2434 FOR_EACH_FLAT_RANGE(fr, view) {
2435 if (fr->mr == mr) {
2436 flat_range_coalesced_io_notify(fr, as, cmr, add);
2437 }
2438 }
2439 flatview_unref(view);
2440 }
2441 }
2442
2443 void memory_region_set_coalescing(MemoryRegion *mr)
2444 {
2445 memory_region_clear_coalescing(mr);
2446 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2447 }
2448
2449 void memory_region_add_coalescing(MemoryRegion *mr,
2450 hwaddr offset,
2451 uint64_t size)
2452 {
2453 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2454
2455 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2456 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2457 memory_region_update_coalesced_range(mr, cmr, true);
2458 memory_region_set_flush_coalesced(mr);
2459 }
2460
2461 void memory_region_clear_coalescing(MemoryRegion *mr)
2462 {
2463 CoalescedMemoryRange *cmr;
2464
2465 if (QTAILQ_EMPTY(&mr->coalesced)) {
2466 return;
2467 }
2468
2469 qemu_flush_coalesced_mmio_buffer();
2470 mr->flush_coalesced_mmio = false;
2471
2472 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2473 cmr = QTAILQ_FIRST(&mr->coalesced);
2474 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2475 memory_region_update_coalesced_range(mr, cmr, false);
2476 g_free(cmr);
2477 }
2478 }
2479
2480 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2481 {
2482 mr->flush_coalesced_mmio = true;
2483 }
2484
2485 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2486 {
2487 qemu_flush_coalesced_mmio_buffer();
2488 if (QTAILQ_EMPTY(&mr->coalesced)) {
2489 mr->flush_coalesced_mmio = false;
2490 }
2491 }
2492
2493 static bool userspace_eventfd_warning;
2494
2495 void memory_region_add_eventfd(MemoryRegion *mr,
2496 hwaddr addr,
2497 unsigned size,
2498 bool match_data,
2499 uint64_t data,
2500 EventNotifier *e)
2501 {
2502 MemoryRegionIoeventfd mrfd = {
2503 .addr.start = int128_make64(addr),
2504 .addr.size = int128_make64(size),
2505 .match_data = match_data,
2506 .data = data,
2507 .e = e,
2508 };
2509 unsigned i;
2510
2511 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2512 userspace_eventfd_warning))) {
2513 userspace_eventfd_warning = true;
2514 error_report("Using eventfd without MMIO binding in KVM. "
2515 "Suboptimal performance expected");
2516 }
2517
2518 if (size) {
2519 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2520 }
2521 memory_region_transaction_begin();
2522 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2523 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2524 break;
2525 }
2526 }
2527 ++mr->ioeventfd_nb;
2528 mr->ioeventfds = g_realloc(mr->ioeventfds,
2529 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2530 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2531 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2532 mr->ioeventfds[i] = mrfd;
2533 ioeventfd_update_pending |= mr->enabled;
2534 memory_region_transaction_commit();
2535 }
2536
2537 void memory_region_del_eventfd(MemoryRegion *mr,
2538 hwaddr addr,
2539 unsigned size,
2540 bool match_data,
2541 uint64_t data,
2542 EventNotifier *e)
2543 {
2544 MemoryRegionIoeventfd mrfd = {
2545 .addr.start = int128_make64(addr),
2546 .addr.size = int128_make64(size),
2547 .match_data = match_data,
2548 .data = data,
2549 .e = e,
2550 };
2551 unsigned i;
2552
2553 if (size) {
2554 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2555 }
2556 memory_region_transaction_begin();
2557 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2558 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2559 break;
2560 }
2561 }
2562 assert(i != mr->ioeventfd_nb);
2563 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2564 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2565 --mr->ioeventfd_nb;
2566 mr->ioeventfds = g_realloc(mr->ioeventfds,
2567 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2568 ioeventfd_update_pending |= mr->enabled;
2569 memory_region_transaction_commit();
2570 }
2571
2572 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2573 {
2574 MemoryRegion *mr = subregion->container;
2575 MemoryRegion *other;
2576
2577 memory_region_transaction_begin();
2578
2579 memory_region_ref(subregion);
2580 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2581 if (subregion->priority >= other->priority) {
2582 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2583 goto done;
2584 }
2585 }
2586 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2587 done:
2588 memory_region_update_pending |= mr->enabled && subregion->enabled;
2589 memory_region_transaction_commit();
2590 }
2591
2592 static void memory_region_add_subregion_common(MemoryRegion *mr,
2593 hwaddr offset,
2594 MemoryRegion *subregion)
2595 {
2596 MemoryRegion *alias;
2597
2598 assert(!subregion->container);
2599 subregion->container = mr;
2600 for (alias = subregion->alias; alias; alias = alias->alias) {
2601 alias->mapped_via_alias++;
2602 }
2603 subregion->addr = offset;
2604 memory_region_update_container_subregions(subregion);
2605 }
2606
2607 void memory_region_add_subregion(MemoryRegion *mr,
2608 hwaddr offset,
2609 MemoryRegion *subregion)
2610 {
2611 subregion->priority = 0;
2612 memory_region_add_subregion_common(mr, offset, subregion);
2613 }
2614
2615 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2616 hwaddr offset,
2617 MemoryRegion *subregion,
2618 int priority)
2619 {
2620 subregion->priority = priority;
2621 memory_region_add_subregion_common(mr, offset, subregion);
2622 }
2623
2624 void memory_region_del_subregion(MemoryRegion *mr,
2625 MemoryRegion *subregion)
2626 {
2627 MemoryRegion *alias;
2628
2629 memory_region_transaction_begin();
2630 assert(subregion->container == mr);
2631 subregion->container = NULL;
2632 for (alias = subregion->alias; alias; alias = alias->alias) {
2633 alias->mapped_via_alias--;
2634 assert(alias->mapped_via_alias >= 0);
2635 }
2636 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2637 memory_region_unref(subregion);
2638 memory_region_update_pending |= mr->enabled && subregion->enabled;
2639 memory_region_transaction_commit();
2640 }
2641
2642 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2643 {
2644 if (enabled == mr->enabled) {
2645 return;
2646 }
2647 memory_region_transaction_begin();
2648 mr->enabled = enabled;
2649 memory_region_update_pending = true;
2650 memory_region_transaction_commit();
2651 }
2652
2653 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2654 {
2655 Int128 s = int128_make64(size);
2656
2657 if (size == UINT64_MAX) {
2658 s = int128_2_64();
2659 }
2660 if (int128_eq(s, mr->size)) {
2661 return;
2662 }
2663 memory_region_transaction_begin();
2664 mr->size = s;
2665 memory_region_update_pending = true;
2666 memory_region_transaction_commit();
2667 }
2668
2669 static void memory_region_readd_subregion(MemoryRegion *mr)
2670 {
2671 MemoryRegion *container = mr->container;
2672
2673 if (container) {
2674 memory_region_transaction_begin();
2675 memory_region_ref(mr);
2676 memory_region_del_subregion(container, mr);
2677 memory_region_add_subregion_common(container, mr->addr, mr);
2678 memory_region_unref(mr);
2679 memory_region_transaction_commit();
2680 }
2681 }
2682
2683 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2684 {
2685 if (addr != mr->addr) {
2686 mr->addr = addr;
2687 memory_region_readd_subregion(mr);
2688 }
2689 }
2690
2691 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2692 {
2693 assert(mr->alias);
2694
2695 if (offset == mr->alias_offset) {
2696 return;
2697 }
2698
2699 memory_region_transaction_begin();
2700 mr->alias_offset = offset;
2701 memory_region_update_pending |= mr->enabled;
2702 memory_region_transaction_commit();
2703 }
2704
2705 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2706 {
2707 return mr->align;
2708 }
2709
2710 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2711 {
2712 const AddrRange *addr = addr_;
2713 const FlatRange *fr = fr_;
2714
2715 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2716 return -1;
2717 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2718 return 1;
2719 }
2720 return 0;
2721 }
2722
2723 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2724 {
2725 return bsearch(&addr, view->ranges, view->nr,
2726 sizeof(FlatRange), cmp_flatrange_addr);
2727 }
2728
2729 bool memory_region_is_mapped(MemoryRegion *mr)
2730 {
2731 return !!mr->container || mr->mapped_via_alias;
2732 }
2733
2734 /* Same as memory_region_find, but it does not add a reference to the
2735 * returned region. It must be called from an RCU critical section.
2736 */
2737 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2738 hwaddr addr, uint64_t size)
2739 {
2740 MemoryRegionSection ret = { .mr = NULL };
2741 MemoryRegion *root;
2742 AddressSpace *as;
2743 AddrRange range;
2744 FlatView *view;
2745 FlatRange *fr;
2746
2747 addr += mr->addr;
2748 for (root = mr; root->container; ) {
2749 root = root->container;
2750 addr += root->addr;
2751 }
2752
2753 as = memory_region_to_address_space(root);
2754 if (!as) {
2755 return ret;
2756 }
2757 range = addrrange_make(int128_make64(addr), int128_make64(size));
2758
2759 view = address_space_to_flatview(as);
2760 fr = flatview_lookup(view, range);
2761 if (!fr) {
2762 return ret;
2763 }
2764
2765 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2766 --fr;
2767 }
2768
2769 ret.mr = fr->mr;
2770 ret.fv = view;
2771 range = addrrange_intersection(range, fr->addr);
2772 ret.offset_within_region = fr->offset_in_region;
2773 ret.offset_within_region += int128_get64(int128_sub(range.start,
2774 fr->addr.start));
2775 ret.size = range.size;
2776 ret.offset_within_address_space = int128_get64(range.start);
2777 ret.readonly = fr->readonly;
2778 ret.nonvolatile = fr->nonvolatile;
2779 return ret;
2780 }
2781
2782 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2783 hwaddr addr, uint64_t size)
2784 {
2785 MemoryRegionSection ret;
2786 RCU_READ_LOCK_GUARD();
2787 ret = memory_region_find_rcu(mr, addr, size);
2788 if (ret.mr) {
2789 memory_region_ref(ret.mr);
2790 }
2791 return ret;
2792 }
2793
2794 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2795 {
2796 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2797
2798 *tmp = *s;
2799 if (tmp->mr) {
2800 memory_region_ref(tmp->mr);
2801 }
2802 if (tmp->fv) {
2803 bool ret = flatview_ref(tmp->fv);
2804
2805 g_assert(ret);
2806 }
2807 return tmp;
2808 }
2809
2810 void memory_region_section_free_copy(MemoryRegionSection *s)
2811 {
2812 if (s->fv) {
2813 flatview_unref(s->fv);
2814 }
2815 if (s->mr) {
2816 memory_region_unref(s->mr);
2817 }
2818 g_free(s);
2819 }
2820
2821 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2822 {
2823 MemoryRegion *mr;
2824
2825 RCU_READ_LOCK_GUARD();
2826 mr = memory_region_find_rcu(container, addr, 1).mr;
2827 return mr && mr != container;
2828 }
2829
2830 void memory_global_dirty_log_sync(void)
2831 {
2832 memory_region_sync_dirty_bitmap(NULL);
2833 }
2834
2835 void memory_global_after_dirty_log_sync(void)
2836 {
2837 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2838 }
2839
2840 /*
2841 * Dirty track stop flags that are postponed due to VM being stopped. Should
2842 * only be used within vmstate_change hook.
2843 */
2844 static unsigned int postponed_stop_flags;
2845 static VMChangeStateEntry *vmstate_change;
2846 static void memory_global_dirty_log_stop_postponed_run(void);
2847
2848 void memory_global_dirty_log_start(unsigned int flags)
2849 {
2850 unsigned int old_flags;
2851
2852 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2853
2854 if (vmstate_change) {
2855 /* If there is postponed stop(), operate on it first */
2856 postponed_stop_flags &= ~flags;
2857 memory_global_dirty_log_stop_postponed_run();
2858 }
2859
2860 flags &= ~global_dirty_tracking;
2861 if (!flags) {
2862 return;
2863 }
2864
2865 old_flags = global_dirty_tracking;
2866 global_dirty_tracking |= flags;
2867 trace_global_dirty_changed(global_dirty_tracking);
2868
2869 if (!old_flags) {
2870 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2871 memory_region_transaction_begin();
2872 memory_region_update_pending = true;
2873 memory_region_transaction_commit();
2874 }
2875 }
2876
2877 static void memory_global_dirty_log_do_stop(unsigned int flags)
2878 {
2879 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2880 assert((global_dirty_tracking & flags) == flags);
2881 global_dirty_tracking &= ~flags;
2882
2883 trace_global_dirty_changed(global_dirty_tracking);
2884
2885 if (!global_dirty_tracking) {
2886 memory_region_transaction_begin();
2887 memory_region_update_pending = true;
2888 memory_region_transaction_commit();
2889 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2890 }
2891 }
2892
2893 /*
2894 * Execute the postponed dirty log stop operations if there is, then reset
2895 * everything (including the flags and the vmstate change hook).
2896 */
2897 static void memory_global_dirty_log_stop_postponed_run(void)
2898 {
2899 /* This must be called with the vmstate handler registered */
2900 assert(vmstate_change);
2901
2902 /* Note: postponed_stop_flags can be cleared in log start routine */
2903 if (postponed_stop_flags) {
2904 memory_global_dirty_log_do_stop(postponed_stop_flags);
2905 postponed_stop_flags = 0;
2906 }
2907
2908 qemu_del_vm_change_state_handler(vmstate_change);
2909 vmstate_change = NULL;
2910 }
2911
2912 static void memory_vm_change_state_handler(void *opaque, bool running,
2913 RunState state)
2914 {
2915 if (running) {
2916 memory_global_dirty_log_stop_postponed_run();
2917 }
2918 }
2919
2920 void memory_global_dirty_log_stop(unsigned int flags)
2921 {
2922 if (!runstate_is_running()) {
2923 /* Postpone the dirty log stop, e.g., to when VM starts again */
2924 if (vmstate_change) {
2925 /* Batch with previous postponed flags */
2926 postponed_stop_flags |= flags;
2927 } else {
2928 postponed_stop_flags = flags;
2929 vmstate_change = qemu_add_vm_change_state_handler(
2930 memory_vm_change_state_handler, NULL);
2931 }
2932 return;
2933 }
2934
2935 memory_global_dirty_log_do_stop(flags);
2936 }
2937
2938 static void listener_add_address_space(MemoryListener *listener,
2939 AddressSpace *as)
2940 {
2941 FlatView *view;
2942 FlatRange *fr;
2943
2944 if (listener->begin) {
2945 listener->begin(listener);
2946 }
2947 if (global_dirty_tracking) {
2948 if (listener->log_global_start) {
2949 listener->log_global_start(listener);
2950 }
2951 }
2952
2953 view = address_space_get_flatview(as);
2954 FOR_EACH_FLAT_RANGE(fr, view) {
2955 MemoryRegionSection section = section_from_flat_range(fr, view);
2956
2957 if (listener->region_add) {
2958 listener->region_add(listener, &section);
2959 }
2960 if (fr->dirty_log_mask && listener->log_start) {
2961 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2962 }
2963 }
2964 if (listener->commit) {
2965 listener->commit(listener);
2966 }
2967 flatview_unref(view);
2968 }
2969
2970 static void listener_del_address_space(MemoryListener *listener,
2971 AddressSpace *as)
2972 {
2973 FlatView *view;
2974 FlatRange *fr;
2975
2976 if (listener->begin) {
2977 listener->begin(listener);
2978 }
2979 view = address_space_get_flatview(as);
2980 FOR_EACH_FLAT_RANGE(fr, view) {
2981 MemoryRegionSection section = section_from_flat_range(fr, view);
2982
2983 if (fr->dirty_log_mask && listener->log_stop) {
2984 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2985 }
2986 if (listener->region_del) {
2987 listener->region_del(listener, &section);
2988 }
2989 }
2990 if (listener->commit) {
2991 listener->commit(listener);
2992 }
2993 flatview_unref(view);
2994 }
2995
2996 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2997 {
2998 MemoryListener *other = NULL;
2999
3000 /* Only one of them can be defined for a listener */
3001 assert(!(listener->log_sync && listener->log_sync_global));
3002
3003 listener->address_space = as;
3004 if (QTAILQ_EMPTY(&memory_listeners)
3005 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3006 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3007 } else {
3008 QTAILQ_FOREACH(other, &memory_listeners, link) {
3009 if (listener->priority < other->priority) {
3010 break;
3011 }
3012 }
3013 QTAILQ_INSERT_BEFORE(other, listener, link);
3014 }
3015
3016 if (QTAILQ_EMPTY(&as->listeners)
3017 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3018 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3019 } else {
3020 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3021 if (listener->priority < other->priority) {
3022 break;
3023 }
3024 }
3025 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3026 }
3027
3028 listener_add_address_space(listener, as);
3029 }
3030
3031 void memory_listener_unregister(MemoryListener *listener)
3032 {
3033 if (!listener->address_space) {
3034 return;
3035 }
3036
3037 listener_del_address_space(listener, listener->address_space);
3038 QTAILQ_REMOVE(&memory_listeners, listener, link);
3039 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3040 listener->address_space = NULL;
3041 }
3042
3043 void address_space_remove_listeners(AddressSpace *as)
3044 {
3045 while (!QTAILQ_EMPTY(&as->listeners)) {
3046 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3047 }
3048 }
3049
3050 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3051 {
3052 memory_region_ref(root);
3053 as->root = root;
3054 as->current_map = NULL;
3055 as->ioeventfd_nb = 0;
3056 as->ioeventfds = NULL;
3057 QTAILQ_INIT(&as->listeners);
3058 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3059 as->name = g_strdup(name ? name : "anonymous");
3060 address_space_update_topology(as);
3061 address_space_update_ioeventfds(as);
3062 }
3063
3064 static void do_address_space_destroy(AddressSpace *as)
3065 {
3066 assert(QTAILQ_EMPTY(&as->listeners));
3067
3068 flatview_unref(as->current_map);
3069 g_free(as->name);
3070 g_free(as->ioeventfds);
3071 memory_region_unref(as->root);
3072 }
3073
3074 void address_space_destroy(AddressSpace *as)
3075 {
3076 MemoryRegion *root = as->root;
3077
3078 /* Flush out anything from MemoryListeners listening in on this */
3079 memory_region_transaction_begin();
3080 as->root = NULL;
3081 memory_region_transaction_commit();
3082 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3083
3084 /* At this point, as->dispatch and as->current_map are dummy
3085 * entries that the guest should never use. Wait for the old
3086 * values to expire before freeing the data.
3087 */
3088 as->root = root;
3089 call_rcu(as, do_address_space_destroy, rcu);
3090 }
3091
3092 static const char *memory_region_type(MemoryRegion *mr)
3093 {
3094 if (mr->alias) {
3095 return memory_region_type(mr->alias);
3096 }
3097 if (memory_region_is_ram_device(mr)) {
3098 return "ramd";
3099 } else if (memory_region_is_romd(mr)) {
3100 return "romd";
3101 } else if (memory_region_is_rom(mr)) {
3102 return "rom";
3103 } else if (memory_region_is_ram(mr)) {
3104 return "ram";
3105 } else {
3106 return "i/o";
3107 }
3108 }
3109
3110 typedef struct MemoryRegionList MemoryRegionList;
3111
3112 struct MemoryRegionList {
3113 const MemoryRegion *mr;
3114 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3115 };
3116
3117 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3118
3119 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3120 int128_sub((size), int128_one())) : 0)
3121 #define MTREE_INDENT " "
3122
3123 static void mtree_expand_owner(const char *label, Object *obj)
3124 {
3125 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3126
3127 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3128 if (dev && dev->id) {
3129 qemu_printf(" id=%s", dev->id);
3130 } else {
3131 char *canonical_path = object_get_canonical_path(obj);
3132 if (canonical_path) {
3133 qemu_printf(" path=%s", canonical_path);
3134 g_free(canonical_path);
3135 } else {
3136 qemu_printf(" type=%s", object_get_typename(obj));
3137 }
3138 }
3139 qemu_printf("}");
3140 }
3141
3142 static void mtree_print_mr_owner(const MemoryRegion *mr)
3143 {
3144 Object *owner = mr->owner;
3145 Object *parent = memory_region_owner((MemoryRegion *)mr);
3146
3147 if (!owner && !parent) {
3148 qemu_printf(" orphan");
3149 return;
3150 }
3151 if (owner) {
3152 mtree_expand_owner("owner", owner);
3153 }
3154 if (parent && parent != owner) {
3155 mtree_expand_owner("parent", parent);
3156 }
3157 }
3158
3159 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3160 hwaddr base,
3161 MemoryRegionListHead *alias_print_queue,
3162 bool owner, bool display_disabled)
3163 {
3164 MemoryRegionList *new_ml, *ml, *next_ml;
3165 MemoryRegionListHead submr_print_queue;
3166 const MemoryRegion *submr;
3167 unsigned int i;
3168 hwaddr cur_start, cur_end;
3169
3170 if (!mr) {
3171 return;
3172 }
3173
3174 cur_start = base + mr->addr;
3175 cur_end = cur_start + MR_SIZE(mr->size);
3176
3177 /*
3178 * Try to detect overflow of memory region. This should never
3179 * happen normally. When it happens, we dump something to warn the
3180 * user who is observing this.
3181 */
3182 if (cur_start < base || cur_end < cur_start) {
3183 qemu_printf("[DETECTED OVERFLOW!] ");
3184 }
3185
3186 if (mr->alias) {
3187 MemoryRegionList *ml;
3188 bool found = false;
3189
3190 /* check if the alias is already in the queue */
3191 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3192 if (ml->mr == mr->alias) {
3193 found = true;
3194 }
3195 }
3196
3197 if (!found) {
3198 ml = g_new(MemoryRegionList, 1);
3199 ml->mr = mr->alias;
3200 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3201 }
3202 if (mr->enabled || display_disabled) {
3203 for (i = 0; i < level; i++) {
3204 qemu_printf(MTREE_INDENT);
3205 }
3206 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3207 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
3208 "-" TARGET_FMT_plx "%s",
3209 cur_start, cur_end,
3210 mr->priority,
3211 mr->nonvolatile ? "nv-" : "",
3212 memory_region_type((MemoryRegion *)mr),
3213 memory_region_name(mr),
3214 memory_region_name(mr->alias),
3215 mr->alias_offset,
3216 mr->alias_offset + MR_SIZE(mr->size),
3217 mr->enabled ? "" : " [disabled]");
3218 if (owner) {
3219 mtree_print_mr_owner(mr);
3220 }
3221 qemu_printf("\n");
3222 }
3223 } else {
3224 if (mr->enabled || display_disabled) {
3225 for (i = 0; i < level; i++) {
3226 qemu_printf(MTREE_INDENT);
3227 }
3228 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3229 " (prio %d, %s%s): %s%s",
3230 cur_start, cur_end,
3231 mr->priority,
3232 mr->nonvolatile ? "nv-" : "",
3233 memory_region_type((MemoryRegion *)mr),
3234 memory_region_name(mr),
3235 mr->enabled ? "" : " [disabled]");
3236 if (owner) {
3237 mtree_print_mr_owner(mr);
3238 }
3239 qemu_printf("\n");
3240 }
3241 }
3242
3243 QTAILQ_INIT(&submr_print_queue);
3244
3245 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3246 new_ml = g_new(MemoryRegionList, 1);
3247 new_ml->mr = submr;
3248 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3249 if (new_ml->mr->addr < ml->mr->addr ||
3250 (new_ml->mr->addr == ml->mr->addr &&
3251 new_ml->mr->priority > ml->mr->priority)) {
3252 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3253 new_ml = NULL;
3254 break;
3255 }
3256 }
3257 if (new_ml) {
3258 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3259 }
3260 }
3261
3262 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3263 mtree_print_mr(ml->mr, level + 1, cur_start,
3264 alias_print_queue, owner, display_disabled);
3265 }
3266
3267 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3268 g_free(ml);
3269 }
3270 }
3271
3272 struct FlatViewInfo {
3273 int counter;
3274 bool dispatch_tree;
3275 bool owner;
3276 AccelClass *ac;
3277 };
3278
3279 static void mtree_print_flatview(gpointer key, gpointer value,
3280 gpointer user_data)
3281 {
3282 FlatView *view = key;
3283 GArray *fv_address_spaces = value;
3284 struct FlatViewInfo *fvi = user_data;
3285 FlatRange *range = &view->ranges[0];
3286 MemoryRegion *mr;
3287 int n = view->nr;
3288 int i;
3289 AddressSpace *as;
3290
3291 qemu_printf("FlatView #%d\n", fvi->counter);
3292 ++fvi->counter;
3293
3294 for (i = 0; i < fv_address_spaces->len; ++i) {
3295 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3296 qemu_printf(" AS \"%s\", root: %s",
3297 as->name, memory_region_name(as->root));
3298 if (as->root->alias) {
3299 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3300 }
3301 qemu_printf("\n");
3302 }
3303
3304 qemu_printf(" Root memory region: %s\n",
3305 view->root ? memory_region_name(view->root) : "(none)");
3306
3307 if (n <= 0) {
3308 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3309 return;
3310 }
3311
3312 while (n--) {
3313 mr = range->mr;
3314 if (range->offset_in_region) {
3315 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3316 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3317 int128_get64(range->addr.start),
3318 int128_get64(range->addr.start)
3319 + MR_SIZE(range->addr.size),
3320 mr->priority,
3321 range->nonvolatile ? "nv-" : "",
3322 range->readonly ? "rom" : memory_region_type(mr),
3323 memory_region_name(mr),
3324 range->offset_in_region);
3325 } else {
3326 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3327 " (prio %d, %s%s): %s",
3328 int128_get64(range->addr.start),
3329 int128_get64(range->addr.start)
3330 + MR_SIZE(range->addr.size),
3331 mr->priority,
3332 range->nonvolatile ? "nv-" : "",
3333 range->readonly ? "rom" : memory_region_type(mr),
3334 memory_region_name(mr));
3335 }
3336 if (fvi->owner) {
3337 mtree_print_mr_owner(mr);
3338 }
3339
3340 if (fvi->ac) {
3341 for (i = 0; i < fv_address_spaces->len; ++i) {
3342 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3343 if (fvi->ac->has_memory(current_machine, as,
3344 int128_get64(range->addr.start),
3345 MR_SIZE(range->addr.size) + 1)) {
3346 qemu_printf(" %s", fvi->ac->name);
3347 }
3348 }
3349 }
3350 qemu_printf("\n");
3351 range++;
3352 }
3353
3354 #if !defined(CONFIG_USER_ONLY)
3355 if (fvi->dispatch_tree && view->root) {
3356 mtree_print_dispatch(view->dispatch, view->root);
3357 }
3358 #endif
3359
3360 qemu_printf("\n");
3361 }
3362
3363 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3364 gpointer user_data)
3365 {
3366 FlatView *view = key;
3367 GArray *fv_address_spaces = value;
3368
3369 g_array_unref(fv_address_spaces);
3370 flatview_unref(view);
3371
3372 return true;
3373 }
3374
3375 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3376 {
3377 struct FlatViewInfo fvi = {
3378 .counter = 0,
3379 .dispatch_tree = dispatch_tree,
3380 .owner = owner,
3381 };
3382 AddressSpace *as;
3383 FlatView *view;
3384 GArray *fv_address_spaces;
3385 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3386 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3387
3388 if (ac->has_memory) {
3389 fvi.ac = ac;
3390 }
3391
3392 /* Gather all FVs in one table */
3393 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3394 view = address_space_get_flatview(as);
3395
3396 fv_address_spaces = g_hash_table_lookup(views, view);
3397 if (!fv_address_spaces) {
3398 fv_address_spaces = g_array_new(false, false, sizeof(as));
3399 g_hash_table_insert(views, view, fv_address_spaces);
3400 }
3401
3402 g_array_append_val(fv_address_spaces, as);
3403 }
3404
3405 /* Print */
3406 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3407
3408 /* Free */
3409 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3410 g_hash_table_unref(views);
3411 }
3412
3413 struct AddressSpaceInfo {
3414 MemoryRegionListHead *ml_head;
3415 bool owner;
3416 bool disabled;
3417 };
3418
3419 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3420 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3421 {
3422 const AddressSpace *as_a = a;
3423 const AddressSpace *as_b = b;
3424
3425 return g_strcmp0(as_a->name, as_b->name);
3426 }
3427
3428 static void mtree_print_as_name(gpointer data, gpointer user_data)
3429 {
3430 AddressSpace *as = data;
3431
3432 qemu_printf("address-space: %s\n", as->name);
3433 }
3434
3435 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3436 {
3437 MemoryRegion *mr = key;
3438 GSList *as_same_root_mr_list = value;
3439 struct AddressSpaceInfo *asi = user_data;
3440
3441 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3442 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3443 qemu_printf("\n");
3444 }
3445
3446 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3447 gpointer user_data)
3448 {
3449 GSList *as_same_root_mr_list = value;
3450
3451 g_slist_free(as_same_root_mr_list);
3452
3453 return true;
3454 }
3455
3456 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3457 {
3458 MemoryRegionListHead ml_head;
3459 MemoryRegionList *ml, *ml2;
3460 AddressSpace *as;
3461 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3462 GSList *as_same_root_mr_list;
3463 struct AddressSpaceInfo asi = {
3464 .ml_head = &ml_head,
3465 .owner = owner,
3466 .disabled = disabled,
3467 };
3468
3469 QTAILQ_INIT(&ml_head);
3470
3471 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3472 /* Create hashtable, key=AS root MR, value = list of AS */
3473 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3474 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3475 address_space_compare_name);
3476 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3477 }
3478
3479 /* print address spaces */
3480 g_hash_table_foreach(views, mtree_print_as, &asi);
3481 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3482 g_hash_table_unref(views);
3483
3484 /* print aliased regions */
3485 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3486 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3487 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3488 qemu_printf("\n");
3489 }
3490
3491 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3492 g_free(ml);
3493 }
3494 }
3495
3496 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3497 {
3498 if (flatview) {
3499 mtree_info_flatview(dispatch_tree, owner);
3500 } else {
3501 mtree_info_as(dispatch_tree, owner, disabled);
3502 }
3503 }
3504
3505 void memory_region_init_ram(MemoryRegion *mr,
3506 Object *owner,
3507 const char *name,
3508 uint64_t size,
3509 Error **errp)
3510 {
3511 DeviceState *owner_dev;
3512 Error *err = NULL;
3513
3514 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3515 if (err) {
3516 error_propagate(errp, err);
3517 return;
3518 }
3519 /* This will assert if owner is neither NULL nor a DeviceState.
3520 * We only want the owner here for the purposes of defining a
3521 * unique name for migration. TODO: Ideally we should implement
3522 * a naming scheme for Objects which are not DeviceStates, in
3523 * which case we can relax this restriction.
3524 */
3525 owner_dev = DEVICE(owner);
3526 vmstate_register_ram(mr, owner_dev);
3527 }
3528
3529 void memory_region_init_rom(MemoryRegion *mr,
3530 Object *owner,
3531 const char *name,
3532 uint64_t size,
3533 Error **errp)
3534 {
3535 DeviceState *owner_dev;
3536 Error *err = NULL;
3537
3538 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3539 if (err) {
3540 error_propagate(errp, err);
3541 return;
3542 }
3543 /* This will assert if owner is neither NULL nor a DeviceState.
3544 * We only want the owner here for the purposes of defining a
3545 * unique name for migration. TODO: Ideally we should implement
3546 * a naming scheme for Objects which are not DeviceStates, in
3547 * which case we can relax this restriction.
3548 */
3549 owner_dev = DEVICE(owner);
3550 vmstate_register_ram(mr, owner_dev);
3551 }
3552
3553 void memory_region_init_rom_device(MemoryRegion *mr,
3554 Object *owner,
3555 const MemoryRegionOps *ops,
3556 void *opaque,
3557 const char *name,
3558 uint64_t size,
3559 Error **errp)
3560 {
3561 DeviceState *owner_dev;
3562 Error *err = NULL;
3563
3564 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3565 name, size, &err);
3566 if (err) {
3567 error_propagate(errp, err);
3568 return;
3569 }
3570 /* This will assert if owner is neither NULL nor a DeviceState.
3571 * We only want the owner here for the purposes of defining a
3572 * unique name for migration. TODO: Ideally we should implement
3573 * a naming scheme for Objects which are not DeviceStates, in
3574 * which case we can relax this restriction.
3575 */
3576 owner_dev = DEVICE(owner);
3577 vmstate_register_ram(mr, owner_dev);
3578 }
3579
3580 /*
3581 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3582 * the fuzz_dma_read_cb callback
3583 */
3584 #ifdef CONFIG_FUZZ
3585 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3586 size_t len,
3587 MemoryRegion *mr)
3588 {
3589 }
3590 #endif
3591
3592 static const TypeInfo memory_region_info = {
3593 .parent = TYPE_OBJECT,
3594 .name = TYPE_MEMORY_REGION,
3595 .class_size = sizeof(MemoryRegionClass),
3596 .instance_size = sizeof(MemoryRegion),
3597 .instance_init = memory_region_initfn,
3598 .instance_finalize = memory_region_finalize,
3599 };
3600
3601 static const TypeInfo iommu_memory_region_info = {
3602 .parent = TYPE_MEMORY_REGION,
3603 .name = TYPE_IOMMU_MEMORY_REGION,
3604 .class_size = sizeof(IOMMUMemoryRegionClass),
3605 .instance_size = sizeof(IOMMUMemoryRegion),
3606 .instance_init = iommu_memory_region_initfn,
3607 .abstract = true,
3608 };
3609
3610 static const TypeInfo ram_discard_manager_info = {
3611 .parent = TYPE_INTERFACE,
3612 .name = TYPE_RAM_DISCARD_MANAGER,
3613 .class_size = sizeof(RamDiscardManagerClass),
3614 };
3615
3616 static void memory_register_types(void)
3617 {
3618 type_register_static(&memory_region_info);
3619 type_register_static(&iommu_memory_region_info);
3620 type_register_static(&ram_discard_manager_info);
3621 }
3622
3623 type_init(memory_register_types)
AR7 emulation for QEMU