hw/pci/slotid_cap.c

   1 #include "qemu/osdep.h"
   2 #include "hw/pci/slotid_cap.h"
   3 #include "hw/pci/pci.h"
   4 #include "qemu/error-report.h"
   5
   6 #define SLOTID_CAP_LENGTH 4
   7 #define SLOTID_NSLOTS_SHIFT ctz32(PCI_SID_ESR_NSLOTS)
   8
   9 int slotid_cap_init(PCIDevice *d, int nslots,
  10                     uint8_t chassis,
  11                     unsigned offset)
  12 {
  13     int cap;
  14     if (!chassis) {
  15         error_report("Bridge chassis not specified. Each bridge is required "
  16                      "to be assigned a unique chassis id > 0.");
  17         return -EINVAL;
  18     }
  19     if (nslots < 0 || nslots > (PCI_SID_ESR_NSLOTS >> SLOTID_NSLOTS_SHIFT)) {
  20         /* TODO: error report? */
  21         return -EINVAL;
  22     }
  23
  24     cap = pci_add_capability(d, PCI_CAP_ID_SLOTID, offset, SLOTID_CAP_LENGTH);
  25     if (cap < 0) {
  26         return cap;
  27     }
  28     /* We make each chassis unique, this way each bridge is First in Chassis */
  29     d->config[cap + PCI_SID_ESR] = PCI_SID_ESR_FIC |
  30         (nslots << SLOTID_NSLOTS_SHIFT);
  31     d->cmask[cap + PCI_SID_ESR] = 0xff;
  32     d->config[cap + PCI_SID_CHASSIS_NR] = chassis;
  33     /* Note: Chassis number register is non-volatile,
  34        so we don't reset it. */
  35     /* TODO: store in eeprom? */
  36     d->wmask[cap + PCI_SID_CHASSIS_NR] = 0xff;
  37
  38     d->cap_present |= QEMU_PCI_CAP_SLOTID;
  39     return 0;
  40 }
  41
  42 void slotid_cap_cleanup(PCIDevice *d)
  43 {
  44     /* TODO: cleanup config space? */
  45     d->cap_present &= ~QEMU_PCI_CAP_SLOTID;
  46 }