xen-platform: Ensure xen is enabled when initializing
[qemu/ar7.git] / hw / i386 / xen / xen_platform.c
blob8682c42e4670607e77e8efbb63225bbf47585efb
1 /*
2 * XEN platform pci device, formerly known as the event channel device
4 * Copyright (c) 2003-2004 Intel Corp.
5 * Copyright (c) 2006 XenSource
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include "hw/hw.h"
27 #include "hw/i386/pc.h"
28 #include "hw/ide.h"
29 #include "hw/pci/pci.h"
30 #include "hw/irq.h"
31 #include "hw/xen/xen_common.h"
32 #include "hw/xen/xen_backend.h"
33 #include "trace.h"
34 #include "exec/address-spaces.h"
35 #include "sysemu/block-backend.h"
37 #include <xenguest.h>
39 //#define DEBUG_PLATFORM
41 #ifdef DEBUG_PLATFORM
42 #define DPRINTF(fmt, ...) do { \
43 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
44 } while (0)
45 #else
46 #define DPRINTF(fmt, ...) do { } while (0)
47 #endif
49 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
51 typedef struct PCIXenPlatformState {
52 /*< private >*/
53 PCIDevice parent_obj;
54 /*< public >*/
56 MemoryRegion fixed_io;
57 MemoryRegion bar;
58 MemoryRegion mmio_bar;
59 uint8_t flags; /* used only for version_id == 2 */
60 int drivers_blacklisted;
61 uint16_t driver_product_version;
63 /* Log from guest drivers */
64 char log_buffer[4096];
65 int log_buffer_off;
66 } PCIXenPlatformState;
68 #define TYPE_XEN_PLATFORM "xen-platform"
69 #define XEN_PLATFORM(obj) \
70 OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
72 #define XEN_PLATFORM_IOPORT 0x10
74 /* Send bytes to syslog */
75 static void log_writeb(PCIXenPlatformState *s, char val)
77 if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
78 /* Flush buffer */
79 s->log_buffer[s->log_buffer_off] = 0;
80 trace_xen_platform_log(s->log_buffer);
81 s->log_buffer_off = 0;
82 } else {
83 s->log_buffer[s->log_buffer_off++] = val;
87 /* Xen Platform, Fixed IOPort */
88 #define UNPLUG_ALL_IDE_DISKS 1
89 #define UNPLUG_ALL_NICS 2
90 #define UNPLUG_AUX_IDE_DISKS 4
92 static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
94 /* We have to ignore passthrough devices */
95 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
96 PCI_CLASS_NETWORK_ETHERNET
97 && strcmp(d->name, "xen-pci-passthrough") != 0) {
98 object_unparent(OBJECT(d));
102 static void pci_unplug_nics(PCIBus *bus)
104 pci_for_each_device(bus, 0, unplug_nic, NULL);
107 static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)
109 /* We have to ignore passthrough devices */
110 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
111 PCI_CLASS_STORAGE_IDE
112 && strcmp(d->name, "xen-pci-passthrough") != 0) {
113 pci_piix3_xen_ide_unplug(DEVICE(d));
117 static void pci_unplug_disks(PCIBus *bus)
119 pci_for_each_device(bus, 0, unplug_disks, NULL);
122 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
124 PCIXenPlatformState *s = opaque;
126 switch (addr) {
127 case 0: {
128 PCIDevice *pci_dev = PCI_DEVICE(s);
129 /* Unplug devices. Value is a bitmask of which devices to
130 unplug, with bit 0 the IDE devices, bit 1 the network
131 devices, and bit 2 the non-primary-master IDE devices. */
132 if (val & UNPLUG_ALL_IDE_DISKS) {
133 DPRINTF("unplug disks\n");
134 blk_drain_all();
135 blk_flush_all();
136 pci_unplug_disks(pci_dev->bus);
138 if (val & UNPLUG_ALL_NICS) {
139 DPRINTF("unplug nics\n");
140 pci_unplug_nics(pci_dev->bus);
142 if (val & UNPLUG_AUX_IDE_DISKS) {
143 DPRINTF("unplug auxiliary disks not supported\n");
145 break;
147 case 2:
148 switch (val) {
149 case 1:
150 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
151 break;
152 case 0:
153 DPRINTF("Guest claimed to be running PV product 0?\n");
154 break;
155 default:
156 DPRINTF("Unknown PV product %d loaded in guest\n", val);
157 break;
159 s->driver_product_version = val;
160 break;
164 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
165 uint32_t val)
167 switch (addr) {
168 case 0:
169 /* PV driver version */
170 break;
174 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
176 PCIXenPlatformState *s = opaque;
178 switch (addr) {
179 case 0: /* Platform flags */ {
180 hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
181 HVMMEM_ram_ro : HVMMEM_ram_rw;
182 if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
183 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
184 } else {
185 s->flags = val & PFFLAG_ROM_LOCK;
186 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
187 (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
189 break;
191 case 2:
192 log_writeb(s, val);
193 break;
197 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
199 PCIXenPlatformState *s = opaque;
201 switch (addr) {
202 case 0:
203 if (s->drivers_blacklisted) {
204 /* The drivers will recognise this magic number and refuse
205 * to do anything. */
206 return 0xd249;
207 } else {
208 /* Magic value so that you can identify the interface. */
209 return 0x49d2;
211 default:
212 return 0xffff;
216 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
218 PCIXenPlatformState *s = opaque;
220 switch (addr) {
221 case 0:
222 /* Platform flags */
223 return s->flags;
224 case 2:
225 /* Version number */
226 return 1;
227 default:
228 return 0xff;
232 static void platform_fixed_ioport_reset(void *opaque)
234 PCIXenPlatformState *s = opaque;
236 platform_fixed_ioport_writeb(s, 0, 0);
239 static uint64_t platform_fixed_ioport_read(void *opaque,
240 hwaddr addr,
241 unsigned size)
243 switch (size) {
244 case 1:
245 return platform_fixed_ioport_readb(opaque, addr);
246 case 2:
247 return platform_fixed_ioport_readw(opaque, addr);
248 default:
249 return -1;
253 static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
255 uint64_t val, unsigned size)
257 switch (size) {
258 case 1:
259 platform_fixed_ioport_writeb(opaque, addr, val);
260 break;
261 case 2:
262 platform_fixed_ioport_writew(opaque, addr, val);
263 break;
264 case 4:
265 platform_fixed_ioport_writel(opaque, addr, val);
266 break;
271 static const MemoryRegionOps platform_fixed_io_ops = {
272 .read = platform_fixed_ioport_read,
273 .write = platform_fixed_ioport_write,
274 .valid = {
275 .unaligned = true,
277 .impl = {
278 .min_access_size = 1,
279 .max_access_size = 4,
280 .unaligned = true,
282 .endianness = DEVICE_LITTLE_ENDIAN,
285 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
287 memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
288 "xen-fixed", 16);
289 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
290 &s->fixed_io);
293 /* Xen Platform PCI Device */
295 static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
296 unsigned int size)
298 if (addr == 0) {
299 return platform_fixed_ioport_readb(opaque, 0);
300 } else {
301 return ~0u;
305 static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
306 uint64_t val, unsigned int size)
308 PCIXenPlatformState *s = opaque;
310 switch (addr) {
311 case 0: /* Platform flags */
312 platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
313 break;
314 case 8:
315 log_writeb(s, (uint32_t)val);
316 break;
317 default:
318 break;
322 static const MemoryRegionOps xen_pci_io_ops = {
323 .read = xen_platform_ioport_readb,
324 .write = xen_platform_ioport_writeb,
325 .impl.min_access_size = 1,
326 .impl.max_access_size = 1,
329 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
331 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
332 "xen-pci", 0x100);
335 static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
336 unsigned size)
338 DPRINTF("Warning: attempted read from physical address "
339 "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
341 return 0;
344 static void platform_mmio_write(void *opaque, hwaddr addr,
345 uint64_t val, unsigned size)
347 DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
348 "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
349 val, addr);
352 static const MemoryRegionOps platform_mmio_handler = {
353 .read = &platform_mmio_read,
354 .write = &platform_mmio_write,
355 .endianness = DEVICE_NATIVE_ENDIAN,
358 static void platform_mmio_setup(PCIXenPlatformState *d)
360 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
361 "xen-mmio", 0x1000000);
364 static int xen_platform_post_load(void *opaque, int version_id)
366 PCIXenPlatformState *s = opaque;
368 platform_fixed_ioport_writeb(s, 0, s->flags);
370 return 0;
373 static const VMStateDescription vmstate_xen_platform = {
374 .name = "platform",
375 .version_id = 4,
376 .minimum_version_id = 4,
377 .post_load = xen_platform_post_load,
378 .fields = (VMStateField[]) {
379 VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
380 VMSTATE_UINT8(flags, PCIXenPlatformState),
381 VMSTATE_END_OF_LIST()
385 static int xen_platform_initfn(PCIDevice *dev)
387 PCIXenPlatformState *d = XEN_PLATFORM(dev);
388 uint8_t *pci_conf;
390 /* Device will crash on reset if xen is not initialized */
391 assert(xen_enabled());
393 pci_conf = dev->config;
395 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
397 pci_config_set_prog_interface(pci_conf, 0);
399 pci_conf[PCI_INTERRUPT_PIN] = 1;
401 platform_ioport_bar_setup(d);
402 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
404 /* reserve 16MB mmio address for share memory*/
405 platform_mmio_setup(d);
406 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
407 &d->mmio_bar);
409 platform_fixed_ioport_init(d);
411 return 0;
414 static void platform_reset(DeviceState *dev)
416 PCIXenPlatformState *s = XEN_PLATFORM(dev);
418 platform_fixed_ioport_reset(s);
421 static void xen_platform_class_init(ObjectClass *klass, void *data)
423 DeviceClass *dc = DEVICE_CLASS(klass);
424 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
426 k->init = xen_platform_initfn;
427 k->vendor_id = PCI_VENDOR_ID_XEN;
428 k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
429 k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
430 k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
431 k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
432 k->revision = 1;
433 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
434 dc->desc = "XEN platform pci device";
435 dc->reset = platform_reset;
436 dc->vmsd = &vmstate_xen_platform;
439 static const TypeInfo xen_platform_info = {
440 .name = TYPE_XEN_PLATFORM,
441 .parent = TYPE_PCI_DEVICE,
442 .instance_size = sizeof(PCIXenPlatformState),
443 .class_init = xen_platform_class_init,
446 static void xen_platform_register_types(void)
448 type_register_static(&xen_platform_info);
451 type_init(xen_platform_register_types)