2 * sPAPR CPU core device, acts as container of CPU thread devices.
4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
10 #include "qemu/osdep.h"
11 #include "hw/cpu/core.h"
12 #include "hw/ppc/spapr_cpu_core.h"
13 #include "migration/vmstate.h"
14 #include "target/ppc/cpu.h"
15 #include "hw/ppc/spapr.h"
16 #include "hw/boards.h"
17 #include "qapi/error.h"
18 #include "sysemu/cpus.h"
19 #include "sysemu/kvm.h"
20 #include "target/ppc/kvm_ppc.h"
21 #include "hw/ppc/ppc.h"
22 #include "target/ppc/mmu-hash64.h"
23 #include "sysemu/numa.h"
24 #include "sysemu/reset.h"
25 #include "sysemu/hw_accel.h"
26 #include "qemu/error-report.h"
28 static void spapr_cpu_reset(void *opaque
)
30 PowerPCCPU
*cpu
= opaque
;
31 CPUState
*cs
= CPU(cpu
);
32 CPUPPCState
*env
= &cpu
->env
;
33 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
34 SpaprCpuState
*spapr_cpu
= spapr_cpu_state(cpu
);
39 /* All CPUs start halted. CPU0 is unhalted from the machine level
40 * reset code and the rest are explicitly started up by the guest
41 * using an RTAS call */
44 /* Set compatibility mode to match the boot CPU, which was either set
45 * by the machine reset code or by CAS. This should never fail.
47 ppc_set_compat(cpu
, POWERPC_CPU(first_cpu
)->compat_pvr
, &error_abort
);
49 env
->spr
[SPR_HIOR
] = 0;
51 lpcr
= env
->spr
[SPR_LPCR
];
53 /* Set emulated LPCR to not send interrupts to hypervisor. Note that
54 * under KVM, the actual HW LPCR will be set differently by KVM itself,
55 * the settings below ensure proper operations with TCG in absence of
58 * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for
59 * real mode accesses, which thankfully defaults to 0 and isn't
60 * accessible in guest mode.
62 * Disable Power-saving mode Exit Cause exceptions for the CPU, so
63 * we don't get spurious wakups before an RTAS start-cpu call.
64 * For the same reason, set PSSCR_EC.
66 lpcr
&= ~(LPCR_VPM0
| LPCR_VPM1
| LPCR_ISL
| LPCR_KBV
| pcc
->lpcr_pm
);
67 lpcr
|= LPCR_LPES0
| LPCR_LPES1
;
68 env
->spr
[SPR_PSSCR
] |= PSSCR_EC
;
70 /* Set RMLS to the max (ie, 16G) */
72 lpcr
|= 1ull << LPCR_RMLS_SHIFT
;
74 ppc_store_lpcr(cpu
, lpcr
);
76 /* Set a full AMOR so guest can use the AMR as it sees fit */
77 env
->spr
[SPR_AMOR
] = 0xffffffffffffffffull
;
79 spapr_cpu
->vpa_addr
= 0;
80 spapr_cpu
->slb_shadow_addr
= 0;
81 spapr_cpu
->slb_shadow_size
= 0;
82 spapr_cpu
->dtl_addr
= 0;
83 spapr_cpu
->dtl_size
= 0;
85 spapr_caps_cpu_apply(SPAPR_MACHINE(qdev_get_machine()), cpu
);
87 kvm_check_mmu(cpu
, &error_fatal
);
90 void spapr_cpu_set_entry_state(PowerPCCPU
*cpu
, target_ulong nip
, target_ulong r3
)
92 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
93 CPUPPCState
*env
= &cpu
->env
;
97 kvmppc_set_reg_ppc_online(cpu
, 1);
99 /* Enable Power-saving mode Exit Cause exceptions */
100 ppc_store_lpcr(cpu
, env
->spr
[SPR_LPCR
] | pcc
->lpcr_pm
);
104 * Return the sPAPR CPU core type for @model which essentially is the CPU
105 * model specified with -cpu cmdline option.
107 const char *spapr_get_cpu_core_type(const char *cpu_type
)
109 int len
= strlen(cpu_type
) - strlen(POWERPC_CPU_TYPE_SUFFIX
);
110 char *core_type
= g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
112 ObjectClass
*oc
= object_class_by_name(core_type
);
119 return object_class_get_name(oc
);
122 static bool slb_shadow_needed(void *opaque
)
124 SpaprCpuState
*spapr_cpu
= opaque
;
126 return spapr_cpu
->slb_shadow_addr
!= 0;
129 static const VMStateDescription vmstate_spapr_cpu_slb_shadow
= {
130 .name
= "spapr_cpu/vpa/slb_shadow",
132 .minimum_version_id
= 1,
133 .needed
= slb_shadow_needed
,
134 .fields
= (VMStateField
[]) {
135 VMSTATE_UINT64(slb_shadow_addr
, SpaprCpuState
),
136 VMSTATE_UINT64(slb_shadow_size
, SpaprCpuState
),
137 VMSTATE_END_OF_LIST()
141 static bool dtl_needed(void *opaque
)
143 SpaprCpuState
*spapr_cpu
= opaque
;
145 return spapr_cpu
->dtl_addr
!= 0;
148 static const VMStateDescription vmstate_spapr_cpu_dtl
= {
149 .name
= "spapr_cpu/vpa/dtl",
151 .minimum_version_id
= 1,
152 .needed
= dtl_needed
,
153 .fields
= (VMStateField
[]) {
154 VMSTATE_UINT64(dtl_addr
, SpaprCpuState
),
155 VMSTATE_UINT64(dtl_size
, SpaprCpuState
),
156 VMSTATE_END_OF_LIST()
160 static bool vpa_needed(void *opaque
)
162 SpaprCpuState
*spapr_cpu
= opaque
;
164 return spapr_cpu
->vpa_addr
!= 0;
167 static const VMStateDescription vmstate_spapr_cpu_vpa
= {
168 .name
= "spapr_cpu/vpa",
170 .minimum_version_id
= 1,
171 .needed
= vpa_needed
,
172 .fields
= (VMStateField
[]) {
173 VMSTATE_UINT64(vpa_addr
, SpaprCpuState
),
174 VMSTATE_END_OF_LIST()
176 .subsections
= (const VMStateDescription
* []) {
177 &vmstate_spapr_cpu_slb_shadow
,
178 &vmstate_spapr_cpu_dtl
,
183 static const VMStateDescription vmstate_spapr_cpu_state
= {
186 .minimum_version_id
= 1,
187 .fields
= (VMStateField
[]) {
188 VMSTATE_END_OF_LIST()
190 .subsections
= (const VMStateDescription
* []) {
191 &vmstate_spapr_cpu_vpa
,
196 static void spapr_unrealize_vcpu(PowerPCCPU
*cpu
, SpaprCpuCore
*sc
)
198 if (!sc
->pre_3_0_migration
) {
199 vmstate_unregister(NULL
, &vmstate_spapr_cpu_state
, cpu
->machine_data
);
201 qemu_unregister_reset(spapr_cpu_reset
, cpu
);
202 if (spapr_cpu_state(cpu
)->icp
) {
203 object_unparent(OBJECT(spapr_cpu_state(cpu
)->icp
));
205 if (spapr_cpu_state(cpu
)->tctx
) {
206 object_unparent(OBJECT(spapr_cpu_state(cpu
)->tctx
));
208 cpu_remove_sync(CPU(cpu
));
209 object_unparent(OBJECT(cpu
));
212 static void spapr_cpu_core_unrealize(DeviceState
*dev
, Error
**errp
)
214 SpaprCpuCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
215 CPUCore
*cc
= CPU_CORE(dev
);
218 for (i
= 0; i
< cc
->nr_threads
; i
++) {
219 spapr_unrealize_vcpu(sc
->threads
[i
], sc
);
224 static void spapr_realize_vcpu(PowerPCCPU
*cpu
, SpaprMachineState
*spapr
,
225 SpaprCpuCore
*sc
, Error
**errp
)
227 CPUPPCState
*env
= &cpu
->env
;
228 CPUState
*cs
= CPU(cpu
);
229 Error
*local_err
= NULL
;
231 object_property_set_bool(OBJECT(cpu
), true, "realized", &local_err
);
236 /* Set time-base frequency to 512 MHz */
237 cpu_ppc_tb_init(env
, SPAPR_TIMEBASE_FREQ
);
239 cpu_ppc_set_vhyp(cpu
, PPC_VIRTUAL_HYPERVISOR(spapr
));
240 kvmppc_set_papr(cpu
);
242 qemu_register_reset(spapr_cpu_reset
, cpu
);
243 spapr_cpu_reset(cpu
);
245 spapr
->irq
->cpu_intc_create(spapr
, cpu
, &local_err
);
247 goto error_unregister
;
250 if (!sc
->pre_3_0_migration
) {
251 vmstate_register(NULL
, cs
->cpu_index
, &vmstate_spapr_cpu_state
,
258 qemu_unregister_reset(spapr_cpu_reset
, cpu
);
259 cpu_remove_sync(CPU(cpu
));
261 error_propagate(errp
, local_err
);
264 static PowerPCCPU
*spapr_create_vcpu(SpaprCpuCore
*sc
, int i
, Error
**errp
)
266 SpaprCpuCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(sc
);
267 CPUCore
*cc
= CPU_CORE(sc
);
272 Error
*local_err
= NULL
;
274 obj
= object_new(scc
->cpu_type
);
277 cpu
= POWERPC_CPU(obj
);
278 cs
->cpu_index
= cc
->core_id
+ i
;
279 spapr_set_vcpu_id(cpu
, cs
->cpu_index
, &local_err
);
284 cpu
->node_id
= sc
->node_id
;
286 id
= g_strdup_printf("thread[%d]", i
);
287 object_property_add_child(OBJECT(sc
), id
, obj
, &local_err
);
293 cpu
->machine_data
= g_new0(SpaprCpuState
, 1);
300 error_propagate(errp
, local_err
);
304 static void spapr_delete_vcpu(PowerPCCPU
*cpu
, SpaprCpuCore
*sc
)
306 SpaprCpuState
*spapr_cpu
= spapr_cpu_state(cpu
);
308 cpu
->machine_data
= NULL
;
310 object_unparent(OBJECT(cpu
));
313 static void spapr_cpu_core_realize(DeviceState
*dev
, Error
**errp
)
315 /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
316 * tries to add a sPAPR CPU core to a non-pseries machine.
318 SpaprMachineState
*spapr
=
319 (SpaprMachineState
*) object_dynamic_cast(qdev_get_machine(),
321 SpaprCpuCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
322 CPUCore
*cc
= CPU_CORE(OBJECT(dev
));
323 Error
*local_err
= NULL
;
327 error_setg(errp
, TYPE_SPAPR_CPU_CORE
" needs a pseries machine");
331 sc
->threads
= g_new(PowerPCCPU
*, cc
->nr_threads
);
332 for (i
= 0; i
< cc
->nr_threads
; i
++) {
333 sc
->threads
[i
] = spapr_create_vcpu(sc
, i
, &local_err
);
339 for (j
= 0; j
< cc
->nr_threads
; j
++) {
340 spapr_realize_vcpu(sc
->threads
[j
], spapr
, sc
, &local_err
);
349 spapr_unrealize_vcpu(sc
->threads
[j
], sc
);
353 spapr_delete_vcpu(sc
->threads
[i
], sc
);
356 error_propagate(errp
, local_err
);
359 static Property spapr_cpu_core_properties
[] = {
360 DEFINE_PROP_INT32("node-id", SpaprCpuCore
, node_id
, CPU_UNSET_NUMA_NODE_ID
),
361 DEFINE_PROP_BOOL("pre-3.0-migration", SpaprCpuCore
, pre_3_0_migration
,
363 DEFINE_PROP_END_OF_LIST()
366 static void spapr_cpu_core_class_init(ObjectClass
*oc
, void *data
)
368 DeviceClass
*dc
= DEVICE_CLASS(oc
);
369 SpaprCpuCoreClass
*scc
= SPAPR_CPU_CORE_CLASS(oc
);
371 dc
->realize
= spapr_cpu_core_realize
;
372 dc
->unrealize
= spapr_cpu_core_unrealize
;
373 dc
->props
= spapr_cpu_core_properties
;
374 scc
->cpu_type
= data
;
377 #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
379 .parent = TYPE_SPAPR_CPU_CORE, \
380 .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
381 .class_init = spapr_cpu_core_class_init, \
382 .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
385 static const TypeInfo spapr_cpu_core_type_infos
[] = {
387 .name
= TYPE_SPAPR_CPU_CORE
,
388 .parent
= TYPE_CPU_CORE
,
390 .instance_size
= sizeof(SpaprCpuCore
),
391 .class_size
= sizeof(SpaprCpuCoreClass
),
393 DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
394 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
395 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
396 DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
397 DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
398 DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
399 DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
400 DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
401 DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
402 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
403 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
405 DEFINE_SPAPR_CPU_CORE_TYPE("host"),
409 DEFINE_TYPES(spapr_cpu_core_type_infos
)