target/i386: make cpu_get_fp80()/cpu_set_fp80() static
[qemu/ar7.git] / hw / net / lance.c
blob92b0c68274afcf697b5c4a975eeb282873fd20fc
1 /*
2 * QEMU AMD PC-Net II (Am79C970A) emulation
4 * Copyright (c) 2004 Antony T Curtis
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 /* This software was written to be compatible with the specification:
26 * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
27 * AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000
31 * On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also
32 * produced as NCR89C100. See
33 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
34 * and
35 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt
38 #include "qemu/osdep.h"
39 #include "hw/sysbus.h"
40 #include "net/net.h"
41 #include "qemu/timer.h"
42 #include "qemu/sockets.h"
43 #include "hw/sparc/sun4m.h"
44 #include "pcnet.h"
45 #include "trace.h"
46 #include "sysemu/sysemu.h"
48 #define TYPE_LANCE "lance"
49 #define SYSBUS_PCNET(obj) \
50 OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE)
52 typedef struct {
53 SysBusDevice parent_obj;
55 PCNetState state;
56 } SysBusPCNetState;
58 static void parent_lance_reset(void *opaque, int irq, int level)
60 SysBusPCNetState *d = opaque;
61 if (level)
62 pcnet_h_reset(&d->state);
65 static void lance_mem_write(void *opaque, hwaddr addr,
66 uint64_t val, unsigned size)
68 SysBusPCNetState *d = opaque;
70 trace_lance_mem_writew(addr, val & 0xffff);
71 pcnet_ioport_writew(&d->state, addr, val & 0xffff);
74 static uint64_t lance_mem_read(void *opaque, hwaddr addr,
75 unsigned size)
77 SysBusPCNetState *d = opaque;
78 uint32_t val;
80 val = pcnet_ioport_readw(&d->state, addr);
81 trace_lance_mem_readw(addr, val & 0xffff);
82 return val & 0xffff;
85 static const MemoryRegionOps lance_mem_ops = {
86 .read = lance_mem_read,
87 .write = lance_mem_write,
88 .endianness = DEVICE_NATIVE_ENDIAN,
89 .valid = {
90 .min_access_size = 2,
91 .max_access_size = 2,
95 static NetClientInfo net_lance_info = {
96 .type = NET_CLIENT_DRIVER_NIC,
97 .size = sizeof(NICState),
98 .receive = pcnet_receive,
99 .link_status_changed = pcnet_set_link_status,
102 static const VMStateDescription vmstate_lance = {
103 .name = "pcnet",
104 .version_id = 3,
105 .minimum_version_id = 2,
106 .fields = (VMStateField[]) {
107 VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState),
108 VMSTATE_END_OF_LIST()
112 static int lance_init(SysBusDevice *sbd)
114 DeviceState *dev = DEVICE(sbd);
115 SysBusPCNetState *d = SYSBUS_PCNET(dev);
116 PCNetState *s = &d->state;
118 memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d,
119 "lance-mmio", 4);
121 qdev_init_gpio_in(dev, parent_lance_reset, 1);
123 sysbus_init_mmio(sbd, &s->mmio);
125 sysbus_init_irq(sbd, &s->irq);
127 s->phys_mem_read = ledma_memory_read;
128 s->phys_mem_write = ledma_memory_write;
129 pcnet_common_init(dev, s, &net_lance_info);
130 return 0;
133 static void lance_reset(DeviceState *dev)
135 SysBusPCNetState *d = SYSBUS_PCNET(dev);
137 pcnet_h_reset(&d->state);
140 static void lance_instance_init(Object *obj)
142 SysBusPCNetState *d = SYSBUS_PCNET(obj);
143 PCNetState *s = &d->state;
145 device_add_bootindex_property(obj, &s->conf.bootindex,
146 "bootindex", "/ethernet-phy@0",
147 DEVICE(obj), NULL);
150 static Property lance_properties[] = {
151 DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
152 DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
153 DEFINE_PROP_END_OF_LIST(),
156 static void lance_class_init(ObjectClass *klass, void *data)
158 DeviceClass *dc = DEVICE_CLASS(klass);
159 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
161 k->init = lance_init;
162 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
163 dc->fw_name = "ethernet";
164 dc->reset = lance_reset;
165 dc->vmsd = &vmstate_lance;
166 dc->props = lance_properties;
167 /* Reason: pointer property "dma" */
168 dc->user_creatable = false;
171 static const TypeInfo lance_info = {
172 .name = TYPE_LANCE,
173 .parent = TYPE_SYS_BUS_DEVICE,
174 .instance_size = sizeof(SysBusPCNetState),
175 .class_init = lance_class_init,
176 .instance_init = lance_instance_init,
179 static void lance_register_types(void)
181 type_register_static(&lance_info);
184 type_init(lance_register_types)