target-unicore32/ucf64_helper.c

   1 /*
   2  * UniCore-F64 simulation helpers for QEMU.
   3  *
   4  * Copyright (C) 2010-2012 Guan Xuetao
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation, or any later version.
   9  * See the COPYING file in the top-level directory.
  10  */
  11 #include "cpu.h"
  12 #include "exec/helper-proto.h"
  13
  14 /*
  15  * The convention used for UniCore-F64 instructions:
  16  *  Single precition routines have a "s" suffix
  17  *  Double precision routines have a "d" suffix.
  18  */
  19
  20 /* Convert host exception flags to f64 form.  */
  21 static inline int ucf64_exceptbits_from_host(int host_bits)
  22 {
  23     int target_bits = 0;
  24
  25     if (host_bits & float_flag_invalid) {
  26         target_bits |= UCF64_FPSCR_FLAG_INVALID;
  27     }
  28     if (host_bits & float_flag_divbyzero) {
  29         target_bits |= UCF64_FPSCR_FLAG_DIVZERO;
  30     }
  31     if (host_bits & float_flag_overflow) {
  32         target_bits |= UCF64_FPSCR_FLAG_OVERFLOW;
  33     }
  34     if (host_bits & float_flag_underflow) {
  35         target_bits |= UCF64_FPSCR_FLAG_UNDERFLOW;
  36     }
  37     if (host_bits & float_flag_inexact) {
  38         target_bits |= UCF64_FPSCR_FLAG_INEXACT;
  39     }
  40     return target_bits;
  41 }
  42
  43 uint32_t HELPER(ucf64_get_fpscr)(CPUUniCore32State *env)
  44 {
  45     int i;
  46     uint32_t fpscr;
  47
  48     fpscr = (env->ucf64.xregs[UC32_UCF64_FPSCR] & UCF64_FPSCR_MASK);
  49     i = get_float_exception_flags(&env->ucf64.fp_status);
  50     fpscr |= ucf64_exceptbits_from_host(i);
  51     return fpscr;
  52 }
  53
  54 /* Convert ucf64 exception flags to target form.  */
  55 static inline int ucf64_exceptbits_to_host(int target_bits)
  56 {
  57     int host_bits = 0;
  58
  59     if (target_bits & UCF64_FPSCR_FLAG_INVALID) {
  60         host_bits |= float_flag_invalid;
  61     }
  62     if (target_bits & UCF64_FPSCR_FLAG_DIVZERO) {
  63         host_bits |= float_flag_divbyzero;
  64     }
  65     if (target_bits & UCF64_FPSCR_FLAG_OVERFLOW) {
  66         host_bits |= float_flag_overflow;
  67     }
  68     if (target_bits & UCF64_FPSCR_FLAG_UNDERFLOW) {
  69         host_bits |= float_flag_underflow;
  70     }
  71     if (target_bits & UCF64_FPSCR_FLAG_INEXACT) {
  72         host_bits |= float_flag_inexact;
  73     }
  74     return host_bits;
  75 }
  76
  77 void HELPER(ucf64_set_fpscr)(CPUUniCore32State *env, uint32_t val)
  78 {
  79     UniCore32CPU *cpu = uc32_env_get_cpu(env);
  80     int i;
  81     uint32_t changed;
  82
  83     changed = env->ucf64.xregs[UC32_UCF64_FPSCR];
  84     env->ucf64.xregs[UC32_UCF64_FPSCR] = (val & UCF64_FPSCR_MASK);
  85
  86     changed ^= val;
  87     if (changed & (UCF64_FPSCR_RND_MASK)) {
  88         i = UCF64_FPSCR_RND(val);
  89         switch (i) {
  90         case 0:
  91             i = float_round_nearest_even;
  92             break;
  93         case 1:
  94             i = float_round_to_zero;
  95             break;
  96         case 2:
  97             i = float_round_up;
  98             break;
  99         case 3:
 100             i = float_round_down;
 101             break;
 102         default: /* 100 and 101 not implement */
 103             cpu_abort(CPU(cpu), "Unsupported UniCore-F64 round mode");
 104         }
 105         set_float_rounding_mode(i, &env->ucf64.fp_status);
 106     }
 107
 108     i = ucf64_exceptbits_to_host(UCF64_FPSCR_TRAPEN(val));
 109     set_float_exception_flags(i, &env->ucf64.fp_status);
 110 }
 111
 112 float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env)
 113 {
 114     return float32_add(a, b, &env->ucf64.fp_status);
 115 }
 116
 117 float64 HELPER(ucf64_addd)(float64 a, float64 b, CPUUniCore32State *env)
 118 {
 119     return float64_add(a, b, &env->ucf64.fp_status);
 120 }
 121
 122 float32 HELPER(ucf64_subs)(float32 a, float32 b, CPUUniCore32State *env)
 123 {
 124     return float32_sub(a, b, &env->ucf64.fp_status);
 125 }
 126
 127 float64 HELPER(ucf64_subd)(float64 a, float64 b, CPUUniCore32State *env)
 128 {
 129     return float64_sub(a, b, &env->ucf64.fp_status);
 130 }
 131
 132 float32 HELPER(ucf64_muls)(float32 a, float32 b, CPUUniCore32State *env)
 133 {
 134     return float32_mul(a, b, &env->ucf64.fp_status);
 135 }
 136
 137 float64 HELPER(ucf64_muld)(float64 a, float64 b, CPUUniCore32State *env)
 138 {
 139     return float64_mul(a, b, &env->ucf64.fp_status);
 140 }
 141
 142 float32 HELPER(ucf64_divs)(float32 a, float32 b, CPUUniCore32State *env)
 143 {
 144     return float32_div(a, b, &env->ucf64.fp_status);
 145 }
 146
 147 float64 HELPER(ucf64_divd)(float64 a, float64 b, CPUUniCore32State *env)
 148 {
 149     return float64_div(a, b, &env->ucf64.fp_status);
 150 }
 151
 152 float32 HELPER(ucf64_negs)(float32 a)
 153 {
 154     return float32_chs(a);
 155 }
 156
 157 float64 HELPER(ucf64_negd)(float64 a)
 158 {
 159     return float64_chs(a);
 160 }
 161
 162 float32 HELPER(ucf64_abss)(float32 a)
 163 {
 164     return float32_abs(a);
 165 }
 166
 167 float64 HELPER(ucf64_absd)(float64 a)
 168 {
 169     return float64_abs(a);
 170 }
 171
 172 void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c,
 173         CPUUniCore32State *env)
 174 {
 175     int flag;
 176     flag = float32_compare_quiet(a, b, &env->ucf64.fp_status);
 177     env->CF = 0;
 178     switch (c & 0x7) {
 179     case 0: /* F */
 180         break;
 181     case 1: /* UN */
 182         if (flag == 2) {
 183             env->CF = 1;
 184         }
 185         break;
 186     case 2: /* EQ */
 187         if (flag == 0) {
 188             env->CF = 1;
 189         }
 190         break;
 191     case 3: /* UEQ */
 192         if ((flag == 0) || (flag == 2)) {
 193             env->CF = 1;
 194         }
 195         break;
 196     case 4: /* OLT */
 197         if (flag == -1) {
 198             env->CF = 1;
 199         }
 200         break;
 201     case 5: /* ULT */
 202         if ((flag == -1) || (flag == 2)) {
 203             env->CF = 1;
 204         }
 205         break;
 206     case 6: /* OLE */
 207         if ((flag == -1) || (flag == 0)) {
 208             env->CF = 1;
 209         }
 210         break;
 211     case 7: /* ULE */
 212         if (flag != 1) {
 213             env->CF = 1;
 214         }
 215         break;
 216     }
 217     env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29)
 218                     | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff);
 219 }
 220
 221 void HELPER(ucf64_cmpd)(float64 a, float64 b, uint32_t c,
 222         CPUUniCore32State *env)
 223 {
 224     int flag;
 225     flag = float64_compare_quiet(a, b, &env->ucf64.fp_status);
 226     env->CF = 0;
 227     switch (c & 0x7) {
 228     case 0: /* F */
 229         break;
 230     case 1: /* UN */
 231         if (flag == 2) {
 232             env->CF = 1;
 233         }
 234         break;
 235     case 2: /* EQ */
 236         if (flag == 0) {
 237             env->CF = 1;
 238         }
 239         break;
 240     case 3: /* UEQ */
 241         if ((flag == 0) || (flag == 2)) {
 242             env->CF = 1;
 243         }
 244         break;
 245     case 4: /* OLT */
 246         if (flag == -1) {
 247             env->CF = 1;
 248         }
 249         break;
 250     case 5: /* ULT */
 251         if ((flag == -1) || (flag == 2)) {
 252             env->CF = 1;
 253         }
 254         break;
 255     case 6: /* OLE */
 256         if ((flag == -1) || (flag == 0)) {
 257             env->CF = 1;
 258         }
 259         break;
 260     case 7: /* ULE */
 261         if (flag != 1) {
 262             env->CF = 1;
 263         }
 264         break;
 265     }
 266     env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29)
 267                     | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff);
 268 }
 269
 270 /* Helper routines to perform bitwise copies between float and int.  */
 271 static inline float32 ucf64_itos(uint32_t i)
 272 {
 273     union {
 274         uint32_t i;
 275         float32 s;
 276     } v;
 277
 278     v.i = i;
 279     return v.s;
 280 }
 281
 282 static inline uint32_t ucf64_stoi(float32 s)
 283 {
 284     union {
 285         uint32_t i;
 286         float32 s;
 287     } v;
 288
 289     v.s = s;
 290     return v.i;
 291 }
 292
 293 static inline float64 ucf64_itod(uint64_t i)
 294 {
 295     union {
 296         uint64_t i;
 297         float64 d;
 298     } v;
 299
 300     v.i = i;
 301     return v.d;
 302 }
 303
 304 static inline uint64_t ucf64_dtoi(float64 d)
 305 {
 306     union {
 307         uint64_t i;
 308         float64 d;
 309     } v;
 310
 311     v.d = d;
 312     return v.i;
 313 }
 314
 315 /* Integer to float conversion.  */
 316 float32 HELPER(ucf64_si2sf)(float32 x, CPUUniCore32State *env)
 317 {
 318     return int32_to_float32(ucf64_stoi(x), &env->ucf64.fp_status);
 319 }
 320
 321 float64 HELPER(ucf64_si2df)(float32 x, CPUUniCore32State *env)
 322 {
 323     return int32_to_float64(ucf64_stoi(x), &env->ucf64.fp_status);
 324 }
 325
 326 /* Float to integer conversion.  */
 327 float32 HELPER(ucf64_sf2si)(float32 x, CPUUniCore32State *env)
 328 {
 329     return ucf64_itos(float32_to_int32(x, &env->ucf64.fp_status));
 330 }
 331
 332 float32 HELPER(ucf64_df2si)(float64 x, CPUUniCore32State *env)
 333 {
 334     return ucf64_itos(float64_to_int32(x, &env->ucf64.fp_status));
 335 }
 336
 337 /* floating point conversion */
 338 float64 HELPER(ucf64_sf2df)(float32 x, CPUUniCore32State *env)
 339 {
 340     return float32_to_float64(x, &env->ucf64.fp_status);
 341 }
 342
 343 float32 HELPER(ucf64_df2sf)(float64 x, CPUUniCore32State *env)
 344 {
 345     return float64_to_float32(x, &env->ucf64.fp_status);
 346 }