target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "cpu.h"
  23 #include "exec/memory.h"
  24 #include "qemu/host-utils.h"
  25 #include "exec/helper-proto.h"
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #include "exec/address-spaces.h"
  29 #ifdef CONFIG_KVM
  30 #include <linux/kvm.h>
  31 #endif
  32 #include "exec/cpu_ldst.h"
  33 #include "hw/watchdog/wdt_diag288.h"
  34
  35 #if !defined(CONFIG_USER_ONLY)
  36 #include "sysemu/cpus.h"
  37 #include "sysemu/sysemu.h"
  38 #include "hw/s390x/ebcdic.h"
  39 #include "hw/s390x/ipl.h"
  40 #endif
  41
  42 /* #define DEBUG_HELPER */
  43 #ifdef DEBUG_HELPER
  44 #define HELPER_LOG(x...) qemu_log(x)
  45 #else
  46 #define HELPER_LOG(x...)
  47 #endif
  48
  49 /* Raise an exception dynamically from a helper function.  */
  50 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  51                                      uintptr_t retaddr)
  52 {
  53     CPUState *cs = CPU(s390_env_get_cpu(env));
  54     int t;
  55
  56     cs->exception_index = EXCP_PGM;
  57     env->int_pgm_code = excp;
  58
  59     /* Use the (ultimate) callers address to find the insn that trapped.  */
  60     cpu_restore_state(cs, retaddr);
  61
  62     /* Advance past the insn.  */
  63     t = cpu_ldub_code(env, env->psw.addr);
  64     env->int_pgm_ilen = t = get_ilen(t);
  65     env->psw.addr += t;
  66
  67     cpu_loop_exit(cs);
  68 }
  69
  70 /* Raise an exception statically from a TB.  */
  71 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  72 {
  73     CPUState *cs = CPU(s390_env_get_cpu(env));
  74
  75     HELPER_LOG("%s: exception %d\n", __func__, excp);
  76     cs->exception_index = excp;
  77     cpu_loop_exit(cs);
  78 }
  79
  80 #ifndef CONFIG_USER_ONLY
  81
  82 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  83 {
  84     S390CPU *cpu = s390_env_get_cpu(env);
  85
  86     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  87                   env->psw.addr);
  88
  89     if (kvm_enabled()) {
  90 #ifdef CONFIG_KVM
  91         struct kvm_s390_irq irq = {
  92             .type = KVM_S390_PROGRAM_INT,
  93             .u.pgm.code = code,
  94         };
  95
  96         kvm_s390_vcpu_interrupt(cpu, &irq);
  97 #endif
  98     } else {
  99         CPUState *cs = CPU(cpu);
 100
 101         env->int_pgm_code = code;
 102         env->int_pgm_ilen = ilen;
 103         cs->exception_index = EXCP_PGM;
 104         cpu_loop_exit(cs);
 105     }
 106 }
 107
 108 /* SCLP service call */
 109 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 110 {
 111     int r = sclp_service_call(env, r1, r2);
 112     if (r < 0) {
 113         program_interrupt(env, -r, 4);
 114         return 0;
 115     }
 116     return r;
 117 }
 118
 119 #ifndef CONFIG_USER_ONLY
 120 static int modified_clear_reset(S390CPU *cpu)
 121 {
 122     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 123     CPUState *t;
 124
 125     pause_all_vcpus();
 126     cpu_synchronize_all_states();
 127     CPU_FOREACH(t) {
 128         run_on_cpu(t, s390_do_cpu_full_reset, t);
 129     }
 130     s390_cmma_reset();
 131     subsystem_reset();
 132     s390_crypto_reset();
 133     scc->load_normal(CPU(cpu));
 134     cpu_synchronize_all_post_reset();
 135     resume_all_vcpus();
 136     return 0;
 137 }
 138
 139 static int load_normal_reset(S390CPU *cpu)
 140 {
 141     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 142     CPUState *t;
 143
 144     pause_all_vcpus();
 145     cpu_synchronize_all_states();
 146     CPU_FOREACH(t) {
 147         run_on_cpu(t, s390_do_cpu_reset, t);
 148     }
 149     s390_cmma_reset();
 150     subsystem_reset();
 151     scc->initial_cpu_reset(CPU(cpu));
 152     scc->load_normal(CPU(cpu));
 153     cpu_synchronize_all_post_reset();
 154     resume_all_vcpus();
 155     return 0;
 156 }
 157
 158 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 159 {
 160     uint64_t func = env->regs[r1];
 161     uint64_t timeout = env->regs[r1 + 1];
 162     uint64_t action = env->regs[r3];
 163     Object *obj;
 164     DIAG288State *diag288;
 165     DIAG288Class *diag288_class;
 166
 167     if (r1 % 2 || action != 0) {
 168         return -1;
 169     }
 170
 171     /* Timeout must be more than 15 seconds except for timer deletion */
 172     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 173         return -1;
 174     }
 175
 176     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 177     if (!obj) {
 178         return -1;
 179     }
 180
 181     diag288 = DIAG288(obj);
 182     diag288_class = DIAG288_GET_CLASS(diag288);
 183     return diag288_class->handle_timer(diag288, func, timeout);
 184 }
 185
 186 #define DIAG_308_RC_OK              0x0001
 187 #define DIAG_308_RC_NO_CONF         0x0102
 188 #define DIAG_308_RC_INVALID         0x0402
 189
 190 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 191 {
 192     uint64_t addr =  env->regs[r1];
 193     uint64_t subcode = env->regs[r3];
 194     IplParameterBlock *iplb;
 195
 196     if (env->psw.mask & PSW_MASK_PSTATE) {
 197         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 198         return;
 199     }
 200
 201     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 202         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 203         return;
 204     }
 205
 206     switch (subcode) {
 207     case 0:
 208         modified_clear_reset(s390_env_get_cpu(env));
 209         if (tcg_enabled()) {
 210             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 211         }
 212         break;
 213     case 1:
 214         load_normal_reset(s390_env_get_cpu(env));
 215         if (tcg_enabled()) {
 216             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 217         }
 218         break;
 219     case 3:
 220         s390_reipl_request();
 221         if (tcg_enabled()) {
 222             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 223         }
 224         break;
 225     case 5:
 226         if ((r1 & 1) || (addr & 0x0fffULL)) {
 227             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 228             return;
 229         }
 230         if (!address_space_access_valid(&address_space_memory, addr,
 231                                         sizeof(IplParameterBlock), false)) {
 232             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 233             return;
 234         }
 235         iplb = g_malloc0(sizeof(IplParameterBlock));
 236         cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
 237         if (!iplb_valid_len(iplb)) {
 238             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 239             goto out;
 240         }
 241
 242         cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
 243
 244         if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
 245             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 246             goto out;
 247         }
 248
 249         s390_ipl_update_diag308(iplb);
 250         env->regs[r1 + 1] = DIAG_308_RC_OK;
 251 out:
 252         g_free(iplb);
 253         return;
 254     case 6:
 255         if ((r1 & 1) || (addr & 0x0fffULL)) {
 256             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 257             return;
 258         }
 259         if (!address_space_access_valid(&address_space_memory, addr,
 260                                         sizeof(IplParameterBlock), true)) {
 261             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 262             return;
 263         }
 264         iplb = s390_ipl_get_iplb();
 265         if (iplb) {
 266             cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
 267             env->regs[r1 + 1] = DIAG_308_RC_OK;
 268         } else {
 269             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 270         }
 271         return;
 272     default:
 273         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 274         break;
 275     }
 276 }
 277 #endif
 278
 279 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 280 {
 281     uint64_t r;
 282
 283     switch (num) {
 284     case 0x500:
 285         /* KVM hypercall */
 286         r = s390_virtio_hypercall(env);
 287         break;
 288     case 0x44:
 289         /* yield */
 290         r = 0;
 291         break;
 292     case 0x308:
 293         /* ipl */
 294         handle_diag_308(env, r1, r3);
 295         r = 0;
 296         break;
 297     default:
 298         r = -1;
 299         break;
 300     }
 301
 302     if (r) {
 303         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 304     }
 305 }
 306
 307 /* Set Prefix */
 308 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 309 {
 310     CPUState *cs = CPU(s390_env_get_cpu(env));
 311     uint32_t prefix = a1 & 0x7fffe000;
 312
 313     env->psa = prefix;
 314     HELPER_LOG("prefix: %#x\n", prefix);
 315     tlb_flush_page(cs, 0);
 316     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 317 }
 318
 319 /* Store Clock */
 320 uint64_t HELPER(stck)(CPUS390XState *env)
 321 {
 322     uint64_t time;
 323
 324     time = env->tod_offset +
 325         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 326
 327     return time;
 328 }
 329
 330 /* Set Clock Comparator */
 331 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 332 {
 333     if (time == -1ULL) {
 334         return;
 335     }
 336
 337     env->ckc = time;
 338
 339     /* difference between origins */
 340     time -= env->tod_offset;
 341
 342     /* nanoseconds */
 343     time = tod2time(time);
 344
 345     timer_mod(env->tod_timer, env->tod_basetime + time);
 346 }
 347
 348 /* Store Clock Comparator */
 349 uint64_t HELPER(stckc)(CPUS390XState *env)
 350 {
 351     return env->ckc;
 352 }
 353
 354 /* Set CPU Timer */
 355 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 356 {
 357     if (time == -1ULL) {
 358         return;
 359     }
 360
 361     /* nanoseconds */
 362     time = tod2time(time);
 363
 364     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 365
 366     timer_mod(env->cpu_timer, env->cputm);
 367 }
 368
 369 /* Store CPU Timer */
 370 uint64_t HELPER(stpt)(CPUS390XState *env)
 371 {
 372     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 373 }
 374
 375 /* Store System Information */
 376 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 377                       uint64_t r0, uint64_t r1)
 378 {
 379     int cc = 0;
 380     int sel1, sel2;
 381
 382     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 383         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 384         /* valid function code, invalid reserved bits */
 385         program_interrupt(env, PGM_SPECIFICATION, 2);
 386     }
 387
 388     sel1 = r0 & STSI_R0_SEL1_MASK;
 389     sel2 = r1 & STSI_R1_SEL2_MASK;
 390
 391     /* XXX: spec exception if sysib is not 4k-aligned */
 392
 393     switch (r0 & STSI_LEVEL_MASK) {
 394     case STSI_LEVEL_1:
 395         if ((sel1 == 1) && (sel2 == 1)) {
 396             /* Basic Machine Configuration */
 397             struct sysib_111 sysib;
 398
 399             memset(&sysib, 0, sizeof(sysib));
 400             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 401             /* same as machine type number in STORE CPU ID */
 402             ebcdic_put(sysib.type, "QEMU", 4);
 403             /* same as model number in STORE CPU ID */
 404             ebcdic_put(sysib.model, "QEMU            ", 16);
 405             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 406             ebcdic_put(sysib.plant, "QEMU", 4);
 407             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 408         } else if ((sel1 == 2) && (sel2 == 1)) {
 409             /* Basic Machine CPU */
 410             struct sysib_121 sysib;
 411
 412             memset(&sysib, 0, sizeof(sysib));
 413             /* XXX make different for different CPUs? */
 414             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 415             ebcdic_put(sysib.plant, "QEMU", 4);
 416             stw_p(&sysib.cpu_addr, env->cpu_num);
 417             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 418         } else if ((sel1 == 2) && (sel2 == 2)) {
 419             /* Basic Machine CPUs */
 420             struct sysib_122 sysib;
 421
 422             memset(&sysib, 0, sizeof(sysib));
 423             stl_p(&sysib.capability, 0x443afc29);
 424             /* XXX change when SMP comes */
 425             stw_p(&sysib.total_cpus, 1);
 426             stw_p(&sysib.active_cpus, 1);
 427             stw_p(&sysib.standby_cpus, 0);
 428             stw_p(&sysib.reserved_cpus, 0);
 429             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 430         } else {
 431             cc = 3;
 432         }
 433         break;
 434     case STSI_LEVEL_2:
 435         {
 436             if ((sel1 == 2) && (sel2 == 1)) {
 437                 /* LPAR CPU */
 438                 struct sysib_221 sysib;
 439
 440                 memset(&sysib, 0, sizeof(sysib));
 441                 /* XXX make different for different CPUs? */
 442                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 443                 ebcdic_put(sysib.plant, "QEMU", 4);
 444                 stw_p(&sysib.cpu_addr, env->cpu_num);
 445                 stw_p(&sysib.cpu_id, 0);
 446                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 447             } else if ((sel1 == 2) && (sel2 == 2)) {
 448                 /* LPAR CPUs */
 449                 struct sysib_222 sysib;
 450
 451                 memset(&sysib, 0, sizeof(sysib));
 452                 stw_p(&sysib.lpar_num, 0);
 453                 sysib.lcpuc = 0;
 454                 /* XXX change when SMP comes */
 455                 stw_p(&sysib.total_cpus, 1);
 456                 stw_p(&sysib.conf_cpus, 1);
 457                 stw_p(&sysib.standby_cpus, 0);
 458                 stw_p(&sysib.reserved_cpus, 0);
 459                 ebcdic_put(sysib.name, "QEMU    ", 8);
 460                 stl_p(&sysib.caf, 1000);
 461                 stw_p(&sysib.dedicated_cpus, 0);
 462                 stw_p(&sysib.shared_cpus, 0);
 463                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 464             } else {
 465                 cc = 3;
 466             }
 467             break;
 468         }
 469     case STSI_LEVEL_3:
 470         {
 471             if ((sel1 == 2) && (sel2 == 2)) {
 472                 /* VM CPUs */
 473                 struct sysib_322 sysib;
 474
 475                 memset(&sysib, 0, sizeof(sysib));
 476                 sysib.count = 1;
 477                 /* XXX change when SMP comes */
 478                 stw_p(&sysib.vm[0].total_cpus, 1);
 479                 stw_p(&sysib.vm[0].conf_cpus, 1);
 480                 stw_p(&sysib.vm[0].standby_cpus, 0);
 481                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 482                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 483                 stl_p(&sysib.vm[0].caf, 1000);
 484                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 485                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 486             } else {
 487                 cc = 3;
 488             }
 489             break;
 490         }
 491     case STSI_LEVEL_CURRENT:
 492         env->regs[0] = STSI_LEVEL_3;
 493         break;
 494     default:
 495         cc = 3;
 496         break;
 497     }
 498
 499     return cc;
 500 }
 501
 502 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 503                       uint64_t cpu_addr)
 504 {
 505     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 506
 507     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 508                __func__, order_code, r1, cpu_addr);
 509
 510     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 511        as parameter (input). Status (output) is always R1. */
 512
 513     switch (order_code) {
 514     case SIGP_SET_ARCH:
 515         /* switch arch */
 516         break;
 517     case SIGP_SENSE:
 518         /* enumerate CPU status */
 519         if (cpu_addr) {
 520             /* XXX implement when SMP comes */
 521             return 3;
 522         }
 523         env->regs[r1] &= 0xffffffff00000000ULL;
 524         cc = 1;
 525         break;
 526 #if !defined(CONFIG_USER_ONLY)
 527     case SIGP_RESTART:
 528         qemu_system_reset_request();
 529         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 530         break;
 531     case SIGP_STOP:
 532         qemu_system_shutdown_request();
 533         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 534         break;
 535 #endif
 536     default:
 537         /* unknown sigp */
 538         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 539         cc = SIGP_CC_NOT_OPERATIONAL;
 540     }
 541
 542     return cc;
 543 }
 544 #endif
 545
 546 #ifndef CONFIG_USER_ONLY
 547 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 548 {
 549     S390CPU *cpu = s390_env_get_cpu(env);
 550     ioinst_handle_xsch(cpu, r1);
 551 }
 552
 553 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 554 {
 555     S390CPU *cpu = s390_env_get_cpu(env);
 556     ioinst_handle_csch(cpu, r1);
 557 }
 558
 559 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 560 {
 561     S390CPU *cpu = s390_env_get_cpu(env);
 562     ioinst_handle_hsch(cpu, r1);
 563 }
 564
 565 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 566 {
 567     S390CPU *cpu = s390_env_get_cpu(env);
 568     ioinst_handle_msch(cpu, r1, inst >> 16);
 569 }
 570
 571 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 572 {
 573     S390CPU *cpu = s390_env_get_cpu(env);
 574     ioinst_handle_rchp(cpu, r1);
 575 }
 576
 577 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 578 {
 579     S390CPU *cpu = s390_env_get_cpu(env);
 580     ioinst_handle_rsch(cpu, r1);
 581 }
 582
 583 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 584 {
 585     S390CPU *cpu = s390_env_get_cpu(env);
 586     ioinst_handle_ssch(cpu, r1, inst >> 16);
 587 }
 588
 589 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 590 {
 591     S390CPU *cpu = s390_env_get_cpu(env);
 592     ioinst_handle_stsch(cpu, r1, inst >> 16);
 593 }
 594
 595 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 596 {
 597     S390CPU *cpu = s390_env_get_cpu(env);
 598     ioinst_handle_tsch(cpu, r1, inst >> 16);
 599 }
 600
 601 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 602 {
 603     S390CPU *cpu = s390_env_get_cpu(env);
 604     ioinst_handle_chsc(cpu, inst >> 16);
 605 }
 606 #endif
 607
 608 #ifndef CONFIG_USER_ONLY
 609 void HELPER(per_check_exception)(CPUS390XState *env)
 610 {
 611     CPUState *cs = CPU(s390_env_get_cpu(env));
 612
 613     if (env->per_perc_atmid) {
 614         env->int_pgm_code = PGM_PER;
 615         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 616
 617         cs->exception_index = EXCP_PGM;
 618         cpu_loop_exit(cs);
 619     }
 620 }
 621
 622 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 623 {
 624     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 625         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 626             || get_per_in_range(env, to)) {
 627             env->per_address = from;
 628             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 629         }
 630     }
 631 }
 632
 633 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 634 {
 635     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 636         env->per_address = addr;
 637         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 638
 639         /* If the instruction has to be nullified, trigger the
 640            exception immediately. */
 641         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 642             CPUState *cs = CPU(s390_env_get_cpu(env));
 643
 644             env->int_pgm_code = PGM_PER;
 645             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 646
 647             cs->exception_index = EXCP_PGM;
 648             cpu_loop_exit(cs);
 649         }
 650     }
 651 }
 652 #endif