include/qemu/osdep.h: Don't include qapi/error.h
[qemu/ar7.git] / hw / misc / macio / macio.c
blob6e94e3b7cf81ba484488615239b79615e12a6bdf
1 /*
2 * PowerMac MacIO device emulation
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/hw.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/pci/pci.h"
30 #include "hw/ppc/mac_dbdma.h"
31 #include "hw/char/escc.h"
33 #define TYPE_MACIO "macio"
34 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
36 typedef struct MacIOState
38 /*< private >*/
39 PCIDevice parent;
40 /*< public >*/
42 MemoryRegion bar;
43 CUDAState cuda;
44 void *dbdma;
45 MemoryRegion *pic_mem;
46 MemoryRegion *escc_mem;
47 uint64_t frequency;
48 } MacIOState;
50 #define OLDWORLD_MACIO(obj) \
51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
53 typedef struct OldWorldMacIOState {
54 /*< private >*/
55 MacIOState parent_obj;
56 /*< public >*/
58 qemu_irq irqs[5];
60 MacIONVRAMState nvram;
61 MACIOIDEState ide[2];
62 } OldWorldMacIOState;
64 #define NEWWORLD_MACIO(obj) \
65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
67 typedef struct NewWorldMacIOState {
68 /*< private >*/
69 MacIOState parent_obj;
70 /*< public >*/
71 qemu_irq irqs[5];
72 MACIOIDEState ide[2];
73 } NewWorldMacIOState;
76 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
77 * while the other one is the normal, current ESCC interface.
79 * The magic below creates memory aliases to spawn the escc-legacy device
80 * purely by rerouting the respective registers to our escc region. This
81 * works because the only difference between the two memory regions is the
82 * register layout, not their semantics.
84 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
86 static void macio_escc_legacy_setup(MacIOState *macio_state)
88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
89 MemoryRegion *bar = &macio_state->bar;
90 int i;
91 static const int maps[] = {
92 0x00, 0x00,
93 0x02, 0x20,
94 0x04, 0x10,
95 0x06, 0x30,
96 0x08, 0x40,
97 0x0A, 0x50,
98 0x60, 0x60,
99 0x70, 0x70,
100 0x80, 0x70,
101 0x90, 0x80,
102 0xA0, 0x90,
103 0xB0, 0xA0,
104 0xC0, 0xB0,
105 0xD0, 0xC0,
106 0xE0, 0xD0,
107 0xF0, 0xE0,
110 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
111 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
112 MemoryRegion *port = g_new(MemoryRegion, 1);
113 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
114 macio_state->escc_mem, maps[i+1], 0x2);
115 memory_region_add_subregion(escc_legacy, maps[i], port);
118 memory_region_add_subregion(bar, 0x12000, escc_legacy);
121 static void macio_bar_setup(MacIOState *macio_state)
123 MemoryRegion *bar = &macio_state->bar;
125 if (macio_state->escc_mem) {
126 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
127 macio_escc_legacy_setup(macio_state);
131 static void macio_common_realize(PCIDevice *d, Error **errp)
133 MacIOState *s = MACIO(d);
134 SysBusDevice *sysbus_dev;
135 Error *err = NULL;
136 MemoryRegion *dbdma_mem;
138 s->dbdma = DBDMA_init(&dbdma_mem);
139 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
141 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
142 if (err) {
143 error_propagate(errp, err);
144 return;
146 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
147 memory_region_add_subregion(&s->bar, 0x16000,
148 sysbus_mmio_get_region(sysbus_dev, 0));
150 macio_bar_setup(s);
151 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
154 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
155 qemu_irq irq0, qemu_irq irq1, int dmaid,
156 Error **errp)
158 SysBusDevice *sysbus_dev;
160 sysbus_dev = SYS_BUS_DEVICE(ide);
161 sysbus_connect_irq(sysbus_dev, 0, irq0);
162 sysbus_connect_irq(sysbus_dev, 1, irq1);
163 macio_ide_register_dma(ide, s->dbdma, dmaid);
164 object_property_set_bool(OBJECT(ide), true, "realized", errp);
167 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
169 MacIOState *s = MACIO(d);
170 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
171 Error *err = NULL;
172 SysBusDevice *sysbus_dev;
173 int i;
174 int cur_irq = 0;
176 macio_common_realize(d, &err);
177 if (err) {
178 error_propagate(errp, err);
179 return;
182 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
183 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
185 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
186 if (err) {
187 error_propagate(errp, err);
188 return;
190 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
191 memory_region_add_subregion(&s->bar, 0x60000,
192 sysbus_mmio_get_region(sysbus_dev, 0));
193 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
195 if (s->pic_mem) {
196 /* Heathrow PIC */
197 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
200 /* IDE buses */
201 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
202 qemu_irq irq0 = os->irqs[cur_irq++];
203 qemu_irq irq1 = os->irqs[cur_irq++];
205 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
206 if (err) {
207 error_propagate(errp, err);
208 return;
213 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
214 int index)
216 gchar *name;
218 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
219 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
220 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
221 &ide->mem);
222 name = g_strdup_printf("ide[%i]", index);
223 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
224 g_free(name);
227 static void macio_oldworld_init(Object *obj)
229 MacIOState *s = MACIO(obj);
230 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
231 DeviceState *dev;
232 int i;
234 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
236 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
237 dev = DEVICE(&os->nvram);
238 qdev_prop_set_uint32(dev, "size", 0x2000);
239 qdev_prop_set_uint32(dev, "it_shift", 4);
241 for (i = 0; i < 2; i++) {
242 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
246 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
247 unsigned size)
251 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
253 uint32_t value = 0;
254 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
255 uint64_t kltime;
257 kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
258 kltime = muldiv64(kltime, 18432000, 1048575);
260 switch (addr) {
261 case 0x38:
262 value = kltime;
263 break;
264 case 0x3c:
265 value = kltime >> 32;
266 break;
269 return value;
272 static const MemoryRegionOps timer_ops = {
273 .read = timer_read,
274 .write = timer_write,
275 .endianness = DEVICE_LITTLE_ENDIAN,
278 static void macio_newworld_realize(PCIDevice *d, Error **errp)
280 MacIOState *s = MACIO(d);
281 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
282 Error *err = NULL;
283 SysBusDevice *sysbus_dev;
284 MemoryRegion *timer_memory = NULL;
285 int i;
286 int cur_irq = 0;
288 macio_common_realize(d, &err);
289 if (err) {
290 error_propagate(errp, err);
291 return;
294 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
295 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
297 if (s->pic_mem) {
298 /* OpenPIC */
299 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
302 /* IDE buses */
303 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
304 qemu_irq irq0 = ns->irqs[cur_irq++];
305 qemu_irq irq1 = ns->irqs[cur_irq++];
307 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
308 if (err) {
309 error_propagate(errp, err);
310 return;
314 /* Timer */
315 timer_memory = g_new(MemoryRegion, 1);
316 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
317 0x1000);
318 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
321 static void macio_newworld_init(Object *obj)
323 MacIOState *s = MACIO(obj);
324 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
325 int i;
327 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
329 for (i = 0; i < 2; i++) {
330 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
334 static void macio_instance_init(Object *obj)
336 MacIOState *s = MACIO(obj);
338 memory_region_init(&s->bar, obj, "macio", 0x80000);
340 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
341 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
342 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
345 static const VMStateDescription vmstate_macio_oldworld = {
346 .name = "macio-oldworld",
347 .version_id = 0,
348 .minimum_version_id = 0,
349 .fields = (VMStateField[]) {
350 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
351 VMSTATE_END_OF_LIST()
355 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
357 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
358 DeviceClass *dc = DEVICE_CLASS(oc);
360 pdc->realize = macio_oldworld_realize;
361 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
362 dc->vmsd = &vmstate_macio_oldworld;
365 static const VMStateDescription vmstate_macio_newworld = {
366 .name = "macio-newworld",
367 .version_id = 0,
368 .minimum_version_id = 0,
369 .fields = (VMStateField[]) {
370 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
371 VMSTATE_END_OF_LIST()
375 static void macio_newworld_class_init(ObjectClass *oc, void *data)
377 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
378 DeviceClass *dc = DEVICE_CLASS(oc);
380 pdc->realize = macio_newworld_realize;
381 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
382 dc->vmsd = &vmstate_macio_newworld;
385 static Property macio_properties[] = {
386 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
387 DEFINE_PROP_END_OF_LIST()
390 static void macio_class_init(ObjectClass *klass, void *data)
392 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
393 DeviceClass *dc = DEVICE_CLASS(klass);
395 k->vendor_id = PCI_VENDOR_ID_APPLE;
396 k->class_id = PCI_CLASS_OTHERS << 8;
397 dc->props = macio_properties;
398 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
401 static const TypeInfo macio_oldworld_type_info = {
402 .name = TYPE_OLDWORLD_MACIO,
403 .parent = TYPE_MACIO,
404 .instance_size = sizeof(OldWorldMacIOState),
405 .instance_init = macio_oldworld_init,
406 .class_init = macio_oldworld_class_init,
409 static const TypeInfo macio_newworld_type_info = {
410 .name = TYPE_NEWWORLD_MACIO,
411 .parent = TYPE_MACIO,
412 .instance_size = sizeof(NewWorldMacIOState),
413 .instance_init = macio_newworld_init,
414 .class_init = macio_newworld_class_init,
417 static const TypeInfo macio_type_info = {
418 .name = TYPE_MACIO,
419 .parent = TYPE_PCI_DEVICE,
420 .instance_size = sizeof(MacIOState),
421 .instance_init = macio_instance_init,
422 .abstract = true,
423 .class_init = macio_class_init,
426 static void macio_register_types(void)
428 type_register_static(&macio_type_info);
429 type_register_static(&macio_oldworld_type_info);
430 type_register_static(&macio_newworld_type_info);
433 type_init(macio_register_types)
435 void macio_init(PCIDevice *d,
436 MemoryRegion *pic_mem,
437 MemoryRegion *escc_mem)
439 MacIOState *macio_state = MACIO(d);
441 macio_state->pic_mem = pic_mem;
442 macio_state->escc_mem = escc_mem;
443 /* Note: this code is strongly inspirated from the corresponding code
444 in PearPC */
445 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
446 macio_state->frequency);
448 qdev_init_nofail(DEVICE(d));