hw/ppc_oldworld.c

   1
   2 /*
   3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4  *
   5  * Copyright (c) 2004-2007 Fabrice Bellard
   6  * Copyright (c) 2007 Jocelyn Mayer
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26 #include "hw.h"
  27 #include "ppc.h"
  28 #include "ppc_mac.h"
  29 #include "adb.h"
  30 #include "mac_dbdma.h"
  31 #include "nvram.h"
  32 #include "pc.h"
  33 #include "sysemu.h"
  34 #include "net.h"
  35 #include "isa.h"
  36 #include "pci.h"
  37 #include "boards.h"
  38 #include "fw_cfg.h"
  39 #include "escc.h"
  40 #include "ide.h"
  41 #include "loader.h"
  42 #include "elf.h"
  43 #include "kvm.h"
  44 #include "kvm_ppc.h"
  45 #include "blockdev.h"
  46 #include "exec-memory.h"
  47
  48 #define MAX_IDE_BUS 2
  49 #define CFG_ADDR 0xf0000510
  50
  51 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
  52 {
  53     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  54     return 0;
  55 }
  56
  57
  58 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  59 {
  60     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  61 }
  62
  63 static target_phys_addr_t round_page(target_phys_addr_t addr)
  64 {
  65     return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
  66 }
  67
  68 static void ppc_heathrow_reset(void *opaque)
  69 {
  70     CPUPPCState *env = opaque;
  71
  72     cpu_state_reset(env);
  73 }
  74
  75 static void ppc_heathrow_init (ram_addr_t ram_size,
  76                                const char *boot_device,
  77                                const char *kernel_filename,
  78                                const char *kernel_cmdline,
  79                                const char *initrd_filename,
  80                                const char *cpu_model)
  81 {
  82     MemoryRegion *sysmem = get_system_memory();
  83     CPUPPCState *env = NULL;
  84     char *filename;
  85     qemu_irq *pic, **heathrow_irqs;
  86     int linux_boot, i;
  87     MemoryRegion *ram = g_new(MemoryRegion, 1);
  88     MemoryRegion *bios = g_new(MemoryRegion, 1);
  89     uint32_t kernel_base, initrd_base, cmdline_base = 0;
  90     int32_t kernel_size, initrd_size;
  91     PCIBus *pci_bus;
  92     MacIONVRAMState *nvr;
  93     int bios_size;
  94     MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
  95     MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
  96     uint16_t ppc_boot_device;
  97     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  98     void *fw_cfg;
  99     void *dbdma;
 100
 101     linux_boot = (kernel_filename != NULL);
 102
 103     /* init CPUs */
 104     if (cpu_model == NULL)
 105         cpu_model = "G3";
 106     for (i = 0; i < smp_cpus; i++) {
 107         env = cpu_init(cpu_model);
 108         if (!env) {
 109             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 110             exit(1);
 111         }
 112         /* Set time-base frequency to 16.6 Mhz */
 113         cpu_ppc_tb_init(env,  16600000UL);
 114         qemu_register_reset(ppc_heathrow_reset, env);
 115     }
 116
 117     /* allocate RAM */
 118     if (ram_size > (2047 << 20)) {
 119         fprintf(stderr,
 120                 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
 121                 ((unsigned int)ram_size / (1 << 20)));
 122         exit(1);
 123     }
 124
 125     memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size);
 126     vmstate_register_ram_global(ram);
 127     memory_region_add_subregion(sysmem, 0, ram);
 128
 129     /* allocate and load BIOS */
 130     memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE);
 131     vmstate_register_ram_global(bios);
 132     if (bios_name == NULL)
 133         bios_name = PROM_FILENAME;
 134     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 135     memory_region_set_readonly(bios, true);
 136     memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 137
 138     /* Load OpenBIOS (ELF) */
 139     if (filename) {
 140         bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
 141                              1, ELF_MACHINE, 0);
 142         g_free(filename);
 143     } else {
 144         bios_size = -1;
 145     }
 146     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 147         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 148         exit(1);
 149     }
 150
 151     if (linux_boot) {
 152         uint64_t lowaddr = 0;
 153         int bswap_needed;
 154
 155 #ifdef BSWAP_NEEDED
 156         bswap_needed = 1;
 157 #else
 158         bswap_needed = 0;
 159 #endif
 160         kernel_base = KERNEL_LOAD_ADDR;
 161         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 162                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 163         if (kernel_size < 0)
 164             kernel_size = load_aout(kernel_filename, kernel_base,
 165                                     ram_size - kernel_base, bswap_needed,
 166                                     TARGET_PAGE_SIZE);
 167         if (kernel_size < 0)
 168             kernel_size = load_image_targphys(kernel_filename,
 169                                               kernel_base,
 170                                               ram_size - kernel_base);
 171         if (kernel_size < 0) {
 172             hw_error("qemu: could not load kernel '%s'\n",
 173                       kernel_filename);
 174             exit(1);
 175         }
 176         /* load initrd */
 177         if (initrd_filename) {
 178             initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 179             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 180                                               ram_size - initrd_base);
 181             if (initrd_size < 0) {
 182                 hw_error("qemu: could not load initial ram disk '%s'\n",
 183                          initrd_filename);
 184                 exit(1);
 185             }
 186             cmdline_base = round_page(initrd_base + initrd_size);
 187         } else {
 188             initrd_base = 0;
 189             initrd_size = 0;
 190             cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 191         }
 192         ppc_boot_device = 'm';
 193     } else {
 194         kernel_base = 0;
 195         kernel_size = 0;
 196         initrd_base = 0;
 197         initrd_size = 0;
 198         ppc_boot_device = '\0';
 199         for (i = 0; boot_device[i] != '\0'; i++) {
 200             /* TOFIX: for now, the second IDE channel is not properly
 201              *        used by OHW. The Mac floppy disk are not emulated.
 202              *        For now, OHW cannot boot from the network.
 203              */
 204 #if 0
 205             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 206                 ppc_boot_device = boot_device[i];
 207                 break;
 208             }
 209 #else
 210             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 211                 ppc_boot_device = boot_device[i];
 212                 break;
 213             }
 214 #endif
 215         }
 216         if (ppc_boot_device == '\0') {
 217             fprintf(stderr, "No valid boot device for G3 Beige machine\n");
 218             exit(1);
 219         }
 220     }
 221
 222     /* Register 2 MB of ISA IO space */
 223     isa_mmio_init(0xfe000000, 0x00200000);
 224
 225     /* XXX: we register only 1 output pin for heathrow PIC */
 226     heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 227     heathrow_irqs[0] =
 228         g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
 229     /* Connect the heathrow PIC outputs to the 6xx bus */
 230     for (i = 0; i < smp_cpus; i++) {
 231         switch (PPC_INPUT(env)) {
 232         case PPC_FLAGS_INPUT_6xx:
 233             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 234             heathrow_irqs[i][0] =
 235                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 236             break;
 237         default:
 238             hw_error("Bus model not supported on OldWorld Mac machine\n");
 239         }
 240     }
 241
 242     /* init basic PC hardware */
 243     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 244         hw_error("Only 6xx bus is supported on heathrow machine\n");
 245     }
 246     pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
 247     pci_bus = pci_grackle_init(0xfec00000, pic,
 248                                get_system_memory(),
 249                                get_system_io());
 250     pci_vga_init(pci_bus);
 251
 252     escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
 253                                serial_hds[1], ESCC_CLOCK, 4);
 254     memory_region_init_alias(escc_bar, "escc-bar",
 255                              escc_mem, 0, memory_region_size(escc_mem));
 256
 257     for(i = 0; i < nb_nics; i++)
 258         pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 259
 260
 261     ide_drive_get(hd, MAX_IDE_BUS);
 262
 263     /* First IDE channel is a MAC IDE on the MacIO bus */
 264     dbdma = DBDMA_init(&dbdma_mem);
 265     ide_mem[0] = NULL;
 266     ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
 267
 268     /* Second IDE channel is a CMD646 on the PCI bus */
 269     hd[0] = hd[MAX_IDE_DEVS];
 270     hd[1] = hd[MAX_IDE_DEVS + 1];
 271     hd[3] = hd[2] = NULL;
 272     pci_cmd646_ide_init(pci_bus, hd, 0);
 273
 274     /* cuda also initialize ADB */
 275     cuda_init(&cuda_mem, pic[0x12]);
 276
 277     adb_kbd_init(&adb_bus);
 278     adb_mouse_init(&adb_bus);
 279
 280     nvr = macio_nvram_init(0x2000, 4);
 281     pmac_format_nvram_partition(nvr, 0x2000);
 282
 283     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
 284                dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
 285
 286     if (usb_enabled) {
 287         pci_create_simple(pci_bus, -1, "pci-ohci");
 288     }
 289
 290     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 291         graphic_depth = 15;
 292
 293     /* No PCI init: the BIOS will do it */
 294
 295     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 296     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 297     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 298     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 299     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 300     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 301     if (kernel_cmdline) {
 302         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 303         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 304     } else {
 305         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 306     }
 307     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 308     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 309     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 310
 311     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 312     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 313     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 314
 315     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 316     if (kvm_enabled()) {
 317 #ifdef CONFIG_KVM
 318         uint8_t *hypercall;
 319
 320         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 321         hypercall = g_malloc(16);
 322         kvmppc_get_hypercall(env, hypercall, 16);
 323         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 324         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 325 #endif
 326     } else {
 327         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 328     }
 329
 330     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 331 }
 332
 333 static QEMUMachine heathrow_machine = {
 334     .name = "g3beige",
 335     .desc = "Heathrow based PowerMAC",
 336     .init = ppc_heathrow_init,
 337     .max_cpus = MAX_CPUS,
 338 #ifndef TARGET_PPC64
 339     .is_default = 1,
 340 #endif
 341 };
 342
 343 static void heathrow_machine_init(void)
 344 {
 345     qemu_register_machine(&heathrow_machine);
 346 }
 347
 348 machine_init(heathrow_machine_init);