2 * Simple C functions to supplement the C library
4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
25 #include "qemu-common.h"
26 #include "qemu/cutils.h"
27 #include "qemu/bswap.h"
30 buffer_zero_int(const void *buf
, size_t len
)
32 if (unlikely(len
< 8)) {
33 /* For a very small buffer, simply accumulate all the bytes. */
34 const unsigned char *p
= buf
;
35 const unsigned char *e
= buf
+ len
;
44 /* Otherwise, use the unaligned memory access functions to
45 handle the beginning and end of the buffer, with a couple
46 of loops handling the middle aligned section. */
47 uint64_t t
= ldq_he_p(buf
);
48 const uint64_t *p
= (uint64_t *)(((uintptr_t)buf
+ 8) & -8);
49 const uint64_t *e
= (uint64_t *)(((uintptr_t)buf
+ len
) & -8);
51 for (; p
+ 8 <= e
; p
+= 8) {
52 __builtin_prefetch(p
+ 8);
56 t
= p
[0] | p
[1] | p
[2] | p
[3] | p
[4] | p
[5] | p
[6] | p
[7];
61 t
|= ldq_he_p(buf
+ len
- 8);
67 #if defined(CONFIG_AVX2_OPT) || defined(__SSE2__)
68 /* Do not use push_options pragmas unnecessarily, because clang
69 * does not support them.
71 #ifdef CONFIG_AVX2_OPT
72 #pragma GCC push_options
73 #pragma GCC target("sse2")
75 #include <emmintrin.h>
77 /* Note that each of these vectorized functions require len >= 64. */
80 buffer_zero_sse2(const void *buf
, size_t len
)
82 __m128i t
= _mm_loadu_si128(buf
);
83 __m128i
*p
= (__m128i
*)(((uintptr_t)buf
+ 5 * 16) & -16);
84 __m128i
*e
= (__m128i
*)(((uintptr_t)buf
+ len
) & -16);
85 __m128i zero
= _mm_setzero_si128();
87 /* Loop over 16-byte aligned blocks of 64. */
88 while (likely(p
<= e
)) {
89 __builtin_prefetch(p
);
90 t
= _mm_cmpeq_epi8(t
, zero
);
91 if (unlikely(_mm_movemask_epi8(t
) != 0xFFFF)) {
94 t
= p
[-4] | p
[-3] | p
[-2] | p
[-1];
98 /* Finish the aligned tail. */
103 /* Finish the unaligned tail. */
104 t
|= _mm_loadu_si128(buf
+ len
- 16);
106 return _mm_movemask_epi8(_mm_cmpeq_epi8(t
, zero
)) == 0xFFFF;
108 #ifdef CONFIG_AVX2_OPT
109 #pragma GCC pop_options
112 #ifdef CONFIG_AVX2_OPT
113 /* Note that due to restrictions/bugs wrt __builtin functions in gcc <= 4.8,
114 * the includes have to be within the corresponding push_options region, and
115 * therefore the regions themselves have to be ordered with increasing ISA.
117 #pragma GCC push_options
118 #pragma GCC target("sse4")
119 #include <smmintrin.h>
122 buffer_zero_sse4(const void *buf
, size_t len
)
124 __m128i t
= _mm_loadu_si128(buf
);
125 __m128i
*p
= (__m128i
*)(((uintptr_t)buf
+ 5 * 16) & -16);
126 __m128i
*e
= (__m128i
*)(((uintptr_t)buf
+ len
) & -16);
128 /* Loop over 16-byte aligned blocks of 64. */
129 while (likely(p
<= e
)) {
130 __builtin_prefetch(p
);
131 if (unlikely(!_mm_testz_si128(t
, t
))) {
134 t
= p
[-4] | p
[-3] | p
[-2] | p
[-1];
138 /* Finish the aligned tail. */
143 /* Finish the unaligned tail. */
144 t
|= _mm_loadu_si128(buf
+ len
- 16);
146 return _mm_testz_si128(t
, t
);
149 #pragma GCC pop_options
150 #pragma GCC push_options
151 #pragma GCC target("avx2")
152 #include <immintrin.h>
155 buffer_zero_avx2(const void *buf
, size_t len
)
157 /* Begin with an unaligned head of 32 bytes. */
158 __m256i t
= _mm256_loadu_si256(buf
);
159 __m256i
*p
= (__m256i
*)(((uintptr_t)buf
+ 5 * 32) & -32);
160 __m256i
*e
= (__m256i
*)(((uintptr_t)buf
+ len
) & -32);
162 if (likely(p
<= e
)) {
163 /* Loop over 32-byte aligned blocks of 128. */
165 __builtin_prefetch(p
);
166 if (unlikely(!_mm256_testz_si256(t
, t
))) {
169 t
= p
[-4] | p
[-3] | p
[-2] | p
[-1];
173 t
|= _mm256_loadu_si256(buf
+ 32);
179 /* Finish the last block of 128 unaligned. */
180 t
|= _mm256_loadu_si256(buf
+ len
- 4 * 32);
181 t
|= _mm256_loadu_si256(buf
+ len
- 3 * 32);
183 t
|= _mm256_loadu_si256(buf
+ len
- 2 * 32);
184 t
|= _mm256_loadu_si256(buf
+ len
- 1 * 32);
186 return _mm256_testz_si256(t
, t
);
188 #pragma GCC pop_options
189 #endif /* CONFIG_AVX2_OPT */
191 /* Note that for test_buffer_is_zero_next_accel, the most preferred
192 * ISA must have the least significant bit.
198 /* Make sure that these variables are appropriately initialized when
199 * SSE2 is enabled on the compiler command-line, but the compiler is
200 * too old to support <cpuid.h>.
202 #ifdef CONFIG_AVX2_OPT
203 # define INIT_CACHE 0
204 # define INIT_ACCEL buffer_zero_int
207 # error "ISA selection confusion"
209 # define INIT_CACHE CACHE_SSE2
210 # define INIT_ACCEL buffer_zero_sse2
213 static unsigned cpuid_cache
= INIT_CACHE
;
214 static bool (*buffer_accel
)(const void *, size_t) = INIT_ACCEL
;
216 static void init_accel(unsigned cache
)
218 bool (*fn
)(const void *, size_t) = buffer_zero_int
;
219 if (cache
& CACHE_SSE2
) {
220 fn
= buffer_zero_sse2
;
222 #ifdef CONFIG_AVX2_OPT
223 if (cache
& CACHE_SSE4
) {
224 fn
= buffer_zero_sse4
;
226 if (cache
& CACHE_AVX2
) {
227 fn
= buffer_zero_avx2
;
233 #ifdef CONFIG_AVX2_OPT
235 static void __attribute__((constructor
)) init_cpuid_cache(void)
237 int max
= __get_cpuid_max(0, NULL
);
242 __cpuid(1, a
, b
, c
, d
);
246 #ifdef CONFIG_AVX2_OPT
247 if (c
& bit_SSE4_1
) {
251 /* We must check that AVX is not just available, but usable. */
252 if ((c
& bit_OSXSAVE
) && (c
& bit_AVX
) && max
>= 7) {
254 __asm("xgetbv" : "=a"(bv
), "=d"(d
) : "c"(0));
255 __cpuid_count(7, 0, a
, b
, c
, d
);
256 if ((bv
& 6) == 6 && (b
& bit_AVX2
)) {
265 #endif /* CONFIG_AVX2_OPT */
267 bool test_buffer_is_zero_next_accel(void)
269 /* If no bits set, we just tested buffer_zero_int, and there
270 are no more acceleration options to test. */
271 if (cpuid_cache
== 0) {
274 /* Disable the accelerator we used before and select a new one. */
275 cpuid_cache
&= cpuid_cache
- 1;
276 init_accel(cpuid_cache
);
280 static bool select_accel_fn(const void *buf
, size_t len
)
282 if (likely(len
>= 64)) {
283 return buffer_accel(buf
, len
);
285 return buffer_zero_int(buf
, len
);
289 #define select_accel_fn buffer_zero_int
290 bool test_buffer_is_zero_next_accel(void)
297 * Checks if a buffer is all zeroes
299 bool buffer_is_zero(const void *buf
, size_t len
)
301 if (unlikely(len
== 0)) {
305 /* Fetch the beginning of the buffer while we select the accelerator. */
306 __builtin_prefetch(buf
);
308 /* Use an optimized zero check if possible. Note that this also
309 includes a check for an unrolled loop over 64-bit integers. */
310 return select_accel_fn(buf
, len
);